Searched refs:v7 (Results 1 - 25 of 162) sorted by relevance

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/external/clang/test/CodeGen/
H A Dmmx-inline-asm.c9 __m64 v1, v2, v3, v4, v5, v6, v7; local
20 "=&y" (v4), "=&y" (v5), "=&y" (v6), "=y" (v7)
H A Dvld_dup.c14 int64_t v7[4]; local
46 v5 = vld4_dup_s64(v7);
H A Dxcore-abi.c103 double v7 = va_arg (ap, double); local
104 f(&v7);
H A Dvector-alignment.c23 double __attribute__((vector_size(32), aligned(16))) v7; variable
24 // CHECK: @v7 {{.*}}, align 16
/external/llvm/test/MC/ARM/
H A Ddeprecated-v8.s12 @ CHECK-ARMV8: warning: deprecated since v7, use 'isb'
13 @ CHECK-THUMBV8: warning: deprecated since v7, use 'isb'
14 @ CHECK-ARMV7: warning: deprecated since v7, use 'isb'
15 @ CHECK-THUMBV7: warning: deprecated since v7, use 'isb'
16 @ CHECK-ARMV6-NOT: warning: deprecated since v7, use 'isb'
18 @ CHECK-ARMV8: warning: deprecated since v7, use 'dsb'
19 @ CHECK-THUMBV8: warning: deprecated since v7, use 'dsb'
20 @ CHECK-ARMV7: warning: deprecated since v7, use 'dsb'
21 @ CHECK-THUMBV7: warning: deprecated since v7, use 'dsb'
22 @ CHECK-ARMV6-NOT: warning: deprecated since v7, us
[all...]
/external/clang/test/CXX/class/class.mem/
H A Dp1.cpp55 void v7() { } function in struct:S5
56 void v7(int) { } //expected-note{{previous definition is here}} function in struct:S5
57 static int v7; //expected-error{{redefinition of 'v7' as different kind of symbol}} member in struct:S5
/external/llvm/test/MC/AArch64/
H A Dneon-compare-instructions.s12 cmeq v5.8h, v6.8h, v7.8h
14 cmeq v9.4s, v7.4s, v8.4s
20 // CHECK: cmeq v5.8h, v6.8h, v7.8h // encoding: [0xc5,0x8c,0x67,0x6e]
22 // CHECK: cmeq v9.4s, v7.4s, v8.4s // encoding: [0xe9,0x8c,0xa8,0x6e]
34 cmhs v5.8h, v6.8h, v7.8h
36 cmhs v9.4s, v7.4s, v8.4s
42 cmls v5.8h, v7.8h, v6.8h
44 cmls v9.4s, v8.4s, v7.4s
50 // CHECK: cmhs v5.8h, v6.8h, v7.8h // encoding: [0xc5,0x3c,0x67,0x6e]
52 // CHECK: cmhs v9.4s, v7
[all...]
H A Dneon-scalar-by-elem-mul.s8 fmul s4, s5, v7.s[2]
15 // CHECK: fmul s4, s5, v7.s[2] // encoding: [0xa4,0x98,0x87,0x5f]
28 fmulx d15, d9, v7.d[0]
35 // CHECK: fmulx d15, d9, v7.d[0] // encoding: [0x2f,0x91,0xc7,0x7f]
H A Dneon-simd-copy.s10 ins v7.h[7], w14
15 mov v7.h[7], w14
20 // CHECK: {{mov|ins}} v7.h[7], w14 // encoding: [0xc7,0x1d,0x1e,0x4e]
25 // CHECK: {{mov|ins}} v7.h[7], w14 // encoding: [0xc7,0x1d,0x1e,0x4e]
70 ins v6.h[7], v7.h[5]
75 mov v6.h[7], v7.h[5]
80 // CHECK: {{mov|ins}} v6.h[7], v7.h[5] // encoding: [0xe6,0x54,0x1e,0x6e]
85 // CHECK: {{mov|ins}} v6.h[7], v7.h[5] // encoding: [0xe6,0x54,0x1e,0x6e]
93 dup v11.4h, v7.h[7]
96 dup v11.8h, v7
[all...]
H A Darm64-simd-ldst.s12 ld1.8b {v7, v8, v9, v10}, [x4]
90 st1.2d {v7, v8}, [x10]
103 ; CHECK: ld1.8b { v7, v8, v9, v10 }, [x4] ; encoding: [0x87,0x20,0x40,0x0c]
182 ; CHECK: st1.2d { v7, v8 }, [x10] ; encoding: [0x47,0xad,0x00,0x4c]
237 ld3.2d {v7, v8, v9}, [x9]
252 st3.4s {v7, v8, v9}, [x29]
270 ; CHECK: ld3.2d { v7, v8, v9 }, [x9] ; encoding: [0x27,0x4d,0x40,0x4c]
285 ; CHECK: st3.4s { v7, v8, v9 }, [x29] ; encoding: [0xa7,0x4b,0x00,0x4c]
289 ld4.8b {v4, v5, v6, v7}, [x19]
290 ld4.16b {v4, v5, v6, v7}, [x1
[all...]
H A Dneon-facge-facgt.s10 facge v4.4s, v7.4s, v15.4s
13 facle v4.4s, v15.4s, v7.4s
17 // CHECK: facge v4.4s, v7.4s, v15.4s // encoding: [0xe4,0xec,0x2f,0x6e]
20 // CHECK: facge v4.4s, v7.4s, v15.4s // encoding: [0xe4,0xec,0x2f,0x6e]
H A Dneon-scalar-by-elem-saturating-mul.s31 sqdmulh s2, s6, v7.s[0]
37 // CHECK: sqdmulh s2, s6, v7.s[0] // encoding: [0xc2,0xc0,0x87,0x5f]
46 sqrdmulh s5, s6, v7.s[2]
52 // CHECK: sqrdmulh s5, s6, v7.s[2] // encoding: [0xc5,0xd8,0x87,0x5f]
H A Dneon-frsqrt-frecp.s9 frsqrts v4.4s, v7.4s, v15.4s
13 // CHECK: frsqrts v4.4s, v7.4s, v15.4s // encoding: [0xe4,0xfc,0xaf,0x4e]
H A Dneon-scalar-by-elem-mla.s8 fmla s4, s5, v7.s[2]
15 // CHECK: fmla s4, s5, v7.s[2] // encoding: [0xa4,0x18,0x87,0x5f]
/external/chromium_org/third_party/libvpx/source/libvpx/vp8/common/ppc/
H A Dsad_altivec.asm48 vsububs v7, v5, v4
49 vor v6, v6, v7
72 vsububs v7, v5, v4
80 vor v6, v6, v7
94 vsububs v7, v5, v9
96 vor v6, v6, v7
104 vspltisw v7, 0
106 vsumsws v8, v8, v7
125 load_aligned_16 v7, r5, r10
132 vmrghb v5, v5, v7
[all...]
H A Didctllm_altivec.asm43 vsubsws v7, v2, v3 ;# b1 = ip[0]-ip[8]
70 vaddsws v1, v7, v4 ;# b1 + c1
71 vsubsws v2, v7, v4 ;# b1 - c1
78 vmrglw v7, v2, v3 ;# c2 d2 c3 d3
83 vperm v2, v6, v7, v10 ;# a2 b2 c2 d2
84 vperm v3, v6, v7, v11 ;# a3 b3 c3 d3
88 vsubsws v7, v0, v2 ;# b1 = ip[0]-ip[8]
113 vaddsws v1, v7, v4 ;# b1 + c1
114 vsubsws v2, v7, v4 ;# b1 - c1
117 vspltish v7,
[all...]
/external/libvpx/libvpx/vp8/common/ppc/
H A Dsad_altivec.asm48 vsububs v7, v5, v4
49 vor v6, v6, v7
72 vsububs v7, v5, v4
80 vor v6, v6, v7
94 vsububs v7, v5, v9
96 vor v6, v6, v7
104 vspltisw v7, 0
106 vsumsws v8, v8, v7
125 load_aligned_16 v7, r5, r10
132 vmrghb v5, v5, v7
[all...]
H A Didctllm_altivec.asm43 vsubsws v7, v2, v3 ;# b1 = ip[0]-ip[8]
70 vaddsws v1, v7, v4 ;# b1 + c1
71 vsubsws v2, v7, v4 ;# b1 - c1
78 vmrglw v7, v2, v3 ;# c2 d2 c3 d3
83 vperm v2, v6, v7, v10 ;# a2 b2 c2 d2
84 vperm v3, v6, v7, v11 ;# a3 b3 c3 d3
88 vsubsws v7, v0, v2 ;# b1 = ip[0]-ip[8]
113 vaddsws v1, v7, v4 ;# b1 + c1
114 vsubsws v2, v7, v4 ;# b1 - c1
117 vspltish v7,
[all...]
/external/chromium_org/v8/test/mjsunit/compiler/
H A Dregress-gap.js39 function select(n, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) {
47 v6 = v7;
48 v7 = v8;
56 function select_while(n, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) {
65 v6 = v7;
66 v7 = v8;
/external/libhevc/common/arm64/
H A Dihevc_inter_pred_chroma_vert.s191 dup v7.2s, v6.2s[1]
192 ld1 {v7.s}[1],[x6],x2 //loads pu1_src_tmp
193 umull v4.8h, v7.8b, v1.8b //vmull_u8(vreinterpret_u8_u32(src_tmp2), coeffabs_1)
194 dup v7.2s, v7.2s[1]
195 ld1 {v7.s}[1],[x6],x2
197 umlal v4.8h, v7.8b, v2.8b
198 dup v7.2s, v7.2s[1]
199 ld1 {v7
[all...]
H A Dihevc_inter_pred_chroma_vert_w16out.s192 dup v7.2s, v6.2s[1]
193 ld1 {v7.s}[1],[x6],x2 //loads pu1_src_tmp
194 umull v4.8h, v7.8b, v1.8b //vmull_u8(vreinterpret_u8_u32(src_tmp2), coeffabs_1)
195 dup v7.2s, v7.2s[1]
196 ld1 {v7.s}[1],[x6],x2
198 umlal v4.8h, v7.8b, v2.8b
199 dup v7.2s, v7.2s[1]
200 ld1 {v7
[all...]
H A Dihevc_itrans_recon_4x4.s149 saddl v7.4s, v0.4h, v2.4h //pi2_src[0] + pi2_src[2]
151 shl v7.4s, v7.4s,#6 //e[0] = 64*(pi2_src[0] + pi2_src[2])
154 add v19.4s, v7.4s , v6.4s //((e[0] + o[0] )
157 sub v20.4s, v7.4s , v6.4s //((e[0] - o[0])
183 saddl v7.4s, v0.4h, v2.4h //pi2_src[0] + pi2_src[2]
185 shl v7.4s, v7.4s,#6 //e[0] = 64*(pi2_src[0] + pi2_src[2])
189 add v19.4s, v7.4s , v6.4s //((e[0] + o[0] )
192 sub v20.4s, v7
[all...]
H A Dihevc_weighted_pred_bi.s185 mov v7.h[0],w6 //moved for scalar multiplication
189 mov v7.h[1],w8 //moved for scalar multiplication
222 smull v4.4s, v0.4h, v7.4h[0] //vmull_n_s16(pi2_src1_val1, (int16_t) wgt0)
224 smull v5.4s, v1.4h, v7.4h[1] //vmull_n_s16(pi2_src2_val1, (int16_t) wgt1)
229 smull v6.4s, v2.4h, v7.4h[0] //vmull_n_s16(pi2_src1_val2, (int16_t) wgt0) ii iteration
233 smull v19.4s, v0.4h, v7.4h[0] //vmull_n_s16(pi2_src1_val1, (int16_t) wgt0) iii iteration
236 smull v17.4s, v3.4h, v7.4h[1] //vmull_n_s16(pi2_src2_val2, (int16_t) wgt1) ii iteration
243 smull v16.4s, v1.4h, v7.4h[1] //vmull_n_s16(pi2_src2_val1, (int16_t) wgt1) iii iteration
251 smull v18.4s, v2.4h, v7.4h[0] //vmull_n_s16(pi2_src1_val2, (int16_t) wgt0) iv iteration
257 smull v20.4s, v3.4h, v7
[all...]
H A Dihevc_weighted_pred_uni.s187 smull v7.4s, v3.4h, v0.4h[0] //vmull_n_s16(pi2_src_val1, (int16_t) wgt0) iii iteration
190 add v7.4s, v7.4s , v30.4s //vaddq_s32(i4_tmp1_t, tmp_lvl_shift_t) iii iteration
199 sshl v7.4s,v7.4s,v28.4s
204 //mov v7, v6 //vcombine_u16(sto_res_tmp2, sto_res_tmp2) ii iteration
206 sqxtun v7.4h, v7.4s //vqmovun_s32(sto_res_tmp1) iii iteration
216 uqxtn v7.8b, v7
[all...]
H A Dihevc_intra_pred_luma_planar.s148 mov v7.8b, v5.8b //mov #1 to d7 to used for inc for row+1 and dec for nt-1-row
196 add v5.8b, v5.8b , v7.8b //(1)
198 sub v6.8b, v6.8b , v7.8b //(1)
211 add v5.8b, v5.8b , v7.8b //(2)
212 sub v6.8b, v6.8b , v7.8b //(2)
228 add v5.8b, v5.8b , v7.8b //(3)
229 sub v6.8b, v6.8b , v7.8b //(3)
245 add v5.8b, v5.8b , v7.8b //(4)
246 sub v6.8b, v6.8b , v7.8b //(4)
261 add v5.8b, v5.8b , v7
[all...]

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