Searched refs:writemask (Results 1 - 25 of 161) sorted by relevance

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/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/
H A Dbrw_wm_pass1.c42 if (inst->writemask & (1<<i)) {
44 inst->writemask &= ~(1<<i);
50 return inst->writemask;
123 GLuint writemask; local
144 writemask = get_tracked_mask(c, inst);
145 if (!writemask) {
166 read0 = writemask;
180 read0 = writemask;
181 read1 = writemask;
186 read0 = writemask;
[all...]
H A Dbrw_wm_debug.c101 if (inst->writemask != WRITEMASK_XYZW)
103 GET_BIT(inst->writemask, 0) ? "x" : "",
104 GET_BIT(inst->writemask, 1) ? "y" : "",
105 GET_BIT(inst->writemask, 2) ? "z" : "",
106 GET_BIT(inst->writemask, 3) ? "w" : "");
H A Dbrw_wm_pass0.c247 GLuint writemask )
253 if (writemask & (1<<i)) {
259 out->writemask = writemask;
317 GLuint writemask = inst->DstReg.WriteMask; local
341 pass0_set_dst(c, out, inst, writemask);
353 GLuint writemask = inst->DstReg.WriteMask; local
368 if (writemask & (1 << i)) {
H A Dbrw_fs_vector_splitting.cpp273 unsigned int writemask; local
280 writemask = 1;
283 writemask = 1 << i;
296 NULL, writemask));
/external/mesa3d/src/mesa/drivers/dri/i965/
H A Dbrw_wm_pass1.c42 if (inst->writemask & (1<<i)) {
44 inst->writemask &= ~(1<<i);
50 return inst->writemask;
123 GLuint writemask; local
144 writemask = get_tracked_mask(c, inst);
145 if (!writemask) {
166 read0 = writemask;
180 read0 = writemask;
181 read1 = writemask;
186 read0 = writemask;
[all...]
H A Dbrw_wm_debug.c101 if (inst->writemask != WRITEMASK_XYZW)
103 GET_BIT(inst->writemask, 0) ? "x" : "",
104 GET_BIT(inst->writemask, 1) ? "y" : "",
105 GET_BIT(inst->writemask, 2) ? "z" : "",
106 GET_BIT(inst->writemask, 3) ? "w" : "");
H A Dbrw_wm_pass0.c247 GLuint writemask )
253 if (writemask & (1<<i)) {
259 out->writemask = writemask;
317 GLuint writemask = inst->DstReg.WriteMask; local
341 pass0_set_dst(c, out, inst, writemask);
353 GLuint writemask = inst->DstReg.WriteMask; local
368 if (writemask & (1 << i)) {
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/
H A Dradeon_rename_regs.c72 unsigned writemask; local
86 writemask = rc_variable_writemask_sum(var);
87 rc_variable_change_dst(var, new_index, writemask);
H A Dradeon_pair_regalloc.c238 unsigned int writemask,
248 if (classes[i].Writemasks[j] == writemask) {
281 unsigned int writemask = rc_variable_writemask_sum(variable); local
293 writemask = RC_MASK_XYZW;
299 class_index = find_class(classes, writemask, 3);
314 writemask, c.Writemasks[i]);
321 * then the writemask will be set to RC_MASK_XYZW
379 class_index = find_class(classes, writemask,
388 variable->Dst.Index, writemask);
418 static int get_reg_id(unsigned int index, unsigned int writemask) argument
236 find_class( struct rc_class * classes, unsigned int writemask, unsigned int max_writemask_count) argument
615 unsigned int chan, class_id, writemask = 0; local
692 unsigned int writemask = reg_get_writemask(reg); local
[all...]
H A Dradeon_variable.c38 * Rewrite the index and writemask for the destination register of var
320 unsigned int writemask; local
334 writemask = sub_inst->WriteMask;
337 writemask = sub_inst->OutputWriteMask;
339 writemask = 0;
342 new_var = rc_variable(c, file, sub_inst->DestIndex, writemask,
392 unsigned int writemask = 0; local
394 writemask |= var->Dst.WriteMask;
397 return writemask;
H A Dradeon_opcodes.h281 unsigned int writemask,
/external/mesa3d/src/gallium/drivers/r300/compiler/
H A Dradeon_rename_regs.c72 unsigned writemask; local
86 writemask = rc_variable_writemask_sum(var);
87 rc_variable_change_dst(var, new_index, writemask);
H A Dradeon_pair_regalloc.c238 unsigned int writemask,
248 if (classes[i].Writemasks[j] == writemask) {
281 unsigned int writemask = rc_variable_writemask_sum(variable); local
293 writemask = RC_MASK_XYZW;
299 class_index = find_class(classes, writemask, 3);
314 writemask, c.Writemasks[i]);
321 * then the writemask will be set to RC_MASK_XYZW
379 class_index = find_class(classes, writemask,
388 variable->Dst.Index, writemask);
418 static int get_reg_id(unsigned int index, unsigned int writemask) argument
236 find_class( struct rc_class * classes, unsigned int writemask, unsigned int max_writemask_count) argument
615 unsigned int chan, class_id, writemask = 0; local
692 unsigned int writemask = reg_get_writemask(reg); local
[all...]
H A Dradeon_variable.c38 * Rewrite the index and writemask for the destination register of var
320 unsigned int writemask; local
334 writemask = sub_inst->WriteMask;
337 writemask = sub_inst->OutputWriteMask;
339 writemask = 0;
342 new_var = rc_variable(c, file, sub_inst->DestIndex, writemask,
392 unsigned int writemask = 0; local
394 writemask |= var->Dst.WriteMask;
397 return writemask;
H A Dradeon_opcodes.h281 unsigned int writemask,
/external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/util/
H A Du_blit.h69 uint writemask, uint zs_writemask);
H A Du_simple_shaders.h64 unsigned writemask);
/external/mesa3d/src/gallium/auxiliary/util/
H A Du_blit.h69 uint writemask, uint zs_writemask);
H A Du_simple_shaders.h64 unsigned writemask);
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/svga/
H A Dsvga_pipe_depthstencil.c89 /* SVGA3D has one ref/mask/writemask triple shared between front &
93 ds->stencil_writemask = templ->stencil[0].writemask & 0xff;
105 ds->stencil_writemask = templ->stencil[1].writemask & 0xff;
112 ds->zwriteenable = templ->depth.writemask;
/external/chromium_org/third_party/mesa/src/src/mesa/state_tracker/
H A Dst_atom_depth.c107 dsa->depth.writemask = ctx->Depth.Mask;
118 dsa->stencil[0].writemask = ctx->Stencil.WriteMask[0] & 0xff;
129 dsa->stencil[1].writemask = ctx->Stencil.WriteMask[back] & 0xff;
/external/mesa3d/src/gallium/drivers/svga/
H A Dsvga_pipe_depthstencil.c89 /* SVGA3D has one ref/mask/writemask triple shared between front &
93 ds->stencil_writemask = templ->stencil[0].writemask & 0xff;
105 ds->stencil_writemask = templ->stencil[1].writemask & 0xff;
112 ds->zwriteenable = templ->depth.writemask;
/external/mesa3d/src/mesa/state_tracker/
H A Dst_atom_depth.c107 dsa->depth.writemask = ctx->Depth.Mask;
118 dsa->stencil[0].writemask = ctx->Stencil.WriteMask[0] & 0xff;
129 dsa->stencil[1].writemask = ctx->Stencil.WriteMask[back] & 0xff;
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/
H A Dr300_hyperz.c176 assert(!dsa->dsa.depth.writemask);
191 /* If writemask is disabled, the HiZ memory will not be changed,
193 if (dsa->dsa.depth.writemask) {
225 return s->enabled && s->writemask &&
237 if (dsa->depth.enabled && dsa->depth.writemask &&
/external/mesa3d/src/gallium/drivers/r300/
H A Dr300_hyperz.c176 assert(!dsa->dsa.depth.writemask);
191 /* If writemask is disabled, the HiZ memory will not be changed,
193 if (dsa->dsa.depth.writemask) {
225 return s->enabled && s->writemask &&
237 if (dsa->depth.enabled && dsa->depth.writemask &&

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