/external/mesa3d/src/gallium/auxiliary/tgsi/ |
H A D | tgsi_parse.h | 99 struct tgsi_full_dst_register Dst[TGSI_FULL_MAX_DST_REGISTERS]; member in struct:tgsi_full_instruction
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/external/mesa3d/src/gallium/drivers/i915/ |
H A D | i915_fpc.h | 303 struct i915_full_dst_register Dst[1]; member in struct:i915_full_instruction
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/external/mesa3d/src/gallium/drivers/r300/compiler/ |
H A D | radeon_variable.h | 46 struct rc_dst_register Dst; member in struct:rc_variable
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/external/mesa3d/src/gallium/drivers/r300/compiler/tests/ |
H A D | rc_test_helpers.c | 287 DBG("Dst Reg File=%u Index=%d Writemask=%d\n", 299 struct match_info Dst; member in struct:inst_tokens 353 tokens.Dst.String = inst_str + matches[3].rm_so; 354 tokens.Dst.Length = match_length(matches, 3); 357 dst_str = malloc(sizeof(char) * (tokens.Dst.Length + 1)); 358 strncpy(dst_str, tokens.Dst.String, tokens.Dst.Length); 359 dst_str[tokens.Dst.Length] = '\0';
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/external/llvm/lib/Transforms/Vectorize/ |
H A D | LoopVectorize.cpp | 317 VectorParts createEdgeMask(BasicBlock *Src, BasicBlock *Dst); 2844 InnerLoopVectorizer::createEdgeMask(BasicBlock *Src, BasicBlock *Dst) { argument 2845 assert(std::find(pred_begin(Dst), pred_end(Dst), Src) != pred_end(Dst) && 2849 std::pair<BasicBlock*, BasicBlock*> Edge(Src, Dst); 2863 if (BI->getSuccessor(0) != Dst)
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H A D | SLPVectorizer.cpp | 466 /// \p Src to \p Dst. 468 Value *getSinkBarrier(Instruction *Src, Instruction *Dst); 1488 Value *BoUpSLP::getSinkBarrier(Instruction *Src, Instruction *Dst) { argument 1489 assert(Src->getParent() == Dst->getParent() && "Not the same BB"); 1490 BasicBlock::iterator I = Src, E = Dst;
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/external/llvm/bindings/ocaml/linker/ |
H A D | linker_ocaml.c | 47 CAMLprim value llvm_link_modules(LLVMModuleRef Dst, LLVMModuleRef Src, value Mode) { argument 50 if (LLVMLinkModules(Dst, Src, Int_val(Mode), &Message))
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/external/llvm/include/llvm/Analysis/ |
H A D | DependenceAnalysis.h | 75 Dst(Destination), 108 Instruction *getDst() const { return Dst; } 204 Instruction *Src, *Dst; member in class:llvm::Dependence 221 Instruction *Dst, 284 /// depends - Tests for a dependence between the Src and Dst instructions. 288 /// if it appears that control flow can reach from Src to Dst 291 Instruction *Dst, 347 const SCEV *Dst; member in struct:llvm::DependenceAnalysis::Subscript 459 /// establishNestingLevels - Examines the loop nesting of the Src and Dst 476 /// ... - loops containing Src but not Dst [all...] |
/external/llvm/include/llvm/IR/ |
H A D | IRBuilder.h | 381 CallInst *CreateMemCpy(Value *Dst, Value *Src, uint64_t Size, unsigned Align, argument 384 return CreateMemCpy(Dst, Src, getInt64(Size), Align, isVolatile, TBAATag, 388 CallInst *CreateMemCpy(Value *Dst, Value *Src, Value *Size, unsigned Align, 397 CallInst *CreateMemMove(Value *Dst, Value *Src, uint64_t Size, unsigned Align, argument 399 return CreateMemMove(Dst, Src, getInt64(Size), Align, isVolatile, TBAATag); 402 CallInst *CreateMemMove(Value *Dst, Value *Src, Value *Size, unsigned Align,
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/external/llvm/include/llvm/Support/ |
H A D | GCOV.h | 253 GCOVEdge(GCOVBlock &S, GCOVBlock &D) : Src(S), Dst(D), Count(0) {} 256 GCOVBlock &Dst; member in struct:llvm::GCOVEdge 294 EdgeWeight(GCOVBlock *D): Dst(D), Count(0) {} 296 GCOVBlock *Dst; member in struct:llvm::GCOVBlock::EdgeWeight 302 return E1->Dst.Number < E2->Dst.Number; 318 assert(&Edge->Dst == this); // up to caller to ensure edge is valid 324 if (DstEdges.size() && DstEdges.back()->Dst.Number > Edge->Dst.Number)
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/external/llvm/include/llvm/Target/ |
H A D | CostTable.h | 51 TypeTy Dst; member in struct:llvm::TypeConversionCostTblEntry 60 unsigned len, int ISD, CompareTy Dst, 63 if (ISD == Tbl[i].ISD && Src == Tbl[i].Src && Dst == Tbl[i].Dst) 74 int ISD, CompareTy Dst, CompareTy Src) { member in namespace:llvm 75 return ConvertCostTableLookup(Tbl, N, ISD, Dst, Src); 59 ConvertCostTableLookup(const TypeConversionCostTblEntry<TypeTy> *Tbl, unsigned len, int ISD, CompareTy Dst, CompareTy Src) argument
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/external/llvm/include/llvm/Transforms/Utils/ |
H A D | BasicBlockUtils.h | 116 /// SplitCriticalEdge - If an edge from Src to Dst is critical, split the edge 120 inline BasicBlock *SplitCriticalEdge(BasicBlock *Src, BasicBlock *Dst, argument 128 if (TI->getSuccessor(i) == Dst)
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/external/llvm/lib/Analysis/ |
H A D | DependenceAnalysis.cpp | 195 return Src->mayReadFromMemory() && Dst->mayReadFromMemory(); 201 return Src->mayWriteToMemory() && Dst->mayWriteToMemory(); 207 return Src->mayWriteToMemory() && Dst->mayReadFromMemory(); 213 return Src->mayReadFromMemory() && Dst->mayWriteToMemory(); 665 // Examines the loop nesting of the Src and Dst 682 // ... - loops containing Src but not Dst 683 // SrcLevels - innermost loop containing Src but not Dst 684 // ... - loops containing Dst but not Src 685 // MaxLevels - innermost loops containing Dst but not Src 704 // to A (the Src) and the load from A (the Dst), w 715 establishNestingLevels(const Instruction *Src, const Instruction *Dst) argument 792 const SCEV *Dst = Pair->Dst; local 825 checkDstSubscript(const SCEV *Dst, const Loop *LoopNest, SmallBitVector &Loops) argument 844 classifyPair(const SCEV *Src, const Loop *SrcLoopNest, const SCEV *Dst, const Loop *DstLoopNest, SmallBitVector &Loops) argument 960 testZIV(const SCEV *Src, const SCEV *Dst, FullDependence &Result) const argument 2039 testSIV(const SCEV *Src, const SCEV *Dst, unsigned &Level, FullDependence &Result, Constraint &NewConstraint, const SCEV *&SplitIter) const argument 2110 testRDIV(const SCEV *Src, const SCEV *Dst, FullDependence &Result) const argument 2177 testMIV(const SCEV *Src, const SCEV *Dst, const SmallBitVector &Loops, FullDependence &Result) const argument 2219 gcdMIVtest(const SCEV *Src, const SCEV *Dst, FullDependence &Result) const argument 2433 banerjeeMIVtest(const SCEV *Src, const SCEV *Dst, const SmallBitVector &Loops, FullDependence &Result) const argument 2982 propagate(const SCEV *&Src, const SCEV *&Dst, SmallBitVector &Loops, SmallVectorImpl<Constraint> &Constraints, bool &Consistent) argument 3007 propagateDistance(const SCEV *&Src, const SCEV *&Dst, Constraint &CurConstraint, bool &Consistent) argument 3034 propagateLine(const SCEV *&Src, const SCEV *&Dst, Constraint &CurConstraint, bool &Consistent) argument 3109 propagatePoint(const SCEV *&Src, const SCEV *&Dst, Constraint &CurConstraint) argument 3280 depends(Instruction *Src, Instruction *Dst, bool PossiblyLoopIndependent) argument 3738 Instruction *Dst = Dep->getDst(); local [all...] |
H A D | TargetTransformInfo.cpp | 186 unsigned TargetTransformInfo::getCastInstrCost(unsigned Opcode, Type *Dst, argument 188 return PrevTTI->getCastInstrCost(Opcode, Dst, Src); 575 unsigned getCastInstrCost(unsigned Opcode, Type *Dst,
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/external/llvm/lib/CodeGen/ |
H A D | BasicTargetTransformInfo.cpp | 108 unsigned getCastInstrCost(unsigned Opcode, Type *Dst, 358 unsigned BasicTTI::getCastInstrCost(unsigned Opcode, Type *Dst, argument 365 std::pair<unsigned, MVT> DstLT = TLI->getTypeLegalizationCost(Dst); 390 if (!Src->isVectorTy() && !Dst->isVectorTy()) { 405 if (Dst->isVectorTy() && Src->isVectorTy()) { 428 unsigned Num = Dst->getVectorNumElements(); 429 unsigned Cost = TopTTI->getCastInstrCost(Opcode, Dst->getScalarType(), 434 return getScalarizationOverhead(Dst, true, true) + Num * Cost; 443 (Dst->isVectorTy()? getScalarizationOverhead(Dst, tru [all...] |
H A D | MachineInstr.cpp | 618 /// Move NumOps MachineOperands from Src to Dst, with support for overlapping 620 static void moveOperands(MachineOperand *Dst, MachineOperand *Src, argument 623 return MRI->moveOperands(Dst, Src, NumOps); 627 if (Dst < Src) 629 new (Dst + i) MachineOperand(Src[i]); 632 new (Dst + i - 1) MachineOperand(Src[i - 1]);
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H A D | MachineRegisterInfo.cpp | 234 /// Move NumOps operands from Src to Dst, updating use-def lists as needed. 236 /// The Dst range is assumed to be uninitialized memory. (Or it may contain 240 /// The Src and Dst ranges may overlap. 241 void MachineRegisterInfo::moveOperands(MachineOperand *Dst, argument 244 assert(Src != Dst && NumOps && "Noop moveOperands"); 246 // Copy backwards if Dst is within the Src range. 248 if (Dst >= Src && Dst < Src + NumOps) { 250 Dst += NumOps - 1; 256 new (Dst) MachineOperan [all...] |
H A D | RegisterCoalescer.cpp | 217 unsigned &Src, unsigned &Dst, 220 Dst = MI->getOperand(0).getReg(); 225 Dst = MI->getOperand(0).getReg(); 257 unsigned Src, Dst, SrcSub, DstSub; local 258 if (!isMoveInstr(TRI, MI, Src, Dst, SrcSub, DstSub)) 262 // If one register is a physreg, it must be Dst. 264 if (TargetRegisterInfo::isPhysicalRegister(Dst)) 266 std::swap(Src, Dst); 273 if (TargetRegisterInfo::isPhysicalRegister(Dst)) { 276 Dst 216 isMoveInstr(const TargetRegisterInfo &tri, const MachineInstr *MI, unsigned &Src, unsigned &Dst, unsigned &SrcSub, unsigned &DstSub) argument 351 unsigned Src, Dst, SrcSub, DstSub; local [all...] |
H A D | TailDuplication.cpp | 296 unsigned Dst = Copy->getOperand(0).getReg(); local 299 MRI->constrainRegClass(Src, MRI->getRegClass(Dst))) { 301 MRI->replaceRegWith(Dst, Src);
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAG.cpp | 3884 SDValue Chain, SDValue Dst, 3906 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3969 getMemBasePlusOffset(Dst, DstOff, dl, DAG), 3987 getMemBasePlusOffset(Dst, DstOff, dl, DAG), 4001 SDValue Chain, SDValue Dst, 4020 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 4070 getMemBasePlusOffset(Dst, DstOff, dl, DAG), 4085 /// \param Dst Pointer to destination memory location. 4098 SDValue Chain, SDValue Dst, 4115 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3883 getMemcpyLoadsAndStores(SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Dst, SDValue Src, uint64_t Size, unsigned Align, bool isVol, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) argument 4000 getMemmoveLoadsAndStores(SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Dst, SDValue Src, uint64_t Size, unsigned Align, bool isVol, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) argument 4097 getMemsetStores(SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Dst, SDValue Src, uint64_t Size, unsigned Align, bool isVol, MachinePointerInfo DstPtrInfo) argument 4180 getMemcpy(SDValue Chain, SDLoc dl, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVol, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) argument 4248 getMemmove(SDValue Chain, SDLoc dl, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVol, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) argument 4304 getMemset(SDValue Chain, SDLoc dl, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVol, MachinePointerInfo DstPtrInfo) argument [all...] |
/external/llvm/lib/ExecutionEngine/ |
H A D | ExecutionEngine.cpp | 1004 /// StoreIntToMemory - Fills the StoreBytes bytes of memory starting from Dst 1006 static void StoreIntToMemory(const APInt &IntVal, uint8_t *Dst, argument 1014 memcpy(Dst, Src, StoreBytes); 1022 memcpy(Dst + StoreBytes, Src, sizeof(uint64_t)); 1026 memcpy(Dst, Src + sizeof(uint64_t) - StoreBytes, StoreBytes); 1081 uint8_t *Dst = reinterpret_cast<uint8_t *>( local 1087 memcpy(Dst, Src, LoadBytes); 1096 memcpy(Dst, Src + LoadBytes, sizeof(uint64_t)); 1097 Dst += sizeof(uint64_t); 1100 memcpy(Dst [all...] |
/external/llvm/lib/IR/ |
H A D | GCOV.cpp | 156 uint32_t Dst; local 157 if (!Buff.readInt(Dst)) return false; 158 Edges.push_back(make_unique<GCOVEdge>(*Blocks[BlockNo], *Blocks[Dst])); 161 Blocks[Dst]->addSrcEdge(Edge); 335 if (!DstEdges[DstEdgeNo]->Dst.getNumDstEdges()) 336 DstEdges[DstEdgeNo]->Dst.Counter += N; 371 dbgs() << Edge->Dst.Number << " (" << Edge->Count << "), ";
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H A D | IRBuilder.cpp | 82 CreateMemCpy(Value *Dst, Value *Src, Value *Size, unsigned Align, argument 84 Dst = getCastedInt8PtrValue(Dst); 87 Value *Ops[] = { Dst, Src, Size, getInt32(Align), getInt1(isVolatile) }; 88 Type *Tys[] = { Dst->getType(), Src->getType(), Size->getType() }; 106 CreateMemMove(Value *Dst, Value *Src, Value *Size, unsigned Align, argument 108 Dst = getCastedInt8PtrValue(Dst); 111 Value *Ops[] = { Dst, Src, Size, getInt32(Align), getInt1(isVolatile) }; 112 Type *Tys[] = { Dst [all...] |
/external/llvm/lib/Linker/ |
H A D | LinkModules.cpp | 434 Comdat::SelectionKind Dst, 480 void linkFunctionBody(Function *Dst, Function *Src); 572 Comdat::SelectionKind Dst, 577 bool DstAnyOrLargest = Dst == Comdat::SelectionKind::Any || 578 Dst == Comdat::SelectionKind::Largest; 582 if (Dst == Comdat::SelectionKind::Largest || 587 } else if (Src == Dst) { 588 Result = Dst; 596 // Go with Dst. 1167 void ModuleLinker::linkFunctionBody(Function *Dst, Functio argument 570 computeResultingSelectionKind(StringRef ComdatName, Comdat::SelectionKind Src, Comdat::SelectionKind Dst, Comdat::SelectionKind &Result, bool &LinkFromSrc) argument [all...] |
/external/llvm/lib/Support/ |
H A D | ConvertUTFWrapper.cpp | 114 UTF8 *Dst = reinterpret_cast<UTF8 *>(&Out[0]); local 115 UTF8 *DstEnd = Dst + Out.size(); 118 ConvertUTF16toUTF8(&Src, SrcEnd, &Dst, DstEnd, strictConversion); 126 Out.resize(reinterpret_cast<char *>(Dst) - &Out[0]);
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