/external/vixl/src/a64/ |
H A D | macro-assembler-a64.cc | 496 void MacroAssembler::Sub(const Register& rd, function in class:vixl::MacroAssembler 588 Sub(rd, AppropriateZeroRegFor(rd), operand); 995 Sub(StackPointer(), StackPointer(), size);
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/external/skia/src/gpu/gl/ |
H A D | GrGLSL_impl.h | 55 inline Self GrGLSLExpr<Self>::Sub(T0 in0, T1 in1) { function in class:GrGLSLExpr 108 return GrGLSLExpr1::Sub(in0, in1); 148 return GrGLSLExpr4::Sub(in0, in1); 160 return GrGLSLExpr4::Sub(in0, in1); 172 return GrGLSLExpr4::Sub(in0, in1);
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/external/regex-re2/lib/codereview/ |
H A D | codereview.py | 85 def Sub(l1, l2): function 89 l = l1 + Sub(l2, l1) 866 l = Sub(l, taken.keys()) 1240 pats = Sub(pats, taken) + ['path:'+f for f in files] 1609 extra = Sub(cl.files, files) 1735 cl.files = Sub(cl.files, oldfiles) 1744 files = Sub(files, cl.files) 1757 ocl.files = Sub(ocl.files, files) 1823 cl.cc = Sub(cl.cc, defaultcc) 2055 extra = Sub(c [all...] |
/external/pdfium/fpdfsdk/src/fxedit/ |
H A D | fxet_list.cpp | 413 void CPLST_Select::Sub(FX_INT32 nItemIndex)
function in class:CPLST_Select 423 void CPLST_Select::Sub(FX_INT32 nBeginIndex, FX_INT32 nEndIndex)
function in class:CPLST_Select 432 for (FX_INT32 i=nBeginIndex; i<=nEndIndex; i++) Sub(i);
570 m_aSelItems.Sub(nHitIndex);
620 m_aSelItems.Sub(m_nFootIndex,nHitIndex);
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/external/llvm/unittests/Transforms/Utils/ |
H A D | Cloning.cpp | 67 BinaryOperator *Sub = BinaryOperator::Create(Instruction::Sub, V, V); local 71 BinaryOperator *SubClone = this->clone(Sub); 84 Sub->setHasNoUnsignedWrap(); 88 SubClone = this->clone(Sub); 101 Sub->setHasNoSignedWrap(); 105 SubClone = this->clone(Sub); 118 Sub->setHasNoUnsignedWrap(false); 122 SubClone = this->clone(Sub);
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/external/llvm/utils/TableGen/ |
H A D | CodeGenRegisters.cpp | 335 PrintFatalError(Loc, "Sub-register can't have two names: " + 446 // Sub-register doesn't exist. 1063 // Sub-class doesn't exist, create a new one. 1154 assert(Idx3 && "Sub-register doesn't have an index"); 1838 // Build list of (Super, Sub) pairs for this SubIdx. 1844 const CodeGenRegister *Sub = Super->getSubRegs().find(SubIdx)->second; local 1845 assert(Sub && "Missing sub-register"); 1846 SSPairs.push_back(std::make_pair(Super, Sub)); 1847 TopoSigs.set(Sub->getTopoSig());
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/external/llvm/bindings/ocaml/llvm/ |
H A D | llvm.ml | 155 | Sub Constructor in type:Opcode/t 242 | Sub Constructor in type:AtomicRMWBinOp/t
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/external/llvm/examples/Fibonacci/ |
H A D | fibonacci.cpp | 71 Value *Sub = BinaryOperator::CreateSub(ArgX, One, "arg", RecurseBB); local 72 CallInst *CallFibX1 = CallInst::Create(FibF, Sub, "fibx1", RecurseBB); 76 Sub = BinaryOperator::CreateSub(ArgX, Two, "arg", RecurseBB); 77 CallInst *CallFibX2 = CallInst::Create(FibF, Sub, "fibx2", RecurseBB);
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/external/llvm/examples/ParallelJIT/ |
H A D | ParallelJIT.cpp | 98 Value *Sub = BinaryOperator::CreateSub(ArgX, One, "arg", RecurseBB); local 99 Value *CallFibX1 = CallInst::Create(FibF, Sub, "fibx1", RecurseBB); 102 Sub = BinaryOperator::CreateSub(ArgX, Two, "arg", RecurseBB); 103 Value *CallFibX2 = CallInst::Create(FibF, Sub, "fibx2", RecurseBB);
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/external/llvm/include/llvm/IR/ |
H A D | Instructions.h | 637 Sub, enumerator in enum:llvm::AtomicRMWInst::BinOp
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/external/llvm/include/llvm/MC/ |
H A D | MCExpr.h | 403 Sub, ///< Subtraction. enumerator in enum:llvm::MCBinaryExpr::Opcode 486 return Create(Sub, LHS, RHS, Ctx);
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/external/llvm/lib/CodeGen/AsmPrinter/ |
H A D | DwarfAccelTable.cpp | 166 const MCExpr *Sub = MCBinaryExpr::CreateSub( local 169 Asm->OutStreamer.EmitValue(Sub, sizeof(uint32_t));
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 2146 SDValue Sub = DAG.getNode(ISD::SUB, SDLoc(N), VT, N0, Mul); local 2148 return Sub; 2199 SDValue Sub = DAG.getNode(ISD::SUB, SDLoc(N), VT, N0, Mul); local 2201 return Sub;
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H A D | TargetLowering.cpp | 1055 // Add, Sub, and Mul don't demand any bits in positions beyond that 1275 SDValue Sub = DAG.getNode(ISD::SUB, dl, CTVT, CTOp, local 1277 SDValue And = DAG.getNode(ISD::AND, dl, CTVT, CTOp, Sub);
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/external/llvm/lib/ExecutionEngine/RuntimeDyld/ |
H A D | RuntimeDyldChecker.cpp | 72 enum class BinOpToken : unsigned { Invalid, Add, Sub, BitwiseAnd, member in class:llvm::RuntimeDyldCheckerExprEval::BinOpToken 150 case '-': Op = BinOpToken::Sub; break; 164 case BinOpToken::Sub:
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/external/llvm/lib/MC/ |
H A D | MCExternalSymbolizer.cpp | 97 const MCExpr *Sub = nullptr; local 102 Sub = MCSymbolRefExpr::Create(Sym, Ctx); 104 Sub = MCConstantExpr::Create((int)SymbolicOp.SubtractSymbol.Value, Ctx); 113 if (Sub) { 116 LHS = MCBinaryExpr::CreateSub(Add, Sub, Ctx); 118 LHS = MCUnaryExpr::CreateMinus(Sub, Ctx);
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/external/llvm/lib/MC/MCParser/ |
H A D | AsmParser.cpp | 986 const MCExpr *Sub = applyModifierToExpr(UE->getSubExpr(), Variant); local 987 if (!Sub) 989 return MCUnaryExpr::Create(UE->getOpcode(), Sub, getContext()); 1139 Kind = MCBinaryExpr::Sub;
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/external/llvm/lib/TableGen/ |
H A D | SetTheory.cpp | 36 // (sub Add, Sub, ...) Set difference. 43 RecSet Add, Sub; variable 45 ST.evaluate(Expr->arg_begin() + 1, Expr->arg_end(), Sub, Loc); 47 if (!Sub.count(*I))
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/external/llvm/lib/Target/AArch64/Disassembler/ |
H A D | AArch64ExternalSymbolizer.cpp | 179 const MCExpr *Sub = nullptr; local 184 Sub = MCSymbolRefExpr::Create(Sym, Ctx); 186 Sub = MCConstantExpr::Create(SymbolicOp.SubtractSymbol.Value, Ctx); 195 if (Sub) { 198 LHS = MCBinaryExpr::CreateSub(Add, Sub, Ctx); 200 LHS = MCUnaryExpr::CreateMinus(Sub, Ctx);
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonFixupHwLoops.cpp | 137 int Sub = InstOffset - BlockToInstOffset[MII->getOperand(0).getMBB()]; local 138 unsigned Dist = Sub > 0 ? Sub : -Sub;
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H A D | HexagonHardwareLoops.cpp | 237 unsigned Sub; member in struct:__anon26012::CountValue::Values::__anon26013 247 Contents.R.Sub = u; 261 return Contents.R.Sub; 270 if (isReg()) { OS << PrintReg(Contents.R.Reg, TRI, Contents.R.Sub); }
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H A D | HexagonISelLowering.cpp | 796 SDValue Sub = DAG.getNode(ISD::SUB, dl, MVT::i32, StackPointer, Size); local 814 Sub, 817 // The Sub result contains the new stack start address, so it 821 SDValue CopyChain = DAG.getCopyToReg(Chain, dl, QRI->getStackRegister(), Sub);
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/external/llvm/lib/Target/Mips/ |
H A D | MipsMCInstLower.cpp | 159 const MCBinaryExpr *Sub = MCBinaryExpr::CreateSub(Sym1, Sym2, *Ctx); local 161 return MCOperand::CreateExpr(MipsMCExpr::Create(Kind, Sub, *Ctx));
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/external/llvm/lib/Target/PowerPC/AsmParser/ |
H A D | PPCAsmParser.cpp | 1063 const MCExpr *Sub = ExtractModifierFromExpr(UE->getSubExpr(), Variant); local 1064 if (!Sub) 1066 return MCUnaryExpr::Create(UE->getOpcode(), Sub, Context); 1129 const MCExpr *Sub = FixupVariantKind(UE->getSubExpr()); local 1130 if (Sub == UE->getSubExpr()) 1132 return MCUnaryExpr::Create(UE->getOpcode(), Sub, Context);
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCAsmPrinter.cpp | 919 const MCExpr *Sub = local 930 const MCExpr *SubHa16 = PPCMCExpr::CreateHa(Sub, isDarwin, OutContext); 940 const MCExpr *SubLo16 = PPCMCExpr::CreateLo(Sub, isDarwin, OutContext);
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