/external/chromium_org/third_party/WebKit/Source/devtools/scripts/closure/ |
H A D | compiler.jar | META-INF/ META-INF/MANIFEST.MF com/ com/google/ com/google/javascript/ com/google/javascript/jscomp/ ... |
/external/chromium_org/third_party/android_platform/webview/ |
H A D | frameworks.jar | META-INF/ META-INF/MANIFEST.MF android/ android/location/ android/location/Address$1.class ... |
/external/chromium_org/third_party/boringssl/src/crypto/bn/ |
H A D | div.c | 110 * zero, and sets up rm such that dv*divisor + rm = num holds. 113 * rm->neg == num->neg (unless the remainder is zero) 114 * If 'dv' or 'rm' is NULL, the respective value is not returned. */ 115 int BN_div(BIGNUM *dv, BIGNUM *rm, const BIGNUM *num, const BIGNUM *divisor, argument 143 if (rm != NULL) { 144 if (BN_copy(rm, num) == NULL) { 355 if (rm != NULL) { 356 /* Keep a copy of the neg flag in num because if rm==num 360 BN_rshift(rm, snu [all...] |
/external/chromium_org/third_party/closure_compiler/compiler/ |
H A D | compiler.jar | META-INF/ META-INF/MANIFEST.MF com/ com/google/ com/google/debugging/ com/google/debugging/sourcemap/ ... |
/external/chromium_org/third_party/dom_distiller_js/package/js/ |
H A D | domdistiller.js | 196 function rm(a){return new lm(a.c,a.b,a.d,a.f,a.e)} 529 function J(a,b){var c,d,e,f,g,h,i,j,k,l;f=ib();d=(g=new Wm,h=new db(g),i=new rb(h),mb(new nb(i),a.c),Rm(g),j=(Rm(g),new Cl(g.u)),I(a),zl(j,a.b),Bl(j,i.d),Al(j,i.b),j);Cg(a.e,ib()-f);f=ib();c=(Fl(d,true,'Start'),Hl(d),Wl(new Yl(d.b),d),l=Gl(d),Fl(d,l,'Classification Complete'),l=Dm((Cm(),Bm),d),Fl(d,l,'Ignore Strictly Not Content blocks'),l=km(rm(sm(tm(pm(new um),0.5))),d),Fl(d,l,'SimilarSiblingContentExpansion: Cross headings'),l=km(rm(sm(tm(qm(pm(new um)),0))),d),Fl(d,l,'SimilarSiblingContentExpansion: Mixed tags'),l=$l(d),Fl(d,l,'HeadingFusion'),l=Ol((Nl(),Ml),d),Fl(d,l,'BlockProximityFusion: Distance 1'),l=ym((xm(),wm),d),Fl(d,l,'BlockFilter'),l=Ol(Ll,d),Fl(d,l,'BlockProximityFusion: Same level content-only'),l=cm((bm(),am),d),Fl(d,l,'Keep Largest Block'),l=Zl(d),Fl(d,l,'Expand Title to Content'),l=gm(d),Fl(d,l,'Largest Block Same Tag Level -> Content'),l=hm(d),Fl(d,l,'List at end filter'),k=M(d),Id(k,d.d,d.c,$doc.documentElement));Bg(a.e,ib()-f);if(c.c==0)return $u;f=ib();e=K(b,c);Ag(a.d,Dl(d));Dg(a.e,ib()-f);return e}
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/external/chromium_org/third_party/icu/source/test/cintltst/ |
H A D | cbiditst.c | 1698 UBiDiReorderingMode rm; local 1761 rm = ubidi_getReorderingMode(bidi); 1763 if (rm != ubidi_getReorderingMode(bidi)) { 1767 if (rm != ubidi_getReorderingMode(bidi)) {
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/external/chromium_org/third_party/icu/source/tools/gennorm2/ |
H A D | n2builder.cpp | 709 UnicodeString &rm=*p->rawMapping; local 710 int32_t rmLength=rm.length(); 718 UChar rm0=rm.charAt(0); 721 0==rm.compare(1, 99, m, 2, 99) && 735 dataString.append(rm);
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/external/chromium_org/third_party/libaddressinput/src/java/ |
H A D | android.jar | META-INF/ META-INF/MANIFEST.MF AndroidManifest.xml android/ android/Manifest$permission.class ... |
/external/chromium_org/third_party/libvpx/source/libvpx/vpx_mem/memory_manager/include/ |
H A D | cavl_impl.h | 531 AVL_HANDLE rm; variable 560 rm = h; 603 if (parent == rm) 626 path = parent == rm ? h : parent; 628 if (h != rm) { 630 AVL_SET_LESS(h, AVL_GET_LESS(rm, 0)) 631 AVL_SET_GREATER(h, AVL_GET_GREATER(rm, 0)) 632 AVL_SET_BALANCE_FACTOR(h, AVL_GET_BALANCE_FACTOR(rm)) 714 return(rm);
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/external/chromium_org/third_party/mach_override/libudis86/ |
H A D | decode.c | 336 decode_gpr(register struct ud* u, unsigned int s, unsigned char rm) argument 340 return UD_R_RAX + rm; 342 return UD_R_EAX + rm; 344 return UD_R_AX + rm; 347 if (rm >= 4) 348 return UD_R_SPL + (rm-4); 349 return UD_R_AL + rm; 350 } else return UD_R_AL + rm; 449 * Decodes reg field of mod/rm byte 466 * Decodes rm fiel 477 unsigned char mod, rm; local [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/util/ |
H A D | u_format_rgb9e5.h | 105 int rm, gm, bm; local 130 rm = (int) floor(rc / denom + 0.5); 134 assert(rm <= MAX_RGB9E5_MANTISSA); 137 assert(rm >= 0); 141 retval.field.r = rm;
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/external/chromium_org/third_party/mesa/src/src/gallium/tests/unit/ |
H A D | translate_test.c | 37 const double rm = (double)RAND_MAX + 1; local 43 div *= rm;
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/external/chromium_org/third_party/mesa/src/src/mesa/math/ |
H A D | m_debug_clip.c | 234 GLubyte rm[TEST_COUNT], rco, rca; local 279 ref_cliptest[psize]( source, ref, rm, &rco, &rca, viewport_z_clip ); 301 if ( dm[i] != rm[i] ) { 311 printf( "mask[%d] = 0x%02x ref mask[%d] = 0x%02x\n", i, dm[i], i,rm[i] ); 328 printf( "(i = %i, j = %i) dm = 0x%02x rm = 0x%02x\n", 329 i, j, dm[i], rm[i] );
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/external/chromium_org/third_party/skia/experimental/PdfViewer/src/ |
H A D | SkPdfRenderer.cpp | 804 SkRect rm = bBox; local 805 pdfContext->fGraphicsState.fCTM.mapRect(&rm); 807 SkTraceRect(rm, "bbox mapped");
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/external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/x86/ |
H A D | x86bc.c | 208 unsigned char rm; local 210 if (yasm_x86__set_rex_from_reg(rex, &rm, reg, bits, X86_REX_B)) 215 x86_ea->modrm = 0xC0 | rm; /* Mod=11, R/M=Reg, Reg=0 */
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/external/chromium_org/v8/src/arm/ |
H A D | assembler-arm-inl.h | 390 Operand::Operand(Register rm) { argument 391 rm_ = rm;
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H A D | assembler-arm.cc | 281 Operand::Operand(Register rm, ShiftOp shift_op, int shift_imm) { argument 284 rm_ = rm; 302 Operand::Operand(Register rm, ShiftOp shift_op, Register rs) { argument 304 rm_ = rm; 319 MemOperand::MemOperand(Register rn, Register rm, AddrMode am) { argument 321 rm_ = rm; 328 MemOperand::MemOperand(Register rn, Register rm, argument 332 rm_ = rm; 347 NeonMemOperand::NeonMemOperand(Register rn, Register rm, int align) { argument 349 rm_ = rm; [all...] |
H A D | assembler-arm.h | 498 // rm 499 INLINE(explicit Operand(Register rm)); 501 // rm <shift_op> shift_imm 502 explicit Operand(Register rm, ShiftOp shift_op, int shift_imm); 503 INLINE(static Operand SmiUntag(Register rm)) { argument 504 return Operand(rm, ASR, kSmiTagSize); 515 // rm <shift_op> rs 516 explicit Operand(Register rm, ShiftOp shift_op, Register rs); 540 Register rm() const { return rm_; } function in class:v8::internal::BASE_EMBEDDED 566 // [rn +/- rm] Offse 594 Register rm() const { return rm_; } function in class:v8::internal::BASE_EMBEDDED 625 Register rm() const { return rm_; } function in class:v8::internal::BASE_EMBEDDED [all...] |
H A D | disasm-arm.cc | 194 int rm = instr->RmValue(); local 196 PrintRegister(rm); 199 // Special case for using rm only. 315 } else if (format[1] == 'm') { // 'rm: Rm register 713 Format(instr, "mul'cond's 'rn, 'rm, 'rs"); 720 Format(instr, "mla'cond's 'rn, 'rm, 'rs, 'rd"); 726 Format(instr, "mls'cond's 'rn, 'rm, 'rs, 'rd"); 736 Format(instr, "'um'al'cond's 'rd, 'rn, 'rm, 'rs"); 746 Format(instr, "'memop'cond's 'rd, ['rn], -'rm"); 754 Format(instr, "'memop'cond's 'rd, ['rn], +'rm"); [all...] |
H A D | simulator-arm.cc | 2010 int rm = instr->RmValue(); local 2013 int32_t rm_val = get_register(rm); 2019 // Format(instr, "mul'cond's 'rn, 'rm, 'rs"); 2034 // Format(instr, "mla'cond's 'rn, 'rm, 'rs, 'rd"); 2039 // Format(instr, "mls'cond's 'rn, 'rm, 'rs, 'rd"); 2055 // Format(instr, "'um'al'cond's 'rd, 'rn, 'rs, 'rm"); 2090 int rm = instr->RmValue(); local 2091 int32_t rm_val = get_register(rm); 2094 // Format(instr, "'memop'cond'sign'h 'rd, ['rn], -'rm"); 2102 // Format(instr, "'memop'cond'sign'h 'rd, ['rn], +'rm"); 2218 int rm = instr->RmValue(); local 2239 int rm = instr->RmValue(); local 2718 int rm = instr->RmValue(); local [all...] |
/external/chromium_org/v8/src/arm64/ |
H A D | assembler-arm64.cc | 1242 const Register& rm) { 1244 DCHECK(rd.SizeInBits() == rm.SizeInBits()); 1245 Emit(SF(rd) | LSLV | Rm(rm) | Rn(rn) | Rd(rd)); 1251 const Register& rm) { 1253 DCHECK(rd.SizeInBits() == rm.SizeInBits()); 1254 Emit(SF(rd) | LSRV | Rm(rm) | Rn(rn) | Rd(rd)); 1260 const Register& rm) { 1262 DCHECK(rd.SizeInBits() == rm.SizeInBits()); 1263 Emit(SF(rd) | ASRV | Rm(rm) | Rn(rn) | Rd(rd)); 1269 const Register& rm) { 1240 lslv(const Register& rd, const Register& rn, const Register& rm) argument 1249 lsrv(const Register& rd, const Register& rn, const Register& rm) argument 1258 asrv(const Register& rd, const Register& rn, const Register& rm) argument 1267 rorv(const Register& rd, const Register& rn, const Register& rm) argument 1316 extr(const Register& rd, const Register& rn, const Register& rm, unsigned lsb) argument 1328 csel(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument 1336 csinc(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument 1344 csinv(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument 1352 csneg(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument 1392 ConditionalSelect(const Register& rd, const Register& rn, const Register& rm, Condition cond, ConditionalSelectOp op) argument 1419 DataProcessing3Source(const Register& rd, const Register& rn, const Register& rm, const Register& ra, DataProcessing3SourceOp op) argument 1428 mul(const Register& rd, const Register& rn, const Register& rm) argument 1437 madd(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument 1446 mneg(const Register& rd, const Register& rn, const Register& rm) argument 1455 msub(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument 1464 smaddl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument 1474 smsubl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument 1484 umaddl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument 1494 umsubl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument 1504 smull(const Register& rd, const Register& rn, const Register& rm) argument 1513 smulh(const Register& rd, const Register& rn, const Register& rm) argument 1521 sdiv(const Register& rd, const Register& rn, const Register& rm) argument 1530 udiv(const Register& rd, const Register& rn, const Register& rm) argument 1726 mov(const Register& rd, const Register& rm) argument [all...] |
H A D | disasm-arm64.cc | 1660 unsigned rm = instr->Rm(); local 1661 if (rm == kZeroRegCode) { 1664 AppendToOutput("%c%d", reg_type, rm);
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H A D | macro-assembler-arm64-inl.h | 324 const Register& rm) { 327 asrv(rd, rn, rm); 483 const Register& rm, 488 csinc(rd, rn, rm, cond); 494 const Register& rm, 499 csinv(rd, rn, rm, cond); 505 const Register& rm, 510 csneg(rd, rn, rm, cond); 534 const Register& rm, 538 extr(rd, rn, rm, ls 322 Asr(const Register& rd, const Register& rn, const Register& rm) argument 481 Csinc(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument 492 Csinv(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument 503 Csneg(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument 532 Extr(const Register& rd, const Register& rn, const Register& rm, unsigned lsb) argument 897 Lsl(const Register& rd, const Register& rn, const Register& rm) argument 915 Lsr(const Register& rd, const Register& rn, const Register& rm) argument 924 Madd(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument 934 Mneg(const Register& rd, const Register& rn, const Register& rm) argument 975 Msub(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument 985 Mul(const Register& rd, const Register& rn, const Register& rm) argument 1039 Ror(const Register& rd, const Register& rn, const Register& rm) argument 1076 Sdiv(const Register& rd, const Register& rn, const Register& rm) argument 1085 Smaddl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument 1095 Smsubl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument 1105 Smull(const Register& rd, const Register& rn, const Register& rm) argument 1114 Smulh(const Register& rd, const Register& rn, const Register& rm) argument 1180 Udiv(const Register& rd, const Register& rn, const Register& rm) argument 1189 Umaddl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument 1199 Umsubl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument [all...] |
H A D | macro-assembler-arm64.cc | 842 void MacroAssembler::Abs(const Register& rd, const Register& rm, argument 846 DCHECK(AreSameSizeAndType(rd, rm)); 848 Cmp(rm, 1); 849 Cneg(rd, rm, lt); 852 // representable by rm, and the mathematical result of abs(rm) is not
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H A D | simulator-arm64.cc | 2012 T rm = reg<T>(instr->Rm()); local 2013 if ((rn == std::numeric_limits<T>::min()) && (rm == -1)) { 2015 } else if (rm == 0) { 2019 result = rn / rm; 2027 unsignedT rm = static_cast<unsignedT>(reg<T>(instr->Rm())); local 2028 if (rm == 0) { 2032 result = rn / rm;
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