Searched refs:ADDIU (Results 1 - 12 of 12) sorted by last modified time

/external/valgrind/main/none/tests/mips64/
H A Darithmetic_instruction.c6 ADD=0, ADDI, ADDIU, ADDU, enumerator in enum:__anon33128
45 case ADDIU:
/external/pcre/dist/sljit/
H A DsljitNativeMIPS_32.c35 return push_inst(compiler, ADDIU | SA(0) | TA(dst_ar) | IMM(imm), dst_ar);
143 FAIL_IF(push_inst(compiler, ADDIU | SA(0) | T(dst) | IMM(-1), DR(dst)));
145 FAIL_IF(push_inst(compiler, ADDIU | S(dst) | T(dst) | IMM(1), DR(dst)));
162 FAIL_IF(push_inst(compiler, ADDIU | S(src1) | TA(EQUAL_FLAG) | IMM(src2), EQUAL_FLAG));
167 FAIL_IF(push_inst(compiler, ADDIU | SA(0) | TA(ULESS_FLAG) | IMM(src2), ULESS_FLAG));
173 FAIL_IF(push_inst(compiler, ADDIU | S(src1) | T(dst) | IMM(src2), DR(dst)));
203 FAIL_IF(push_inst(compiler, ADDIU | SA(0) | TA(OVERFLOW_FLAG) | IMM(src2), OVERFLOW_FLAG));
207 FAIL_IF(push_inst(compiler, ADDIU | S(src1) | T(dst) | IMM(src2), DR(dst)));
228 FAIL_IF(push_inst(compiler, ADDIU | SA(0) | T(TMP_REG2) | IMM(src2), DR(TMP_REG2)));
241 FAIL_IF(push_inst(compiler, ADDIU |
[all...]
H A DsljitNativeMIPS_64.c41 return push_inst(compiler, ADDIU | SA(0) | TA(dst_ar) | IMM(imm), dst_ar);
235 FAIL_IF(push_inst(compiler, SELECT_OP(DADDIU, ADDIU) | SA(0) | T(dst) | IMM(-1), DR(dst)));
237 FAIL_IF(push_inst(compiler, SELECT_OP(DADDIU, ADDIU) | S(dst) | T(dst) | IMM(1), DR(dst)));
254 FAIL_IF(push_inst(compiler, SELECT_OP(DADDIU, ADDIU) | S(src1) | TA(EQUAL_FLAG) | IMM(src2), EQUAL_FLAG));
259 FAIL_IF(push_inst(compiler, SELECT_OP(DADDIU, ADDIU) | SA(0) | TA(ULESS_FLAG) | IMM(src2), ULESS_FLAG));
265 FAIL_IF(push_inst(compiler, SELECT_OP(DADDIU, ADDIU) | S(src1) | T(dst) | IMM(src2), DR(dst)));
295 FAIL_IF(push_inst(compiler, SELECT_OP(DADDIU, ADDIU) | SA(0) | TA(OVERFLOW_FLAG) | IMM(src2), OVERFLOW_FLAG));
299 FAIL_IF(push_inst(compiler, SELECT_OP(DADDIU, ADDIU) | S(src1) | T(dst) | IMM(src2), DR(dst)));
320 FAIL_IF(push_inst(compiler, ADDIU | SA(0) | T(TMP_REG2) | IMM(src2), DR(TMP_REG2)));
333 FAIL_IF(push_inst(compiler, SELECT_OP(DADDIU, ADDIU) |
[all...]
H A DsljitNativeMIPS_common.c100 #define ADDIU (HI(9)) macro
188 #define ADDIU_W ADDIU
/external/chromium_org/v8/src/mips/
H A Dassembler-mips.cc275 const Instr kPopInstruction = ADDIU | (kRegister_sp_Code << kRsShift)
279 const Instr kPushInstruction = ADDIU | (kRegister_sp_Code << kRsShift)
650 return ((instr & kOpcodeMask) == ADDIU);
1476 GenInstrImmediate(ADDIU, rs, rd, j);
H A Dconstants-mips.cc298 case ADDIU:
H A Dconstants-mips.h325 ADDIU = ((1 << 3) + 1) << kOpcodeShift,
H A Dsimulator-mips.cc2823 case ADDIU:
2953 case ADDIU:
/external/chromium_org/v8/src/mips64/
H A Dassembler-mips64.cc622 return ((instr & kOpcodeMask) == ADDIU || (instr & kOpcodeMask) == DADDIU);
1455 GenInstrImmediate(ADDIU, rs, rd, j);
H A Dconstants-mips64.cc315 case ADDIU:
H A Dconstants-mips64.h290 ADDIU = ((1 << 3) + 1) << kOpcodeShift,
H A Dsimulator-mips64.cc2953 case ADDIU: {
3102 case ADDIU:

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