/external/vixl/src/a64/ |
H A D | assembler-a64.cc | 433 Emit(BR | Rn(xn));
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H A D | constants-a64.h | 504 BR = UnconditionalBranchToRegisterFixed | 0x001F0000, enumerator in enum:vixl::UnconditionalBranchToRegisterOp
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H A D | disasm-a64.cc | 551 case BR: mnemonic = "br"; break;
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H A D | simulator-a64.cc | 549 case BR:
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/external/skia/samplecode/ |
H A D | SamplePatch.cpp | 84 const int BR = TR + nv; local 85 const int BL = BR + nu; 96 SkScalarMul(Uv, edge[BL].fX) + SkScalarMul(uv, edge[BR].fX); 98 SkScalarMul(Uv, edge[BL].fY) + SkScalarMul(uv, edge[BR].fY); 102 SkScalarMul(v, edge[BR+nu-iu].fX) + 106 SkScalarMul(v, edge[BR+nu-iu].fY) +
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/external/qemu/distrib/jpeg-6b/ |
H A D | jcphuff.c | 625 unsigned int BR; local 663 BR = 0; /* BR = count of buffered bits added now */ 680 emit_buffered_bits(entropy, BR_buffer, BR); 682 BR = 0; 692 BR_buffer[BR++] = (char) (temp & 1); 707 emit_buffered_bits(entropy, BR_buffer, BR); 709 BR = 0; 713 if (r > 0 || BR > 0) { /* If there are trailing zeroes, */ 715 entropy->BE += BR; /* conca [all...] |
/external/owasp/sanitizer/lib/htmlparser-1.3/ |
H A D | htmlparser-1.3-with-transitions.jar | META-INF/MANIFEST.MF nu/validator/htmlparser/tools/XSLT4HTML5XOM.class XSLT4HTML5XOM.java package nu. ... |
H A D | htmlparser-1.3.jar | META-INF/MANIFEST.MF nu/validator/htmlparser/tools/XSLT4HTML5XOM.class XSLT4HTML5XOM.java package nu. ... |
/external/pcre/dist/sljit/ |
H A D | sljitNativeARM_64.c | 76 #define BR 0xd61f0000 macro 1869 PTR_FAIL_IF(push_inst(compiler, ((type >= SLJIT_FAST_CALL) ? BLR : BR) | RN(TMP_REG1))); 1904 PTR_FAIL_IF(push_inst(compiler, BR | RN(TMP_REG1))); 1922 return push_inst(compiler, ((type >= SLJIT_FAST_CALL) ? BLR : BR) | RN(src)); 1932 return push_inst(compiler, ((type >= SLJIT_FAST_CALL) ? BLR : BR) | RN(TMP_REG1));
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/external/pdfium/core/src/fxcodec/libjpeg/ |
H A D | fpdfapi_jcphuff.c | 626 unsigned int BR;
local 664 BR = 0; /* BR = count of buffered bits added now */
681 emit_buffered_bits(entropy, BR_buffer, BR);
683 BR = 0;
693 BR_buffer[BR++] = (char) (temp & 1);
708 emit_buffered_bits(entropy, BR_buffer, BR);
710 BR = 0;
714 if (r > 0 || BR > 0) { /* If there are trailing zeroes, */
716 entropy->BE += BR; /* conca [all...] |
/external/llvm/include/llvm/CodeGen/ |
H A D | ISDOpcodes.h | 509 /// BR - Unconditional branch. The first operand is the chain 511 BR, enumerator in enum:llvm::ISD::NodeType
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGBuilder.cpp | 1575 DAG.setRoot(DAG.getNode(ISD::BR, getCurSDLoc(), 1717 BrCond = DAG.getNode(ISD::BR, dl, MVT::Other, BrCond, 1786 BrCond = DAG.getNode(ISD::BR, getCurSDLoc(), MVT::Other, BrCond, 1839 SDValue Br = DAG.getNode(ISD::BR, getCurSDLoc(), 1921 BrRange = DAG.getNode(ISD::BR, getCurSDLoc(), MVT::Other, CopyTo, 1986 BrAnd = DAG.getNode(ISD::BR, getCurSDLoc(), MVT::Other, BrAnd, 2018 DAG.setRoot(DAG.getNode(ISD::BR, getCurSDLoc(), 2134 BrCond = DAG.getNode(ISD::BR, DL, MVT::Other, BrCond, 2693 DAG.setRoot(DAG.getNode(ISD::BR, getCurSDLoc(),
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H A D | SelectionDAGDumper.cpp | 258 case ISD::BR: return "br";
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64AsmPrinter.cpp | 468 TmpInst.setOpcode(AArch64::BR);
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H A D | AArch64FastISel.cpp | 871 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AArch64::BR))
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H A D | AArch64ISelLowering.cpp | 7624 SDValue BR; 7626 BR = DAG.getNode(AArch64ISD::CBZ, SDLoc(N), MVT::Other, Chain, LHS, Dest); 7628 BR = DAG.getNode(AArch64ISD::CBNZ, SDLoc(N), MVT::Other, Chain, LHS, Dest); 7631 DCI.CombineTo(N, BR, false);
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H A D | AArch64InstrInfo.h | 227 static inline bool isIndirectBranchOpcode(int Opc) { return Opc == AArch64::BR; }
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 8444 return DAG.getNode(ISD::BR, dl, MVT::Other,
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/external/llvm/lib/Target/R600/ |
H A D | SIISelLowering.cpp | 764 /// last parameter, also switches branch target with BR if the need arise 772 SDNode *BR = nullptr; local 783 // Get the target from BR if we don't negate the condition 784 BR = findUser(BRCOND, ISD::BR); 785 Target = BR->getOperand(1); 807 if (BR) { 810 BR->getOperand(0), 813 DAG.MorphNodeTo(BR, ISD::BR, B [all...] |
/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZAsmPrinter.cpp | 74 LoweredMI = MCInstBuilder(SystemZ::BR).addReg(SystemZ::R14D); 95 LoweredMI = MCInstBuilder(SystemZ::BR).addReg(SystemZ::R1D);
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H A D | SystemZInstrInfo.cpp | 1043 case SystemZ::BR:
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/external/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 12989 if (User->getOpcode() == ISD::BR) { 13030 if (User->getOpcode() == ISD::BR) { 13061 if (User->getOpcode() == ISD::BR) {
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/external/llvm/lib/Transforms/IPO/ |
H A D | PartialInlining.cpp | 54 BranchInst *BR = dyn_cast<BranchInst>(entryBlock->getTerminator()); local 55 if (!BR || BR->isUnconditional())
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/external/libyuv/files/source/ |
H A D | row_common.cc | 439 #define BR UR * 128 + VR * 128 macro 455 uint32 r = Clip(static_cast<int32>((u * UR + v * VR) - (BR) + y1) >> 6); 467 *r = Clip(static_cast<int32>((u * UR + v * VR) - (BR) + y1) >> 6);
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H A D | row_posix.cc | 1287 #define BR UR * 128 + VR * 128 macro 1309 { BR, BR, BR, BR, BR, BR, BR, BR },
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