Searched refs:DL (Results 1 - 25 of 379) sorted by last modified time

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/external/valgrind/main/none/tests/s390x/
H A Ddfp-1.c103 d128_1 = 3.14DL;
104 d128_2 = 0.005DL;
108 d128_1 = -3.14DL;
109 d128_2 = 0.005DL;
113 d128_1 = 3.14DL;
121 d128_1 = 3.14DL;
122 d128_2 = 0.005DL;
126 d128_1 = -3.14DL;
127 d128_2 = 0.005DL;
131 d128_1 = 3.14DL;
[all...]
H A Ddfp-2.c278 _Decimal128 d128 = 50.0005DL;
285 eextr(0.DL);
292 esxtr(0.DL);
299 ltxtr(0.0DL);
312 d128 = 12345678.54321DL;
315 slxt(0.DL, 2);
316 slxt(-0.DL, 2);
320 srxt(0.DL, 2);
321 srxt(-0.DL, 2);
334 d128 = 5.000005DL;
[all...]
H A Ddfp-3.c72 d128_1 = 5.00005DL;
73 d128_2 = 5000000000000000.5DL;
102 d128_1 = 5.00005DL;
103 d128_2 = 5000000000000000.5DL;
H A Ddfp-4.c15 d128_1 = 100000000.000028DL;
H A Dpfpo.c68 _Decimal128 d128_in[] = {1234567812345678912345678912.5656789DL,
/external/qemu/disas/
H A Di386.c401 #define DL { OP_IMREG, dl_reg } macro
/external/qemu-pc-bios/bochs/bios/
H A Drombios.c118 // - int13 Fix DL when emulating a cd. In that case DL is decremented before calling real int13.
119 // This is ok. But DL should be reincremented afterwards.
6069 BX_INFO("int13_cdemu: function %02x, emulation not active for DL= %02x\n", GET_AH(), GET_DL());
6326 /* at this point, DL is >= 0x80 to be passed from the floppy int13h
7991 // check bit 5 in CMOS reg 0x2d. load either 0x00 or 0x80 into DL
8858 mov dl, al ;; DL = sectors
9002 mov dl, al ;; DL = sectors
/external/qemu-pc-bios/vgabios/
H A Dvgabios.c2774 static void biosfn_load_gfx_user_chars (ES,BP,CX,BL,DL) Bit16u ES;Bit16u BP;Bit16u CX;Bit8u BL;Bit8u DL;
/external/owasp/sanitizer/lib/htmlparser-1.3/
H A Dhtmlparser-1.3-with-transitions.jarMETA-INF/MANIFEST.MF nu/validator/htmlparser/tools/XSLT4HTML5XOM.class XSLT4HTML5XOM.java package nu. ...
H A Dhtmlparser-1.3.jarMETA-INF/MANIFEST.MF nu/validator/htmlparser/tools/XSLT4HTML5XOM.class XSLT4HTML5XOM.java package nu. ...
/external/mesa3d/src/mesa/x86/
H A Dassyntax.h105 #define DL dl macro
167 #define DL %dl macro
838 #define B_DL DL
/external/mesa3d/src/gallium/drivers/radeon/
H A DAMDGPUISelLowering.cpp53 DebugLoc DL, SelectionDAG &DAG,
70 DebugLoc DL, SelectionDAG &DAG) const
72 return DAG.getNode(AMDGPUISD::RET_FLAG, DL, MVT::Other, Chain);
105 DebugLoc DL = Op.getDebugLoc(); local
113 return DAG.getNode(ISD::FEXP2, DL, VT, Op.getOperand(1));
115 return DAG.getNode(ISD::FABS, DL, VT, Op.getOperand(1));
119 return DAG.getNode(AMDGPUISD::FRACT, DL, VT, Op.getOperand(1));
121 return DAG.getNode(AMDGPUISD::MAD, DL, VT, Op.getOperand(1),
124 return DAG.getNode(AMDGPUISD::FMAX, DL, VT, Op.getOperand(1),
127 return DAG.getNode(AMDGPUISD::SMAX, DL, V
48 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, DebugLoc DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
64 LowerReturn( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, DebugLoc DL, SelectionDAG &DAG) const argument
153 DebugLoc DL = Op.getDebugLoc(); local
166 DebugLoc DL = Op.getDebugLoc(); local
183 DebugLoc DL = Op.getDebugLoc(); local
[all...]
H A DAMDGPUISelLowering.h47 DebugLoc DL, SelectionDAG &DAG,
54 DebugLoc DL, SelectionDAG &DAG) const;
H A DAMDGPUInstrInfo.cpp239 DebugLoc DL) const
H A DAMDGPUInstrInfo.h74 MachineBasicBlock::iterator MI, DebugLoc DL,
142 DebugLoc DL) const;
H A DAMDILCFGStructurizer.cpp1706 DebugLoc DL = branchInstr->getDebugLoc(); local
1729 CFGTraits::insertCondBranchBefore(branchInstrPos, newOpcode, passRep, DL);
1735 CFGTraits::insertCondBranchBefore(branchInstrPos, newOpcode, passRep, DL);
1779 DebugLoc DL = branchInstr->getDebugLoc(); local
1800 CFGTraits::insertCondBranchBefore(branchInstrPos, branchOpcode, passRep, DL);
1805 CFGTraits::insertInstrEnd(contingBlk, AMDGPU::BREAK, passRep, DL);
1808 CFGTraits::insertInstrEnd(contingBlk, AMDGPU::CONTINUE, passRep, DL);
1811 CFGTraits::insertInstrEnd(contingBlk, AMDGPU::ENDIF, passRep, DL);
1817 CFGTraits::insertCondBranchBefore(branchInstrPos, branchOpcode, passRep, DL);
1966 DebugLoc DL; local
2903 DebugLoc DL; local
3011 insertInstrBefore(MachineBasicBlock *blk, int newOpcode, AMDGPUCFGStructurizer *passRep, DebugLoc DL) argument
3034 insertInstrEnd(MachineBasicBlock *blk, int newOpcode, AMDGPUCFGStructurizer *passRep, DebugLoc DL) argument
3063 insertCondBranchBefore(MachineBasicBlock::iterator instrPos, int newOpcode, AMDGPUCFGStructurizer *passRep, DebugLoc DL) argument
3082 insertCondBranchBefore(MachineBasicBlock *blk, MachineBasicBlock::iterator insertPos, int newOpcode, AMDGPUCFGStructurizer *passRep, RegiT regNum, DebugLoc DL) argument
[all...]
H A DAMDILISelLowering.cpp361 DebugLoc DL = Op.getDebugLoc(); local
363 DL,
386 DL,
397 DL,
408 DL,
424 DebugLoc DL = Op.getDebugLoc(); local
434 Data = DAG.getNode(ISD::ZERO_EXTEND, DL, IVT, Data);
440 Data = DAG.getNode(ISD::SHL, DL, DVT, Data, Shift);
442 Data = DAG.getNode(ISD::SRA, DL, DVT, Data, Shift);
446 Data = DAG.getSExtOrTrunc(Data, DL, O
491 DebugLoc DL = Op.getDebugLoc(); local
572 DebugLoc DL = Op.getDebugLoc(); local
645 DebugLoc DL = Op.getDebugLoc(); local
663 DebugLoc DL = Op.getDebugLoc(); local
681 DebugLoc DL = Op.getDebugLoc(); local
[all...]
H A DR600ISelLowering.cpp278 DebugLoc DL = Op.getDebugLoc(); local
288 return LowerImplicitParameter(DAG, VT, DL, 0);
290 return LowerImplicitParameter(DAG, VT, DL, 1);
292 return LowerImplicitParameter(DAG, VT, DL, 2);
294 return LowerImplicitParameter(DAG, VT, DL, 3);
296 return LowerImplicitParameter(DAG, VT, DL, 4);
298 return LowerImplicitParameter(DAG, VT, DL, 5);
300 return LowerImplicitParameter(DAG, VT, DL, 6);
302 return LowerImplicitParameter(DAG, VT, DL, 7);
304 return LowerImplicitParameter(DAG, VT, DL,
357 LowerImplicitParameter(SelectionDAG &DAG, EVT VT, DebugLoc DL, unsigned DwordOffset) const argument
376 DebugLoc DL = Op.getDebugLoc(); local
389 DebugLoc DL = Op.getDebugLoc(); local
505 DebugLoc DL = Op.getDebugLoc(); local
[all...]
H A DR600ISelLowering.h39 DebugLoc DL, unsigned DwordOffset) const;
H A DR600InstrInfo.cpp50 MachineBasicBlock::iterator MI, DebugLoc DL,
58 BuildMI(MBB, MI, DL, get(AMDGPU::MOV))
71 BuildMI(MBB, MI, DL, get(AMDGPU::MOV), DestReg)
265 DebugLoc DL) const
271 BuildMI(&MBB, DL, get(AMDGPU::JUMP)).addMBB(TBB).addReg(0);
279 BuildMI(&MBB, DL, get(AMDGPU::JUMP))
289 BuildMI(&MBB, DL, get(AMDGPU::JUMP))
292 BuildMI(&MBB, DL, get(AMDGPU::JUMP)).addMBB(FBB).addReg(0);
49 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const argument
H A DR600InstrInfo.h44 MachineBasicBlock::iterator MI, DebugLoc DL,
71 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const;
H A DSIISelLowering.cpp297 DebugLoc DL = Op.getDebugLoc(); local
299 SDValue OpNode = DAG.getNode(VCCNode, DL, MVT::i64,
300 DAG.getNode(SIISD::VCC_BITCAST, DL, MVT::i64,
302 DAG.getNode(SIISD::VCC_BITCAST, DL, MVT::i64,
305 return DAG.getNode(SIISD::VCC_BITCAST, DL, MVT::i1, OpNode);
382 DebugLoc DL = Op.getDebugLoc(); local
384 SDValue Cond = DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS, CC);
385 return DAG.getNode(ISD::SELECT, DL, VT, Cond, True, False);
395 DebugLoc DL = N->getDebugLoc(); local
409 return DAG.getNode(ISD::SETCC, DL, V
[all...]
H A DSIInstrInfo.cpp38 MachineBasicBlock::iterator MI, DebugLoc DL,
48 BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), DestReg)
37 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const argument
H A DSIInstrInfo.h34 MachineBasicBlock::iterator MI, DebugLoc DL,
/external/lzma/Asm/x86/
H A D7zAsm.asm53 x2_L equ DL

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