Searched refs:v1 (Results 1 - 25 of 1357) sorted by last modified time

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/external/zlib/src/contrib/iostream3/
H A Dzfstream.h424 T1 v1, member in class:gzomanip2
450 T1 v1, variable
452 : func(f), val1(v1), val2(v2)
/external/webrtc/src/common_audio/signal_processing/include/
H A Dsignal_processing_library.h169 #define WEBRTC_SPL_MEMCPY_W8(v1, v2, length) \
170 memcpy(v1, v2, (length) * sizeof(char))
171 #define WEBRTC_SPL_MEMCPY_W16(v1, v2, length) \
172 memcpy(v1, v2, (length) * sizeof(WebRtc_Word16))
174 #define WEBRTC_SPL_MEMMOVE_W16(v1, v2, length) \
175 memmove(v1, v2, (length) * sizeof(WebRtc_Word16))
/external/webrtc/src/system_wrappers/source/
H A Ddata_log_helpers_unittest.cc20 webrtc::ValueContainer<int> v1(c);
24 v1.ToString(&s1);
28 v1 = v2;
29 v1.ToString(&s1);
35 webrtc::ValueContainer<double> v1(c);
39 v1.ToString(&s1);
43 v1 = v2;
44 v1.ToString(&s1);
/external/valgrind/main/none/tests/s390x/
H A Dbfp-3.c6 void maebr(float v1, float v2, float v3) argument
8 float r1 = v1;
12 printf("maebr %f * %f + %f -> %f\n", v2, v3, v1, r1);
15 void madbr(double v1, double v2, double v3) argument
17 double r1 = v1;
21 printf("madbr %f * %f + %f -> %f\n", v2, v3, v1, r1);
24 void msebr(float v1, float v2, float v3) argument
26 float r1 = v1;
30 printf("msebr %f * %f - %f -> %f\n", v2, v3, v1, r1);
33 void msdbr(double v1, doubl argument
[all...]
H A Dbfp-4.c5 void cebr(float v1, float v2) argument
12 : [psw]"=d"(cc) : [r1]"f"(v1), [r2]"f"(v2) : "cc");
14 printf("cfebr: %f == %f\n", v1, v2);
16 printf("cfebr: %f < %f\n", v1, v2);
18 printf("cfebr: %f > %f\n", v1, v2);
21 void cdbr(double v1, double v2) argument
28 : [psw]"=d"(cc) : [r1]"f"(v1), [r2]"f"(v2) : "cc");
30 printf("cdebr: %f == %f\n", v1, v2);
32 printf("cdebr: %f < %f\n", v1, v2);
34 printf("cdebr: %f > %f\n", v1, v
[all...]
H A Dcomp-1.c21 #define SCOMP_REG_REG(insn, v1, v2) \
24 int64_t op1 = v1; \
38 #define SCOMP_REG_MEM(insn, v1, v2, op2_t) \
41 int64_t op1 = v1; \
55 #define SCOMP_REG_IMM(insn, v1, v2) \
58 register int64_t op1 asm("8") = v1; \
H A Dcomp-2.c21 #define SCOMP_REG_REG(insn, v1, v2) \
24 uint64_t op1 = v1; \
38 #define SCOMP_REG_MEM(insn, v1, v2, op2_t) \
41 uint64_t op1 = v1; \
55 #define SCOMP_REG_IMM(insn, v1, v2) \
58 register uint64_t op1 asm("8") = v1; \
H A Ddfp-3.c27 #define COMPARE(insn, v1, v2, type) \
30 CMP_DFP(insn, v1, v2, type, cc); \
31 DFP_VAL_PRINT(v1, type); \
H A Dspechelper-algr.c24 unsigned long v1, v2; local
29 v1 = v2 = 0;
31 if (branch(0, v1, v2)) ++wrong; else ++ok;
32 if (branch(1, v1, v2)) ++wrong; else ++ok;
33 if (branch(2, v1, v2)) ++wrong; else ++ok;
34 if (branch(3, v1, v2)) ++wrong; else ++ok;
35 if (branch(4, v1, v2)) ++wrong; else ++ok;
36 if (branch(5, v1, v2)) ++wrong; else ++ok;
37 if (branch(6, v1, v2)) ++wrong; else ++ok;
38 if (branch(7, v1, v
57 unsigned long v1, v2; local
91 unsigned long v1, v2; local
127 unsigned long v1, v2; local
[all...]
H A Dspechelper-alr.c24 unsigned v1, v2; local
29 v1 = v2 = 0;
31 if (branch(0, v1, v2)) ++wrong; else ++ok;
32 if (branch(1, v1, v2)) ++wrong; else ++ok;
33 if (branch(2, v1, v2)) ++wrong; else ++ok;
34 if (branch(3, v1, v2)) ++wrong; else ++ok;
35 if (branch(4, v1, v2)) ++wrong; else ++ok;
36 if (branch(5, v1, v2)) ++wrong; else ++ok;
37 if (branch(6, v1, v2)) ++wrong; else ++ok;
38 if (branch(7, v1, v
57 unsigned v1, v2; local
91 unsigned v1, v2; local
127 unsigned v1, v2; local
[all...]
H A Dspechelper-clr.c22 int wrong, ok, v1, v2; local
26 v1 = v2 = 42;
29 if (branch(0, v1, v2)) ++wrong; else ++ok;
30 if (branch(1, v1, v2)) ++wrong; else ++ok;
31 if (branch(2, v1, v2)) ++wrong; else ++ok;
32 if (branch(3, v1, v2)) ++wrong; else ++ok;
33 if (branch(4, v1, v2)) ++wrong; else ++ok;
34 if (branch(5, v1, v2)) ++wrong; else ++ok;
35 if (branch(6, v1, v2)) ++wrong; else ++ok;
36 if (branch(7, v1, v
55 int wrong, ok, v1, v2; local
88 int wrong, ok, v1, v2; local
[all...]
H A Dspechelper-cr.c22 int wrong, ok, v1, v2; local
26 v1 = v2 = 42;
29 if (branch(0, v1, v2)) ++wrong; else ++ok;
30 if (branch(1, v1, v2)) ++wrong; else ++ok;
31 if (branch(2, v1, v2)) ++wrong; else ++ok;
32 if (branch(3, v1, v2)) ++wrong; else ++ok;
33 if (branch(4, v1, v2)) ++wrong; else ++ok;
34 if (branch(5, v1, v2)) ++wrong; else ++ok;
35 if (branch(6, v1, v2)) ++wrong; else ++ok;
36 if (branch(7, v1, v
55 int wrong, ok, v1, v2; local
88 int wrong, ok, v1, v2; local
[all...]
H A Dspechelper-icm-1.c27 unsigned v1; local
31 v1 = 0xFFFFFFFF;
34 if (branch(0, 0, v1)) ++wrong; else ++ok;
35 if (branch(1, 0, v1)) ++wrong; else ++ok;
36 if (branch(2, 0, v1)) ++wrong; else ++ok;
37 if (branch(3, 0, v1)) ++wrong; else ++ok;
38 if (branch(4, 0, v1)) ++wrong; else ++ok;
39 if (branch(5, 0, v1)) ++wrong; else ++ok;
40 if (branch(6, 0, v1)) ++wrong; else ++ok;
41 if (branch(7, 0, v1))
61 unsigned v1; local
96 unsigned v1; local
182 unsigned v1; local
302 unsigned v1; local
388 unsigned v1; local
422 int wrong, ok, v1; local
508 unsigned v1; local
629 unsigned v1; local
715 unsigned v1; local
[all...]
H A Dspechelper-icm-2.c27 unsigned v1; local
31 v1 = 0xFFFFFFFF;
34 if (branch(0, 0, v1)) ++wrong; else ++ok;
35 if (branch(1, 0, v1)) ++wrong; else ++ok;
36 if (branch(2, 0, v1)) ++wrong; else ++ok;
37 if (branch(3, 0, v1)) ++wrong; else ++ok;
38 if (branch(4, 0, v1)) ++wrong; else ++ok;
39 if (branch(5, 0, v1)) ++wrong; else ++ok;
40 if (branch(6, 0, v1)) ++wrong; else ++ok;
41 if (branch(7, 0, v1))
61 unsigned v1; local
96 unsigned v1; local
182 unsigned v1; local
302 unsigned v1; local
388 unsigned v1; local
422 int wrong, ok, v1; local
508 unsigned v1; local
629 unsigned v1; local
715 unsigned v1; local
[all...]
H A Dspechelper-ltr.c22 int wrong, ok, v1; local
26 v1 = 0;
28 if (branch(0, v1)) ++wrong; else ++ok;
29 if (branch(1, v1)) ++wrong; else ++ok;
30 if (branch(2, v1)) ++wrong; else ++ok;
31 if (branch(3, v1)) ++wrong; else ++ok;
32 if (branch(4, v1)) ++wrong; else ++ok;
33 if (branch(5, v1)) ++wrong; else ++ok;
34 if (branch(6, v1)) ++wrong; else ++ok;
35 if (branch(7, v1))
54 int wrong, ok, v1; local
85 int wrong, ok, v1; local
[all...]
H A Dspechelper-or.c22 int wrong, ok, v1, v2; local
26 v1 = v2 = 0;
28 if (branch(0, v1, v2)) ++wrong; else ++ok;
29 if (branch(1, v1, v2)) ++wrong; else ++ok;
30 if (branch(2, v1, v2)) ++wrong; else ++ok;
31 if (branch(3, v1, v2)) ++wrong; else ++ok;
32 if (branch(4, v1, v2)) ++wrong; else ++ok;
33 if (branch(5, v1, v2)) ++wrong; else ++ok;
34 if (branch(6, v1, v2)) ++wrong; else ++ok;
35 if (branch(7, v1, v
54 int wrong, ok, v1, v2; local
[all...]
H A Dspechelper-slgr.c28 unsigned long v1, v2; local
33 v1 = v2 = 42;
36 if (branch(0, v1, v2)) ++wrong; else ++ok;
37 if (branch(1, v1, v2)) ++wrong; else ++ok;
38 if (branch(2, v1, v2)) ++ok; else ++wrong;
39 if (branch(3, v1, v2)) ++ok; else ++wrong;
40 if (branch(4, v1, v2)) ++wrong; else ++ok;
41 if (branch(5, v1, v2)) ++wrong; else ++ok;
42 if (branch(6, v1, v2)) ++ok; else ++wrong;
43 if (branch(7, v1, v
62 unsigned long v1, v2; local
98 unsigned long v1, v2; local
[all...]
H A Dspechelper-slr.c26 unsigned int v1, v2; local
31 v1 = v2 = 0xffffffff;
34 if (branch(0, v1, v2)) ++wrong; else ++ok;
35 if (branch(1, v1, v2)) ++wrong; else ++ok;
36 if (branch(2, v1, v2)) ++ok; else ++wrong;
37 if (branch(3, v1, v2)) ++ok; else ++wrong;
38 if (branch(4, v1, v2)) ++wrong; else ++ok;
39 if (branch(5, v1, v2)) ++wrong; else ++ok;
40 if (branch(6, v1, v2)) ++ok; else ++wrong;
41 if (branch(7, v1, v
60 unsigned int v1, v2; local
96 unsigned int v1, v2; local
[all...]
H A Dspechelper-tm.c6 unsigned char v1 = _v1; \
14 : [v] "Q"(v1) \
H A Dspechelper-tmll.c6 unsigned long v1 = _v1; \
14 : [v] "d"(v1) \
/external/valgrind/main/none/tests/x86/
H A Dx86locked.c209 int o, s, z, a, c, p, v1, v2, flags_in; \
212 for (v1 = 0; v1 < NVALS; v1++) { \
229 g_val = val[v1]; \
/external/valgrind/main/perf/
H A Dtinycc.c5740 SValue v1;
5749 v1.type.t = VT_INT;
5750 v1.r = VT_LOCAL | VT_LVAL;
5751 v1.c.ul = fc;
5752 load(r, &v1);
6383 SValue v1;
6385 v1.type.t = VT_INT;
6386 v1.r = VT_LOCAL | VT_LVAL;
6387 v1.c.ul = fc;
6388 load(r, &v1);
5738 SValue v1; local
6381 SValue v1; local
10978 SValue *v1, *v2; local
11093 SValue *v1, *v2; local
13726 int v1, v2; local
[all...]
/external/vixl/src/a64/
H A Dsimulator-a64.cc166 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
1226 int64_t u1, v1, w1, w2, t; local
1231 v1 = v >> 32;
1237 w1 = u0 * v1 + w1;
1239 return u1 * v1 + w2 + (w1 >> 32);
/external/webp/src/dec/
H A Dvp8l.c500 const uint32_t v1 = src[2 * i + 1]; local
502 // scale r/g/b value by a factor 2. We just shift v0/v1 one bit less.
503 const int r = ((v0 >> 15) & 0x1fe) + ((v1 >> 15) & 0x1fe);
504 const int g = ((v0 >> 7) & 0x1fe) + ((v1 >> 7) & 0x1fe);
505 const int b = ((v0 << 1) & 0x1fe) + ((v1 << 1) & 0x1fe);
/external/webp/src/dsp/
H A Ddec_neon.c337 uint8x8x3_t u0, u1, v0, v1; local
341 INIT_VECTOR3(v1, vget_high_u8(q0), vget_high_u8(q1), vget_high_u8(q2));
350 STORE6_LANE(v, v0, v1, 0);
351 STORE6_LANE(v, v0, v1, 1);
352 STORE6_LANE(v, v0, v1, 2);
353 STORE6_LANE(v, v0, v1, 3);
354 STORE6_LANE(v, v0, v1, 4);
355 STORE6_LANE(v, v0, v1, 5);
356 STORE6_LANE(v, v0, v1, 6);
357 STORE6_LANE(v, v0, v1,
[all...]

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