/external/valgrind/main/memcheck/tests/amd64-linux/ |
H A D | int3-amd64.stdout.exp | 2 in int_handler, RIP is ...
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/external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/x86/tests/ |
H A D | riprel1.asm | 45 mov rax, [val] ; 48 8b ... (32-bit disp, RIP-rel) 46 mov rax, [dword val] ; 48 8b ... (32-bit disp, RIP-rel) 48 a32 mov rax, [val] ; 67 48 8b ... (32-bit disp, RIP-rel) 49 a32 mov rax, [dword val] ; 67 48 8b ... (32-bit disp, RIP-rel) 53 a64 mov rax, [val] ; 48 8b ... (32-bit disp, RIP-rel) 54 a64 mov rax, [dword val] ; 48 8b ... (32-bit disp, RIP-rel) 57 mov rbx, [val] ; 48 8b ... (32-bit disp, RIP-rel) 58 mov rbx, [dword val] ; 48 8b ... (32-bit disp, RIP-rel) 60 a32 mov rbx, [val] ; 67 48 8b ... (32-bit disp, RIP-rel) 61 a32 mov rbx, [dword val] ; 67 48 8b ... (32-bit disp, RIP [all...] |
/external/kernel-headers/original/uapi/asm-x86/asm/ |
H A D | ptrace-abi.h | 47 #define RIP 128 macro
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/external/libunwind/src/x86_64/ |
H A D | init.h | 65 c->dwarf.loc[RIP] = REG_INIT_LOC(c, rip, RIP); 67 ret = dwarf_get (&c->dwarf, c->dwarf.loc[RIP], &c->dwarf.ip); 80 c->dwarf.ret_addr_column = RIP;
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H A D | Gstep.c | 132 c->dwarf.loc[RIP] = DWARF_LOC (c->dwarf.cfa, 0); 196 c->dwarf.loc[RIP] = rip_loc; 199 c->dwarf.ret_addr_column = RIP; 207 if (!DWARF_IS_NULL_LOC (c->dwarf.loc[RIP])) 209 ret = dwarf_get (&c->dwarf, c->dwarf.loc[RIP], &c->dwarf.ip); 210 Debug (1, "Frame Chain [RIP=0x%Lx] = 0x%Lx\n", 211 (unsigned long long) DWARF_GET_LOC (c->dwarf.loc[RIP]),
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H A D | Gos-freebsd.c | 51 /* Check if RIP points at sigreturn sequence. 74 /* Check if RIP points at standard syscall sequence. 127 c->dwarf.loc[RIP] = DWARF_LOC (ucontext + UC_MCONTEXT_GREGS_RIP, 0); 136 c->dwarf.loc[RIP] = DWARF_LOC (c->dwarf.cfa, 0); 137 ret = dwarf_get (&c->dwarf, c->dwarf.loc[RIP], &c->dwarf.ip); 138 Debug (1, "Frame Chain [RIP=0x%Lx] = 0x%Lx\n", 139 (unsigned long long) DWARF_GET_LOC (c->dwarf.loc[RIP]),
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H A D | unwind_i.h | 55 #define RIP 16 macro
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H A D | Gregs.c | 77 c->dwarf.ip = *valp; /* also update the RIP cache */ 78 loc = c->dwarf.loc[RIP];
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H A D | Gstash_frame.c | 80 /* Later we are going to fish out {RBP,RSP,RIP} from sigcontext via 87 assert (DWARF_GET_LOC(d->loc[RIP]) - uc == UC_MCONTEXT_GREGS_RIP);
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/external/ltrace/sysdeps/linux-gnu/x86/ |
H A D | regs.c | 43 # define XIP (8 * RIP)
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/external/llvm/lib/Target/X86/MCTargetDesc/ |
H A D | X86MCTargetDesc.cpp | 248 ? X86::RIP // Should have dwarf #16. 293 unsigned InstPtr = is64Bit ? X86::RIP : X86::EIP;
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H A D | X86AsmBackend.cpp | 253 // Check if it has an expression and is not RIP relative. 261 if (Op.isReg() && Op.getReg() == X86::RIP)
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/external/llvm/lib/Target/X86/ |
H A D | X86RegisterInfo.cpp | 58 (STI.is64Bit() ? X86::RIP : X86::EIP), 61 (STI.is64Bit() ? X86::RIP : X86::EIP)), 335 for (MCSubRegIterator I(X86::RIP, this, /*IncludeSelf=*/true); I.isValid();
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H A D | X86CodeEmitter.cpp | 430 // But it's probably not beneficial. If the MCE supports using RIP directly 485 if (BaseReg == X86::RIP || 486 (Is64BitMode && DispForReloc)) { // [disp32+RIP] in X86-64 mode 496 // while others, unless explicit asked to use RIP, use absolute references. 500 // If no BaseReg, issue a RIP relative instruction only if the MCE can 504 if (BaseReg != 0 && BaseReg != X86::RIP) 514 // byte to emit an addr that is just 'disp32' (the non-RIP relative form). 517 BaseReg == X86::RIP) { // [disp32+RIP] in X86-64 mode
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H A D | X86AsmPrinter.cpp | 242 BaseReg.getReg() == X86::RIP)
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H A D | X86FastISel.cpp | 555 // RIP-relative addresses can't have additional register operands, so if 579 AM.Base.Reg = X86::RIP; 608 StubAM.Base.Reg = X86::RIP; 879 // RIP-relative addresses can't have additional register operands. 902 AM.Base.Reg = X86::RIP; 3265 PICBase = X86::RIP;
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H A D | X86MCInstLower.cpp | 643 LEA.addOperand(MCOperand::CreateReg(X86::RIP)); // base
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/external/llvm/lib/Transforms/ObjCARC/ |
H A D | ObjCARCOpts.cpp | 2448 Instruction *RIP = *RI; local 2449 if (ReleasesToMove.ReverseInsertPts.insert(RIP)) { 2452 const BBState &RIPBBState = BBStates[RIP->getParent()]; 2516 Instruction *RIP = *RI; local 2517 if (RetainsToMove.ReverseInsertPts.insert(RIP)) { 2520 const BBState &RIPBBState = BBStates[RIP->getParent()];
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/external/valgrind/main/VEX/auxprogs/ |
H A D | genoffsets.c | 119 GENOFFSET(AMD64,amd64,RIP);
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/external/valgrind/main/coregrind/m_sigframe/ |
H A D | sigframe-amd64-linux.c | 362 SC2(rip,RIP); 539 "next %%RIP = %#llx, status=%d\n", 640 "VG_(signal_return) (thread %d): isRT=%d valid magic; RIP=%#llx\n",
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/external/libunwind/src/ptrace/ |
H A D | _UPT_reg_offset.c | 309 UNW_R_OFF(RIP, rip)
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/external/llvm/lib/Target/X86/AsmParser/ |
H A D | X86Operand.h | 359 case X86::RIP: return X86::EIP;
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/external/llvm/lib/Target/X86/Disassembler/ |
H A D | X86Disassembler.cpp | 552 baseReg = MCOperand::CreateReg(X86::RIP); // Section 2.2.1.6
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H A D | X86DisassemblerDecoder.h | 379 ENTRY(RIP)
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/external/iproute2/doc/ |
H A D | ip-tunnels.tex | 92 with ttl 1 will reach peering host (f.e.\ RIP, OSPF or EBGP)
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