compiler_enums.h revision 2c498d1f28e62e81fbdb477ff93ca7454e7493d7 
1/*
2 * Copyright (C) 2012 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 *      http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#ifndef ART_COMPILER_DEX_COMPILER_ENUMS_H_
18#define ART_COMPILER_DEX_COMPILER_ENUMS_H_
19
20#include "dex_instruction.h"
21
22namespace art {
23
24enum RegisterClass {
25  kCoreReg,
26  kFPReg,
27  kAnyReg,
28};
29
30enum SpecialTargetRegister {
31  kSelf,            // Thread pointer.
32  kSuspend,         // Used to reduce suspend checks for some targets.
33  kLr,
34  kPc,
35  kSp,
36  kArg0,
37  kArg1,
38  kArg2,
39  kArg3,
40  kFArg0,
41  kFArg1,
42  kFArg2,
43  kFArg3,
44  kRet0,
45  kRet1,
46  kInvokeTgt,
47  kHiddenArg,
48  kHiddenFpArg,
49  kCount
50};
51
52enum RegLocationType {
53  kLocDalvikFrame = 0,  // Normal Dalvik register
54  kLocPhysReg,
55  kLocCompilerTemp,
56  kLocInvalid
57};
58
59/**
60 * Support for vector registers.  Initially used for x86 floats.  This will be used
61 * to replace the assumption that a double takes up 2 single FP registers
62 */
63enum VectorLengthType {
64  kVectorNotUsed = 0,   // This value is NOT in a vector register.
65  kVectorLength4,       // The value occupies 4 bytes in a vector register.
66  kVectorLength8,       // The value occupies 8 bytes in a vector register.
67  kVectorLength16       // The value occupies 16 bytes in a vector register (unused now).
68};
69
70enum BBType {
71  kNullBlock,
72  kEntryBlock,
73  kDalvikByteCode,
74  kExitBlock,
75  kExceptionHandling,
76  kDead,
77};
78
79/*
80 * Def/Use encoding in 64-bit use_mask/def_mask.  Low positions used for target-specific
81 * registers (and typically use the register number as the position).  High positions
82 * reserved for common and abstract resources.
83 */
84
85enum ResourceEncodingPos {
86  kMustNotAlias = 63,
87  kHeapRef = 62,          // Default memory reference type.
88  kLiteral = 61,          // Literal pool memory reference.
89  kDalvikReg = 60,        // Dalvik v_reg memory reference.
90  kFPStatus = 59,
91  kCCode = 58,
92  kLowestCommonResource = kCCode
93};
94
95// Shared pseudo opcodes - must be < 0.
96enum LIRPseudoOpcode {
97  kPseudoExportedPC = -16,
98  kPseudoSafepointPC = -15,
99  kPseudoIntrinsicRetry = -14,
100  kPseudoSuspendTarget = -13,
101  kPseudoThrowTarget = -12,
102  kPseudoCaseLabel = -11,
103  kPseudoMethodEntry = -10,
104  kPseudoMethodExit = -9,
105  kPseudoBarrier = -8,
106  kPseudoEntryBlock = -7,
107  kPseudoExitBlock = -6,
108  kPseudoTargetLabel = -5,
109  kPseudoDalvikByteCodeBoundary = -4,
110  kPseudoPseudoAlign4 = -3,
111  kPseudoEHBlockLabel = -2,
112  kPseudoNormalBlockLabel = -1,
113};
114
115enum ExtendedMIROpcode {
116  kMirOpFirst = kNumPackedOpcodes,
117  kMirOpPhi = kMirOpFirst,
118  kMirOpCopy,
119  kMirOpFusedCmplFloat,
120  kMirOpFusedCmpgFloat,
121  kMirOpFusedCmplDouble,
122  kMirOpFusedCmpgDouble,
123  kMirOpFusedCmpLong,
124  kMirOpNop,
125  kMirOpNullCheck,
126  kMirOpRangeCheck,
127  kMirOpDivZeroCheck,
128  kMirOpCheck,
129  kMirOpCheckPart2,
130  kMirOpSelect,
131  kMirOpLast,
132};
133
134enum MIROptimizationFlagPositons {
135  kMIRIgnoreNullCheck = 0,
136  kMIRNullCheckOnly,
137  kMIRIgnoreRangeCheck,
138  kMIRRangeCheckOnly,
139  kMIRInlined,                        // Invoke is inlined (ie dead).
140  kMIRInlinedPred,                    // Invoke is inlined via prediction.
141  kMIRCallee,                         // Instruction is inlined from callee.
142  kMIRIgnoreSuspendCheck,
143  kMIRDup,
144  kMIRMark,                           // Temporary node mark.
145};
146
147// For successor_block_list.
148enum BlockListType {
149  kNotUsed = 0,
150  kCatch,
151  kPackedSwitch,
152  kSparseSwitch,
153};
154
155enum AssemblerStatus {
156  kSuccess,
157  kRetryAll,
158};
159
160enum OpSize {
161  kWord,
162  kLong,
163  kSingle,
164  kDouble,
165  kUnsignedHalf,
166  kSignedHalf,
167  kUnsignedByte,
168  kSignedByte,
169};
170
171std::ostream& operator<<(std::ostream& os, const OpSize& kind);
172
173enum OpKind {
174  kOpMov,
175  kOpCmov,
176  kOpMvn,
177  kOpCmp,
178  kOpLsl,
179  kOpLsr,
180  kOpAsr,
181  kOpRor,
182  kOpNot,
183  kOpAnd,
184  kOpOr,
185  kOpXor,
186  kOpNeg,
187  kOpAdd,
188  kOpAdc,
189  kOpSub,
190  kOpSbc,
191  kOpRsub,
192  kOpMul,
193  kOpDiv,
194  kOpRem,
195  kOpBic,
196  kOpCmn,
197  kOpTst,
198  kOpRev,
199  kOpRevsh,
200  kOpBkpt,
201  kOpBlx,
202  kOpPush,
203  kOpPop,
204  kOp2Char,
205  kOp2Short,
206  kOp2Byte,
207  kOpCondBr,
208  kOpUncondBr,
209  kOpBx,
210  kOpInvalid,
211};
212
213enum MoveType {
214  kMov8GP,      // Move 8-bit general purpose register.
215  kMov16GP,     // Move 16-bit general purpose register.
216  kMov32GP,     // Move 32-bit general purpose register.
217  kMov64GP,     // Move 64-bit general purpose register.
218  kMov32FP,     // Move 32-bit FP register.
219  kMov64FP,     // Move 64-bit FP register.
220  kMovLo64FP,   // Move low 32-bits of 64-bit FP register.
221  kMovHi64FP,   // Move high 32-bits of 64-bit FP register.
222  kMovU128FP,   // Move 128-bit FP register to/from possibly unaligned region.
223  kMov128FP = kMovU128FP,
224  kMovA128FP,   // Move 128-bit FP register to/from region surely aligned to 16-bytes.
225  kMovLo128FP,  // Move low 64-bits of 128-bit FP register.
226  kMovHi128FP,  // Move high 64-bits of 128-bit FP register.
227};
228
229std::ostream& operator<<(std::ostream& os, const OpKind& kind);
230
231enum ConditionCode {
232  kCondEq,  // equal
233  kCondNe,  // not equal
234  kCondCs,  // carry set
235  kCondCc,  // carry clear
236  kCondUlt,  // unsigned less than
237  kCondUge,  // unsigned greater than or same
238  kCondMi,  // minus
239  kCondPl,  // plus, positive or zero
240  kCondVs,  // overflow
241  kCondVc,  // no overflow
242  kCondHi,  // unsigned greater than
243  kCondLs,  // unsigned lower or same
244  kCondGe,  // signed greater than or equal
245  kCondLt,  // signed less than
246  kCondGt,  // signed greater than
247  kCondLe,  // signed less than or equal
248  kCondAl,  // always
249  kCondNv,  // never
250};
251
252std::ostream& operator<<(std::ostream& os, const ConditionCode& kind);
253
254// Target specific condition encodings
255enum ArmConditionCode {
256  kArmCondEq = 0x0,  // 0000
257  kArmCondNe = 0x1,  // 0001
258  kArmCondCs = 0x2,  // 0010
259  kArmCondCc = 0x3,  // 0011
260  kArmCondMi = 0x4,  // 0100
261  kArmCondPl = 0x5,  // 0101
262  kArmCondVs = 0x6,  // 0110
263  kArmCondVc = 0x7,  // 0111
264  kArmCondHi = 0x8,  // 1000
265  kArmCondLs = 0x9,  // 1001
266  kArmCondGe = 0xa,  // 1010
267  kArmCondLt = 0xb,  // 1011
268  kArmCondGt = 0xc,  // 1100
269  kArmCondLe = 0xd,  // 1101
270  kArmCondAl = 0xe,  // 1110
271  kArmCondNv = 0xf,  // 1111
272};
273
274std::ostream& operator<<(std::ostream& os, const ArmConditionCode& kind);
275
276enum X86ConditionCode {
277  kX86CondO   = 0x0,    // overflow
278  kX86CondNo  = 0x1,    // not overflow
279
280  kX86CondB   = 0x2,    // below
281  kX86CondNae = kX86CondB,  // not-above-equal
282  kX86CondC   = kX86CondB,  // carry
283
284  kX86CondNb  = 0x3,    // not-below
285  kX86CondAe  = kX86CondNb,  // above-equal
286  kX86CondNc  = kX86CondNb,  // not-carry
287
288  kX86CondZ   = 0x4,    // zero
289  kX86CondEq  = kX86CondZ,  // equal
290
291  kX86CondNz  = 0x5,    // not-zero
292  kX86CondNe  = kX86CondNz,  // not-equal
293
294  kX86CondBe  = 0x6,    // below-equal
295  kX86CondNa  = kX86CondBe,  // not-above
296
297  kX86CondNbe = 0x7,    // not-below-equal
298  kX86CondA   = kX86CondNbe,  // above
299
300  kX86CondS   = 0x8,    // sign
301  kX86CondNs  = 0x9,    // not-sign
302
303  kX86CondP   = 0xa,    // 8-bit parity even
304  kX86CondPE  = kX86CondP,
305
306  kX86CondNp  = 0xb,    // 8-bit parity odd
307  kX86CondPo  = kX86CondNp,
308
309  kX86CondL   = 0xc,    // less-than
310  kX86CondNge = kX86CondL,  // not-greater-equal
311
312  kX86CondNl  = 0xd,    // not-less-than
313  kX86CondGe  = kX86CondNl,  // not-greater-equal
314
315  kX86CondLe  = 0xe,    // less-than-equal
316  kX86CondNg  = kX86CondLe,  // not-greater
317
318  kX86CondNle = 0xf,    // not-less-than
319  kX86CondG   = kX86CondNle,  // greater
320};
321
322std::ostream& operator<<(std::ostream& os, const X86ConditionCode& kind);
323
324enum ThrowKind {
325  kThrowNullPointer,
326  kThrowDivZero,
327  kThrowArrayBounds,
328  kThrowConstantArrayBounds,
329  kThrowNoSuchMethod,
330  kThrowStackOverflow,
331};
332
333enum DividePattern {
334  DivideNone,
335  Divide3,
336  Divide5,
337  Divide7,
338};
339
340std::ostream& operator<<(std::ostream& os, const DividePattern& pattern);
341
342// Memory barrier types (see "The JSR-133 Cookbook for Compiler Writers").
343enum MemBarrierKind {
344  kLoadStore,
345  kLoadLoad,
346  kStoreStore,
347  kStoreLoad
348};
349
350std::ostream& operator<<(std::ostream& os, const MemBarrierKind& kind);
351
352enum OpFeatureFlags {
353  kIsBranch = 0,
354  kNoOperand,
355  kIsUnaryOp,
356  kIsBinaryOp,
357  kIsTertiaryOp,
358  kIsQuadOp,
359  kIsQuinOp,
360  kIsSextupleOp,
361  kIsIT,
362  kMemLoad,
363  kMemStore,
364  kPCRelFixup,  // x86 FIXME: add NEEDS_FIXUP to instruction attributes.
365  kRegDef0,
366  kRegDef1,
367  kRegDefA,
368  kRegDefD,
369  kRegDefFPCSList0,
370  kRegDefFPCSList2,
371  kRegDefList0,
372  kRegDefList1,
373  kRegDefList2,
374  kRegDefLR,
375  kRegDefSP,
376  kRegUse0,
377  kRegUse1,
378  kRegUse2,
379  kRegUse3,
380  kRegUse4,
381  kRegUseA,
382  kRegUseC,
383  kRegUseD,
384  kRegUseB,
385  kRegUseFPCSList0,
386  kRegUseFPCSList2,
387  kRegUseList0,
388  kRegUseList1,
389  kRegUseLR,
390  kRegUsePC,
391  kRegUseSP,
392  kSetsCCodes,
393  kUsesCCodes
394};
395
396enum SelectInstructionKind {
397  kSelectNone,
398  kSelectConst,
399  kSelectMove,
400  kSelectGoto
401};
402
403std::ostream& operator<<(std::ostream& os, const SelectInstructionKind& kind);
404
405// Type of growable bitmap for memory tuning.
406enum OatBitMapKind {
407  kBitMapMisc = 0,
408  kBitMapUse,
409  kBitMapDef,
410  kBitMapLiveIn,
411  kBitMapBMatrix,
412  kBitMapDominators,
413  kBitMapIDominated,
414  kBitMapDomFrontier,
415  kBitMapPhi,
416  kBitMapTmpBlocks,
417  kBitMapInputBlocks,
418  kBitMapRegisterV,
419  kBitMapTempSSARegisterV,
420  kBitMapNullCheck,
421  kBitMapTmpBlockV,
422  kBitMapPredecessors,
423  kNumBitMapKinds
424};
425
426std::ostream& operator<<(std::ostream& os, const OatBitMapKind& kind);
427
428// LIR fixup kinds for Arm
429enum FixupKind {
430  kFixupNone,
431  kFixupLabel,       // For labels we just adjust the offset.
432  kFixupLoad,        // Mostly for imediates.
433  kFixupVLoad,       // FP load which *may* be pc-relative.
434  kFixupCBxZ,        // Cbz, Cbnz.
435  kFixupPushPop,     // Not really pc relative, but changes size based on args.
436  kFixupCondBranch,  // Conditional branch
437  kFixupT1Branch,    // Thumb1 Unconditional branch
438  kFixupT2Branch,    // Thumb2 Unconditional branch
439  kFixupBlx1,        // Blx1 (start of Blx1/Blx2 pair).
440  kFixupBl1,         // Bl1 (start of Bl1/Bl2 pair).
441  kFixupAdr,         // Adr.
442  kFixupMovImmLST,   // kThumb2MovImm16LST.
443  kFixupMovImmHST,   // kThumb2MovImm16HST.
444  kFixupAlign4,      // Align to 4-byte boundary.
445};
446
447std::ostream& operator<<(std::ostream& os, const FixupKind& kind);
448
449}  // namespace art
450
451#endif  // ART_COMPILER_DEX_COMPILER_ENUMS_H_
452