compiler_enums.h revision 754ddad084ccb610d0cf486f6131bdc69bae5bc6 
1/*
2 * Copyright (C) 2012 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 *      http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#ifndef ART_COMPILER_DEX_COMPILER_ENUMS_H_
18#define ART_COMPILER_DEX_COMPILER_ENUMS_H_
19
20#include "dex_instruction.h"
21
22namespace art {
23
24enum RegisterClass {
25  kCoreReg,
26  kFPReg,
27  kAnyReg,
28};
29
30enum SpecialTargetRegister {
31  kSelf,            // Thread pointer.
32  kSuspend,         // Used to reduce suspend checks for some targets.
33  kLr,
34  kPc,
35  kSp,
36  kArg0,
37  kArg1,
38  kArg2,
39  kArg3,
40  kFArg0,
41  kFArg1,
42  kFArg2,
43  kFArg3,
44  kRet0,
45  kRet1,
46  kInvokeTgt,
47  kHiddenArg,
48  kHiddenFpArg,
49  kCount
50};
51
52enum RegLocationType {
53  kLocDalvikFrame = 0,  // Normal Dalvik register
54  kLocPhysReg,
55  kLocCompilerTemp,
56  kLocInvalid
57};
58
59/**
60 * Support for vector registers.  Initially used for x86 floats.  This will be used
61 * to replace the assumption that a double takes up 2 single FP registers
62 */
63enum VectorLengthType {
64  kVectorNotUsed = 0,   // This value is NOT in a vector register.
65  kVectorLength4,       // The value occupies 4 bytes in a vector register.
66  kVectorLength8,       // The value occupies 8 bytes in a vector register.
67  kVectorLength16       // The value occupies 16 bytes in a vector register (unused now).
68};
69
70enum BBType {
71  kNullBlock,
72  kEntryBlock,
73  kDalvikByteCode,
74  kExitBlock,
75  kExceptionHandling,
76  kDead,
77};
78
79/*
80 * Def/Use encoding in 64-bit use_mask/def_mask.  Low positions used for target-specific
81 * registers (and typically use the register number as the position).  High positions
82 * reserved for common and abstract resources.
83 */
84
85enum ResourceEncodingPos {
86  kMustNotAlias = 63,
87  kHeapRef = 62,          // Default memory reference type.
88  kLiteral = 61,          // Literal pool memory reference.
89  kDalvikReg = 60,        // Dalvik v_reg memory reference.
90  kFPStatus = 59,
91  kCCode = 58,
92  kLowestCommonResource = kCCode
93};
94
95// Shared pseudo opcodes - must be < 0.
96enum LIRPseudoOpcode {
97  kPseudoExportedPC = -16,
98  kPseudoSafepointPC = -15,
99  kPseudoIntrinsicRetry = -14,
100  kPseudoSuspendTarget = -13,
101  kPseudoThrowTarget = -12,
102  kPseudoCaseLabel = -11,
103  kPseudoMethodEntry = -10,
104  kPseudoMethodExit = -9,
105  kPseudoBarrier = -8,
106  kPseudoEntryBlock = -7,
107  kPseudoExitBlock = -6,
108  kPseudoTargetLabel = -5,
109  kPseudoDalvikByteCodeBoundary = -4,
110  kPseudoPseudoAlign4 = -3,
111  kPseudoEHBlockLabel = -2,
112  kPseudoNormalBlockLabel = -1,
113};
114
115enum ExtendedMIROpcode {
116  kMirOpFirst = kNumPackedOpcodes,
117  kMirOpPhi = kMirOpFirst,
118  kMirOpCopy,
119  kMirOpFusedCmplFloat,
120  kMirOpFusedCmpgFloat,
121  kMirOpFusedCmplDouble,
122  kMirOpFusedCmpgDouble,
123  kMirOpFusedCmpLong,
124  kMirOpNop,
125  kMirOpNullCheck,
126  kMirOpRangeCheck,
127  kMirOpDivZeroCheck,
128  kMirOpCheck,
129  kMirOpCheckPart2,
130  kMirOpSelect,
131  kMirOpLast,
132};
133
134enum MIROptimizationFlagPositons {
135  kMIRIgnoreNullCheck = 0,
136  kMIRNullCheckOnly,
137  kMIRIgnoreRangeCheck,
138  kMIRRangeCheckOnly,
139  kMIRIgnoreClInitCheck,
140  kMIRInlined,                        // Invoke is inlined (ie dead).
141  kMIRInlinedPred,                    // Invoke is inlined via prediction.
142  kMIRCallee,                         // Instruction is inlined from callee.
143  kMIRIgnoreSuspendCheck,
144  kMIRDup,
145  kMIRMark,                           // Temporary node mark.
146};
147
148// For successor_block_list.
149enum BlockListType {
150  kNotUsed = 0,
151  kCatch,
152  kPackedSwitch,
153  kSparseSwitch,
154};
155
156enum AssemblerStatus {
157  kSuccess,
158  kRetryAll,
159};
160
161enum OpSize {
162  kWord,
163  kLong,
164  kSingle,
165  kDouble,
166  kUnsignedHalf,
167  kSignedHalf,
168  kUnsignedByte,
169  kSignedByte,
170};
171
172std::ostream& operator<<(std::ostream& os, const OpSize& kind);
173
174enum OpKind {
175  kOpMov,
176  kOpCmov,
177  kOpMvn,
178  kOpCmp,
179  kOpLsl,
180  kOpLsr,
181  kOpAsr,
182  kOpRor,
183  kOpNot,
184  kOpAnd,
185  kOpOr,
186  kOpXor,
187  kOpNeg,
188  kOpAdd,
189  kOpAdc,
190  kOpSub,
191  kOpSbc,
192  kOpRsub,
193  kOpMul,
194  kOpDiv,
195  kOpRem,
196  kOpBic,
197  kOpCmn,
198  kOpTst,
199  kOpRev,
200  kOpRevsh,
201  kOpBkpt,
202  kOpBlx,
203  kOpPush,
204  kOpPop,
205  kOp2Char,
206  kOp2Short,
207  kOp2Byte,
208  kOpCondBr,
209  kOpUncondBr,
210  kOpBx,
211  kOpInvalid,
212};
213
214enum MoveType {
215  kMov8GP,      // Move 8-bit general purpose register.
216  kMov16GP,     // Move 16-bit general purpose register.
217  kMov32GP,     // Move 32-bit general purpose register.
218  kMov64GP,     // Move 64-bit general purpose register.
219  kMov32FP,     // Move 32-bit FP register.
220  kMov64FP,     // Move 64-bit FP register.
221  kMovLo64FP,   // Move low 32-bits of 64-bit FP register.
222  kMovHi64FP,   // Move high 32-bits of 64-bit FP register.
223  kMovU128FP,   // Move 128-bit FP register to/from possibly unaligned region.
224  kMov128FP = kMovU128FP,
225  kMovA128FP,   // Move 128-bit FP register to/from region surely aligned to 16-bytes.
226  kMovLo128FP,  // Move low 64-bits of 128-bit FP register.
227  kMovHi128FP,  // Move high 64-bits of 128-bit FP register.
228};
229
230std::ostream& operator<<(std::ostream& os, const OpKind& kind);
231
232enum ConditionCode {
233  kCondEq,  // equal
234  kCondNe,  // not equal
235  kCondCs,  // carry set
236  kCondCc,  // carry clear
237  kCondUlt,  // unsigned less than
238  kCondUge,  // unsigned greater than or same
239  kCondMi,  // minus
240  kCondPl,  // plus, positive or zero
241  kCondVs,  // overflow
242  kCondVc,  // no overflow
243  kCondHi,  // unsigned greater than
244  kCondLs,  // unsigned lower or same
245  kCondGe,  // signed greater than or equal
246  kCondLt,  // signed less than
247  kCondGt,  // signed greater than
248  kCondLe,  // signed less than or equal
249  kCondAl,  // always
250  kCondNv,  // never
251};
252
253std::ostream& operator<<(std::ostream& os, const ConditionCode& kind);
254
255// Target specific condition encodings
256enum ArmConditionCode {
257  kArmCondEq = 0x0,  // 0000
258  kArmCondNe = 0x1,  // 0001
259  kArmCondCs = 0x2,  // 0010
260  kArmCondCc = 0x3,  // 0011
261  kArmCondMi = 0x4,  // 0100
262  kArmCondPl = 0x5,  // 0101
263  kArmCondVs = 0x6,  // 0110
264  kArmCondVc = 0x7,  // 0111
265  kArmCondHi = 0x8,  // 1000
266  kArmCondLs = 0x9,  // 1001
267  kArmCondGe = 0xa,  // 1010
268  kArmCondLt = 0xb,  // 1011
269  kArmCondGt = 0xc,  // 1100
270  kArmCondLe = 0xd,  // 1101
271  kArmCondAl = 0xe,  // 1110
272  kArmCondNv = 0xf,  // 1111
273};
274
275std::ostream& operator<<(std::ostream& os, const ArmConditionCode& kind);
276
277enum X86ConditionCode {
278  kX86CondO   = 0x0,    // overflow
279  kX86CondNo  = 0x1,    // not overflow
280
281  kX86CondB   = 0x2,    // below
282  kX86CondNae = kX86CondB,  // not-above-equal
283  kX86CondC   = kX86CondB,  // carry
284
285  kX86CondNb  = 0x3,    // not-below
286  kX86CondAe  = kX86CondNb,  // above-equal
287  kX86CondNc  = kX86CondNb,  // not-carry
288
289  kX86CondZ   = 0x4,    // zero
290  kX86CondEq  = kX86CondZ,  // equal
291
292  kX86CondNz  = 0x5,    // not-zero
293  kX86CondNe  = kX86CondNz,  // not-equal
294
295  kX86CondBe  = 0x6,    // below-equal
296  kX86CondNa  = kX86CondBe,  // not-above
297
298  kX86CondNbe = 0x7,    // not-below-equal
299  kX86CondA   = kX86CondNbe,  // above
300
301  kX86CondS   = 0x8,    // sign
302  kX86CondNs  = 0x9,    // not-sign
303
304  kX86CondP   = 0xa,    // 8-bit parity even
305  kX86CondPE  = kX86CondP,
306
307  kX86CondNp  = 0xb,    // 8-bit parity odd
308  kX86CondPo  = kX86CondNp,
309
310  kX86CondL   = 0xc,    // less-than
311  kX86CondNge = kX86CondL,  // not-greater-equal
312
313  kX86CondNl  = 0xd,    // not-less-than
314  kX86CondGe  = kX86CondNl,  // not-greater-equal
315
316  kX86CondLe  = 0xe,    // less-than-equal
317  kX86CondNg  = kX86CondLe,  // not-greater
318
319  kX86CondNle = 0xf,    // not-less-than
320  kX86CondG   = kX86CondNle,  // greater
321};
322
323std::ostream& operator<<(std::ostream& os, const X86ConditionCode& kind);
324
325enum ThrowKind {
326  kThrowNullPointer,
327  kThrowDivZero,
328  kThrowArrayBounds,
329  kThrowConstantArrayBounds,
330  kThrowNoSuchMethod,
331};
332
333enum DividePattern {
334  DivideNone,
335  Divide3,
336  Divide5,
337  Divide7,
338};
339
340std::ostream& operator<<(std::ostream& os, const DividePattern& pattern);
341
342/**
343 * @brief Memory barrier types (see "The JSR-133 Cookbook for Compiler Writers").
344 * @details Without context sensitive analysis, the most conservative set of barriers
345 * must be issued to ensure the Java Memory Model. Thus the recipe is as follows:
346 * -# Use StoreStore barrier before volatile store.
347 * -# Use StoreLoad barrier after volatile store.
348 * -# Use LoadLoad and LoadStore barrier after each volatile load.
349 * -# Use StoreStore barrier after all stores but before return from any constructor whose
350 * class has final fields.
351 */
352enum MemBarrierKind {
353  kLoadStore,
354  kLoadLoad,
355  kStoreStore,
356  kStoreLoad
357};
358
359std::ostream& operator<<(std::ostream& os, const MemBarrierKind& kind);
360
361enum OpFeatureFlags {
362  kIsBranch = 0,
363  kNoOperand,
364  kIsUnaryOp,
365  kIsBinaryOp,
366  kIsTertiaryOp,
367  kIsQuadOp,
368  kIsQuinOp,
369  kIsSextupleOp,
370  kIsIT,
371  kMemLoad,
372  kMemStore,
373  kPCRelFixup,  // x86 FIXME: add NEEDS_FIXUP to instruction attributes.
374  kRegDef0,
375  kRegDef1,
376  kRegDef2,
377  kRegDefA,
378  kRegDefD,
379  kRegDefFPCSList0,
380  kRegDefFPCSList2,
381  kRegDefList0,
382  kRegDefList1,
383  kRegDefList2,
384  kRegDefLR,
385  kRegDefSP,
386  kRegUse0,
387  kRegUse1,
388  kRegUse2,
389  kRegUse3,
390  kRegUse4,
391  kRegUseA,
392  kRegUseC,
393  kRegUseD,
394  kRegUseB,
395  kRegUseFPCSList0,
396  kRegUseFPCSList2,
397  kRegUseList0,
398  kRegUseList1,
399  kRegUseLR,
400  kRegUsePC,
401  kRegUseSP,
402  kSetsCCodes,
403  kUsesCCodes,
404  kUseFpStack,
405  kUseHi,
406  kUseLo,
407  kDefHi,
408  kDefLo
409};
410
411enum SelectInstructionKind {
412  kSelectNone,
413  kSelectConst,
414  kSelectMove,
415  kSelectGoto
416};
417
418std::ostream& operator<<(std::ostream& os, const SelectInstructionKind& kind);
419
420// LIR fixup kinds for Arm
421enum FixupKind {
422  kFixupNone,
423  kFixupLabel,       // For labels we just adjust the offset.
424  kFixupLoad,        // Mostly for immediates.
425  kFixupVLoad,       // FP load which *may* be pc-relative.
426  kFixupCBxZ,        // Cbz, Cbnz.
427  kFixupPushPop,     // Not really pc relative, but changes size based on args.
428  kFixupCondBranch,  // Conditional branch
429  kFixupT1Branch,    // Thumb1 Unconditional branch
430  kFixupT2Branch,    // Thumb2 Unconditional branch
431  kFixupBlx1,        // Blx1 (start of Blx1/Blx2 pair).
432  kFixupBl1,         // Bl1 (start of Bl1/Bl2 pair).
433  kFixup2Bl1,        // Thumb2 Bl1 (start of Bl1/Bl2 pair).
434  kFixupAdr,         // Adr.
435  kFixupMovImmLST,   // kThumb2MovImm16LST.
436  kFixupMovImmHST,   // kThumb2MovImm16HST.
437  kFixupAlign4,      // Align to 4-byte boundary.
438  kFixupTrampCall,   // Call into trampoline for runtime helper.
439};
440
441std::ostream& operator<<(std::ostream& os, const FixupKind& kind);
442
443}  // namespace art
444
445#endif  // ART_COMPILER_DEX_COMPILER_ENUMS_H_
446