cpu.cc revision c2e0dbddbe15c98d52c4786dac06cb8952a8ae6d 
1// Copyright (c) 2012 The Chromium Authors. All rights reserved.
2// Use of this source code is governed by a BSD-style license that can be
3// found in the LICENSE file.
4
5#include "base/cpu.h"
6
7#include <string.h>
8
9#include <algorithm>
10
11#include "build/build_config.h"
12
13#if defined(ARCH_CPU_X86_FAMILY)
14#if defined(_MSC_VER)
15#include <intrin.h>
16#endif
17#endif
18
19namespace base {
20
21CPU::CPU()
22  : type_(0),
23    family_(0),
24    model_(0),
25    stepping_(0),
26    ext_model_(0),
27    ext_family_(0),
28    has_mmx_(false),
29    has_sse_(false),
30    has_sse2_(false),
31    has_sse3_(false),
32    has_ssse3_(false),
33    has_sse41_(false),
34    has_sse42_(false),
35    has_non_stop_time_stamp_counter_(false),
36    cpu_vendor_("unknown") {
37  Initialize();
38}
39
40#if defined(ARCH_CPU_X86_FAMILY)
41#ifndef _MSC_VER
42
43#if defined(__pic__) && defined(__i386__)
44
45void __cpuid(int cpu_info[4], int info_type) {
46  __asm__ volatile (
47    "mov %%ebx, %%edi\n"
48    "cpuid\n"
49    "xchg %%edi, %%ebx\n"
50    : "=a"(cpu_info[0]), "=D"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3])
51    : "a"(info_type)
52  );
53}
54
55void __cpuidex(int cpu_info[4], int info_type, int info_index) {
56  __asm__ volatile (
57    "mov %%ebx, %%edi\n"
58    "cpuid\n"
59    "xchg %%edi, %%ebx\n"
60    : "=a"(cpu_info[0]), "=D"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3])
61    : "a"(info_type), "c"(info_index)
62  );
63}
64
65#else
66
67void __cpuid(int cpu_info[4], int info_type) {
68  __asm__ volatile (
69    "cpuid \n\t"
70    : "=a"(cpu_info[0]), "=b"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3])
71    : "a"(info_type)
72  );
73}
74
75void __cpuidex(int cpu_info[4], int info_type, int info_index) {
76  __asm__ volatile (
77    "cpuid \n\t"
78    : "=a"(cpu_info[0]), "=b"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3])
79    : "a"(info_type), "c"(info_index)
80  );
81}
82
83#endif
84#endif  // _MSC_VER
85#endif  // ARCH_CPU_X86_FAMILY
86
87void CPU::Initialize() {
88#if defined(ARCH_CPU_X86_FAMILY)
89  int cpu_info[4] = {-1};
90  char cpu_string[48];
91
92  // __cpuid with an InfoType argument of 0 returns the number of
93  // valid Ids in CPUInfo[0] and the CPU identification string in
94  // the other three array elements. The CPU identification string is
95  // not in linear order. The code below arranges the information
96  // in a human readable form. The human readable order is CPUInfo[1] |
97  // CPUInfo[3] | CPUInfo[2]. CPUInfo[2] and CPUInfo[3] are swapped
98  // before using memcpy to copy these three array elements to cpu_string.
99  __cpuid(cpu_info, 0);
100  int num_ids = cpu_info[0];
101  std::swap(cpu_info[2], cpu_info[3]);
102  memcpy(cpu_string, &cpu_info[1], 3 * sizeof(cpu_info[1]));
103  cpu_vendor_.assign(cpu_string, 3 * sizeof(cpu_info[1]));
104
105  // Interpret CPU feature information.
106  if (num_ids > 0) {
107    __cpuid(cpu_info, 1);
108    stepping_ = cpu_info[0] & 0xf;
109    model_ = ((cpu_info[0] >> 4) & 0xf) + ((cpu_info[0] >> 12) & 0xf0);
110    family_ = (cpu_info[0] >> 8) & 0xf;
111    type_ = (cpu_info[0] >> 12) & 0x3;
112    ext_model_ = (cpu_info[0] >> 16) & 0xf;
113    ext_family_ = (cpu_info[0] >> 20) & 0xff;
114    has_mmx_ = (cpu_info[3] & 0x00800000) != 0;
115    has_sse_ = (cpu_info[3] & 0x02000000) != 0;
116    has_sse2_ = (cpu_info[3] & 0x04000000) != 0;
117    has_sse3_ = (cpu_info[2] & 0x00000001) != 0;
118    has_ssse3_ = (cpu_info[2] & 0x00000200) != 0;
119    has_sse41_ = (cpu_info[2] & 0x00080000) != 0;
120    has_sse42_ = (cpu_info[2] & 0x00100000) != 0;
121    has_avx_ = (cpu_info[2] & 0x10000000) != 0;
122  }
123
124  // Get the brand string of the cpu.
125  __cpuid(cpu_info, 0x80000000);
126  const int parameter_end = 0x80000004;
127  int max_parameter = cpu_info[0];
128
129  if (cpu_info[0] >= parameter_end) {
130    char* cpu_string_ptr = cpu_string;
131
132    for (int parameter = 0x80000002; parameter <= parameter_end &&
133         cpu_string_ptr < &cpu_string[sizeof(cpu_string)]; parameter++) {
134      __cpuid(cpu_info, parameter);
135      memcpy(cpu_string_ptr, cpu_info, sizeof(cpu_info));
136      cpu_string_ptr += sizeof(cpu_info);
137    }
138    cpu_brand_.assign(cpu_string, cpu_string_ptr - cpu_string);
139  }
140
141  const int parameter_containing_non_stop_time_stamp_counter = 0x80000007;
142  if (max_parameter >= parameter_containing_non_stop_time_stamp_counter) {
143    __cpuid(cpu_info, parameter_containing_non_stop_time_stamp_counter);
144    has_non_stop_time_stamp_counter_ = (cpu_info[3] & (1 << 8)) != 0;
145  }
146#endif
147}
148
149CPU::IntelMicroArchitecture CPU::GetIntelMicroArchitecture() const {
150  if (has_avx()) return AVX;
151  if (has_sse42()) return SSE42;
152  if (has_sse41()) return SSE41;
153  if (has_ssse3()) return SSSE3;
154  if (has_sse3()) return SSE3;
155  if (has_sse2()) return SSE2;
156  if (has_sse()) return SSE;
157  return PENTIUM;
158}
159
160}  // namespace base
161