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ast.h12-Mar-201519.7 KiB

ast_expr.cpp12-Mar-20152.2 KiB

ast_function.cpp12-Mar-201548.9 KiB

ast_to_hir.cpp12-Mar-2015138.6 KiB

ast_type.cpp12-Mar-20153.2 KiB

builtin_stubs.cpp12-Mar-20151.5 KiB

builtin_types.h12-Mar-201512.9 KiB

builtin_variables.cpp12-Mar-201537.6 KiB

builtins/12-Mar-20154 KiB

glcpp/12-Mar-20154 KiB

glsl_lexer.ll12-Mar-201515.4 KiB

glsl_parser.yy12-Mar-201549.4 KiB

glsl_parser_extras.cpp12-Mar-201528.5 KiB

glsl_parser_extras.h12-Mar-20158.8 KiB

glsl_symbol_table.cpp12-Mar-20155.6 KiB

glsl_symbol_table.h12-Mar-20153.6 KiB

glsl_types.cpp12-Mar-201525.1 KiB

glsl_types.h12-Mar-201516 KiB

hir_field_selection.cpp12-Mar-20153.9 KiB

ir.cpp12-Mar-201542.8 KiB

ir.h12-Mar-201549.8 KiB

ir_basic_block.cpp12-Mar-20153.5 KiB

ir_basic_block.h12-Mar-20151.3 KiB

ir_builder.cpp12-Mar-20154.2 KiB

ir_builder.h12-Mar-20153.3 KiB

ir_clone.cpp12-Mar-201512.5 KiB

ir_constant_expression.cpp12-Mar-201537.4 KiB

ir_expression_flattening.cpp12-Mar-20152.8 KiB

ir_expression_flattening.h12-Mar-20151.6 KiB

ir_function.cpp12-Mar-20156.8 KiB

ir_function_can_inline.cpp12-Mar-20152.5 KiB

ir_function_detect_recursion.cpp12-Mar-201511.8 KiB

ir_function_inlining.h12-Mar-20151.3 KiB

ir_hierarchical_visitor.cpp12-Mar-20156.2 KiB

ir_hierarchical_visitor.h12-Mar-20157.8 KiB

ir_hv_accept.cpp12-Mar-201510.7 KiB

ir_import_prototypes.cpp12-Mar-20153.8 KiB

ir_optimization.h12-Mar-20153.9 KiB

ir_print_visitor.cpp12-Mar-201511.6 KiB

ir_print_visitor.h12-Mar-20153 KiB

ir_reader.cpp12-Mar-201529.9 KiB

ir_reader.h12-Mar-20151.4 KiB

ir_rvalue_visitor.cpp12-Mar-20155.5 KiB

ir_rvalue_visitor.h12-Mar-20153.2 KiB

ir_set_program_inouts.cpp12-Mar-20156.9 KiB

ir_uniform.h12-Mar-20154.4 KiB

ir_validate.cpp12-Mar-201520 KiB

ir_variable_refcount.cpp12-Mar-20153.2 KiB

ir_variable_refcount.h12-Mar-20152.6 KiB

ir_visitor.h12-Mar-20153.2 KiB

link_functions.cpp12-Mar-20159.4 KiB

link_uniform_initializers.cpp12-Mar-20155.3 KiB

link_uniforms.cpp12-Mar-201519.3 KiB

linker.cpp12-Mar-201585.3 KiB

linker.h12-Mar-20153.2 KiB

list.h12-Mar-201511.8 KiB

loop_analysis.cpp12-Mar-201513.1 KiB

loop_analysis.h12-Mar-20156.4 KiB

loop_controls.cpp12-Mar-20158.3 KiB

loop_unroll.cpp12-Mar-20157.2 KiB

lower_clip_distance.cpp12-Mar-201513.2 KiB

lower_discard.cpp12-Mar-20154.6 KiB

lower_discard_flow.cpp12-Mar-20154.4 KiB

lower_if_to_cond_assign.cpp12-Mar-20157.5 KiB

lower_instructions.cpp12-Mar-20159.3 KiB

lower_jumps.cpp12-Mar-201537.9 KiB

lower_mat_op_to_vec.cpp12-Mar-201512 KiB

lower_noise.cpp12-Mar-20152.1 KiB

lower_output_reads.cpp12-Mar-20155 KiB

lower_texture_projection.cpp12-Mar-20153.1 KiB

lower_ubo_reference.cpp12-Mar-20159.8 KiB

lower_variable_index_to_cond_assign.cpp12-Mar-201516.4 KiB

lower_vec_index_to_cond_assign.cpp12-Mar-20159 KiB

lower_vec_index_to_swizzle.cpp12-Mar-20155.2 KiB

lower_vector.cpp12-Mar-20156 KiB

main.cpp12-Mar-20157.8 KiB

Makefile.am12-Mar-20153.8 KiB

Makefile.sources12-Mar-20153.6 KiB


opt_algebraic.cpp12-Mar-201512.1 KiB

opt_array_splitting.cpp12-Mar-201510.7 KiB

opt_constant_folding.cpp12-Mar-20154.5 KiB

opt_constant_propagation.cpp12-Mar-201512.9 KiB

opt_constant_variable.cpp12-Mar-20155.9 KiB

opt_copy_propagation.cpp12-Mar-20159.3 KiB

opt_copy_propagation_elements.cpp12-Mar-201513.4 KiB

opt_dead_code.cpp12-Mar-20154.9 KiB

opt_dead_code_local.cpp12-Mar-20158.4 KiB

opt_dead_functions.cpp12-Mar-20154 KiB

opt_function_inlining.cpp12-Mar-201510.2 KiB

opt_if_simplification.cpp12-Mar-20153.2 KiB

opt_noop_swizzle.cpp12-Mar-20152.3 KiB

opt_redundant_jumps.cpp12-Mar-20153.6 KiB

opt_structure_splitting.cpp12-Mar-201510.3 KiB

opt_swizzle_swizzle.cpp12-Mar-20152.7 KiB

opt_tree_grafting.cpp12-Mar-201510.2 KiB

program.h12-Mar-20151.5 KiB

ralloc.c12-Mar-201510.3 KiB

ralloc.h12-Mar-201513.1 KiB

README12-Mar-201510.5 KiB

s_expression.cpp12-Mar-20156.1 KiB

s_expression.h12-Mar-20154.7 KiB

SConscript12-Mar-20153.6 KiB

standalone_scaffolding.cpp12-Mar-20153.2 KiB

standalone_scaffolding.h12-Mar-20152.2 KiB

strtod.c12-Mar-20151.7 KiB

strtod.h12-Mar-20151.3 KiB

test.cpp12-Mar-20152.4 KiB

test_optpass.cpp12-Mar-20159.6 KiB

test_optpass.h12-Mar-20151.3 KiB

tests/12-Mar-20154 KiB



1Welcome to Mesa's GLSL compiler.  A brief overview of how things flow:
31) lex and yacc-based preprocessor takes the incoming shader string
4and produces a new string containing the preprocessed shader.  This
5takes care of things like #if, #ifdef, #define, and preprocessor macro
6invocations.  Note that #version, #extension, and some others are
7passed straight through.  See glcpp/*
92) lex and yacc-based parser takes the preprocessed string and
10generates the AST (abstract syntax tree).  Almost no checking is
11performed in this stage.  See glsl_lexer.lpp and glsl_parser.ypp.
133) The AST is converted to "HIR".  This is the intermediate
14representation of the compiler.  Constructors are generated, function
15calls are resolved to particular function signatures, and all the
16semantic checking is performed.  See ast_*.cpp for the conversion, and
17ir.h for the IR structures.
194) The driver (Mesa, or main.cpp for the standalone binary) performs
20optimizations.  These include copy propagation, dead code elimination,
21constant folding, and others.  Generally the driver will call
22optimizations in a loop, as each may open up opportunities for other
23optimizations to do additional work.  See most files called ir_*.cpp
255) linking is performed.  This does checking to ensure that the
26outputs of the vertex shader match the inputs of the fragment shader,
27and assigns locations to uniforms, attributes, and varyings.  See
306) The driver may perform additional optimization at this point, as
31for example dead code elimination previously couldn't remove functions
32or global variable usage when we didn't know what other code would be
33linked in.
357) The driver performs code generation out of the IR, taking a linked
36shader program and producing a compiled program for each stage.  See
37ir_to_mesa.cpp for Mesa IR code generation.
41Q: What is HIR versus IR versus LIR?
43A: The idea behind the naming was that ast_to_hir would produce a
44high-level IR ("HIR"), with things like matrix operations, structure
45assignments, etc., present.  A series of lowering passes would occur
46that do things like break matrix multiplication into a series of dot
47products/MADs, make structure assignment be a series of assignment of
48components, flatten if statements into conditional moves, and such,
49producing a low level IR ("LIR").
51However, it now appears that each driver will have different
52requirements from a LIR.  A 915-generation chipset wants all functions
53inlined, all loops unrolled, all ifs flattened, no variable array
54accesses, and matrix multiplication broken down.  The Mesa IR backend
55for swrast would like matrices and structure assignment broken down,
56but it can support function calls and dynamic branching.  A 965 vertex
57shader IR backend could potentially even handle some matrix operations
58without breaking them down, but the 965 fragment shader IR backend
59would want to break to have (almost) all operations down channel-wise
60and perform optimization on that.  As a result, there's no single
61low-level IR that will make everyone happy.  So that usage has fallen
62out of favor, and each driver will perform a series of lowering passes
63to take the HIR down to whatever restrictions it wants to impose
64before doing codegen.
66Q: How is the IR structured?
68A: The best way to get started seeing it would be to run the
69standalone compiler against a shader:
71./glsl_compiler --dump-lir \
72	~/src/piglit/tests/shaders/glsl-orangebook-ch06-bump.frag
74So for example one of the ir_instructions in main() contains:
76(assign (constant bool (1)) (var_ref litColor)  (expression vec3 * (var_ref Surf
77aceColor) (var_ref __retval) ) )
79Or more visually:
80                     (assign)
81                 /       |        \
82        (var_ref)  (expression *)  (constant bool 1)
83         /          /           \
84(litColor)      (var_ref)    (var_ref)
85                  /                  \
86           (SurfaceColor)          (__retval)
88which came from:
90litColor = SurfaceColor * max(dot(normDelta, LightDir), 0.0);
92(the max call is not represented in this expression tree, as it was a
93function call that got inlined but not brought into this expression
96Each of those nodes is a subclass of ir_instruction.  A particular
97ir_instruction instance may only appear once in the whole IR tree with
98the exception of ir_variables, which appear once as variable
101(declare () vec3 normDelta)
103and multiple times as the targets of variable dereferences:
105(assign (constant bool (1)) (var_ref __retval) (expression float dot
106 (var_ref normDelta) (var_ref LightDir) ) )
108(assign (constant bool (1)) (var_ref __retval) (expression vec3 -
109 (var_ref LightDir) (expression vec3 * (constant float (2.000000))
110 (expression vec3 * (expression float dot (var_ref normDelta) (var_ref
111 LightDir) ) (var_ref normDelta) ) ) ) )
114Each node has a type.  Expressions may involve several different types:
115(declare (uniform ) mat4 gl_ModelViewMatrix)
116((assign (constant bool (1)) (var_ref constructor_tmp) (expression
117 vec4 * (var_ref gl_ModelViewMatrix) (var_ref gl_Vertex) ) )
119An expression tree can be arbitrarily deep, and the compiler tries to
120keep them structured like that so that things like algebraic
121optimizations ((color * 1.0 == color) and ((mat1 * mat2) * vec == mat1
122* (mat2 * vec))) or recognizing operation patterns for code generation
123(vec1 * vec2 + vec3 == mad(vec1, vec2, vec3)) are easier.  This comes
124at the expense of additional trickery in implementing some
125optimizations like CSE where one must navigate an expression tree.
127Q: Why no SSA representation?
129A: Converting an IR tree to SSA form makes dead code elmimination,
130common subexpression elimination, and many other optimizations much
131easier.  However, in our primarily vector-based language, there's some
132major questions as to how it would work.  Do we do SSA on the scalar
133or vector level?  If we do it at the vector level, we're going to end
134up with many different versions of the variable when encountering code
137(assign (constant bool (1)) (swiz x (var_ref __retval) ) (var_ref a) ) 
138(assign (constant bool (1)) (swiz y (var_ref __retval) ) (var_ref b) ) 
139(assign (constant bool (1)) (swiz z (var_ref __retval) ) (var_ref c) ) 
141If every masked update of a component relies on the previous value of
142the variable, then we're probably going to be quite limited in our
143dead code elimination wins, and recognizing common expressions may
144just not happen.  On the other hand, if we operate channel-wise, then
145we'll be prone to optimizing the operation on one of the channels at
146the expense of making its instruction flow different from the other
147channels, and a vector-based GPU would end up with worse code than if
148we didn't optimize operations on that channel!
150Once again, it appears that our optimization requirements are driven
151significantly by the target architecture.  For now, targeting the Mesa
152IR backend, SSA does not appear to be that important to producing
153excellent code, but we do expect to do some SSA-based optimizations
154for the 965 fragment shader backend when that is developed.
156Q: How should I expand instructions that take multiple backend instructions?
158Sometimes you'll have to do the expansion in your code generation --
159see, for example, ir_to_mesa.cpp's handling of ir_unop_sqrt.  However,
160in many cases you'll want to do a pass over the IR to convert
161non-native instructions to a series of native instructions.  For
162example, for the Mesa backend we have ir_div_to_mul_rcp.cpp because
163Mesa IR (and many hardware backends) only have a reciprocal
164instruction, not a divide.  Implementing non-native instructions this
165way gives the chance for constant folding to occur, so (a / 2.0)
166becomes (a * 0.5) after codegen instead of (a * (1.0 / 2.0))
168Q: How shoud I handle my special hardware instructions with respect to IR?
170Our current theory is that if multiple targets have an instruction for
171some operation, then we should probably be able to represent that in
172the IR.  Generally this is in the form of an ir_{bin,un}op expression
173type.  For example, we initially implemented fract() using (a -
174floor(a)), but both 945 and 965 have instructions to give that result,
175and it would also simplify the implementation of mod(), so
176ir_unop_fract was added.  The following areas need updating to add a
177new expression type:
179ir.h (new enum)
180ir.cpp:operator_strs (used for ir_reader)
181ir_constant_expression.cpp (you probably want to be able to constant fold)
182ir_validate.cpp (check users have the right types)
184You may also need to update the backends if they will see the new expr type:
188You can then use the new expression from builtins (if all backends
189would rather see it), or scan the IR and convert to use your new
190expression type (see ir_mod_to_fract, for example).
192Q: How is memory management handled in the compiler?
194The hierarchical memory allocator "talloc" developed for the Samba
195project is used, so that things like optimization passes don't have to
196worry about their garbage collection so much.  It has a few nice
197features, including low performance overhead and good debugging
198support that's trivially available.
200Generally, each stage of the compile creates a talloc context and
201allocates its memory out of that or children of it.  At the end of the
202stage, the pieces still live are stolen to a new context and the old
203one freed, or the whole context is kept for use by the next stage.
205For IR transformations, a temporary context is used, then at the end
206of all transformations, reparent_ir reparents all live nodes under the
207shader's IR list, and the old context full of dead nodes is freed.
208When developing a single IR transformation pass, this means that you
209want to allocate instruction nodes out of the temporary context, so if
210it becomes dead it doesn't live on as the child of a live node.  At
211the moment, optimization passes aren't passed that temporary context,
212so they find it by calling talloc_parent() on a nearby IR node.  The
213talloc_parent() call is expensive, so many passes will cache the
214result of the first talloc_parent().  Cleaning up all the optimization
215passes to take a context argument and not call talloc_parent() is left
216as an exercise.
218Q: What is the file naming convention in this directory?
220Initially, there really wasn't one.  We have since adopted one:
222 - Files that implement code lowering passes should be named lower_*
223   (e.g., lower_noise.cpp).
224 - Files that implement optimization passes should be named opt_*.
225 - Files that implement a class that is used throught the code should
226   take the name of that class (e.g., ir_hierarchical_visitor.cpp).
227 - Files that contain code not fitting in one of the previous
228   categories should have a sensible name (e.g., glsl_parser.ypp).