1f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/* 2f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Copyright © 2011 Intel Corporation 3f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 4f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Permission is hereby granted, free of charge, to any person obtaining a 5f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * copy of this software and associated documentation files (the "Software"), 6f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * to deal in the Software without restriction, including without limitation 7f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * and/or sell copies of the Software, and to permit persons to whom the 9f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Software is furnished to do so, subject to the following conditions: 10f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 11f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * The above copyright notice and this permission notice (including the next 12f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * paragraph) shall be included in all copies or substantial portions of the 13f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Software. 14f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 15f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * IN THE SOFTWARE. 22f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 23f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 24f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "intel_batchbuffer.h" 25f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "intel_mipmap_tree.h" 26f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "intel_regions.h" 27f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "intel_fbo.h" 28f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "brw_context.h" 29f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "brw_state.h" 30f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "brw_defines.h" 31f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 32f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void emit_depthbuffer(struct brw_context *brw) 33f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 34f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct intel_context *intel = &brw->intel; 35f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct gl_context *ctx = &intel->ctx; 36f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct gl_framebuffer *fb = ctx->DrawBuffer; 37f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 38f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* _NEW_BUFFERS */ 39f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct intel_renderbuffer *drb = intel_get_renderbuffer(fb, BUFFER_DEPTH); 40f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct intel_renderbuffer *srb = intel_get_renderbuffer(fb, BUFFER_STENCIL); 41f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct intel_mipmap_tree *depth_mt = NULL, 42f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *stencil_mt = NULL, 43f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *hiz_mt = NULL; 44f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 45f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Amount by which drawing should be offset in order to draw to the 46f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * appropriate miplevel/zoffset/cubeface. We will extract these values 47f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * from depth_irb or stencil_irb once we determine which is present. 48f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 49f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org uint32_t draw_x = 0, draw_y = 0; 50f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 51f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Masks used to determine how much of the draw_x and draw_y offsets should 52f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * be performed using the fine adjustment of "depth coordinate offset X/Y" 53f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * (dw5 of 3DSTATE_DEPTH_BUFFER). Any remaining coarse adjustment will be 54f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * performed by changing the base addresses of the buffers. 55f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 56f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Since the HiZ, depth, and stencil buffers all use the same "depth 57f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * coordinate offset X/Y" values, we need to make sure that the coarse 58f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * adjustment will be possible to apply to all three buffers. Since coarse 59f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * adjustment can only be applied in multiples of the tile size, we will OR 60f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * together the tile masks of all the buffers to determine which offsets to 61f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * perform as fine adjustments. 62f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 63f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org uint32_t tile_mask_x = 0, tile_mask_y = 0; 64f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 65f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (drb) 66f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org depth_mt = drb->mt; 67f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 68f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (depth_mt) { 69f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org hiz_mt = depth_mt->hiz_mt; 70f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 71f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org intel_region_get_tile_masks(depth_mt->region, 72f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org &tile_mask_x, &tile_mask_y, false); 73f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 74f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (hiz_mt) { 75f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org uint32_t hiz_tile_mask_x, hiz_tile_mask_y; 76f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org intel_region_get_tile_masks(hiz_mt->region, 77f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org &hiz_tile_mask_x, &hiz_tile_mask_y, 78f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org false); 79f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 80f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Each HiZ row represents 2 rows of pixels */ 81f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org hiz_tile_mask_y = hiz_tile_mask_y << 1 | 1; 82f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 83f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org tile_mask_x |= hiz_tile_mask_x; 84f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org tile_mask_y |= hiz_tile_mask_y; 85f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 86f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 87f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 88f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (srb) { 89f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org stencil_mt = srb->mt; 90f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (stencil_mt->stencil_mt) 91f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org stencil_mt = stencil_mt->stencil_mt; 92f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 93f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org assert(stencil_mt->format == MESA_FORMAT_S8); 94f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 95f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Stencil buffer uses 64x64 tiles. */ 96f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org tile_mask_x |= 63; 97f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org tile_mask_y |= 63; 98f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 99f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 100f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Gen7 doesn't support packed depth/stencil */ 101f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org assert(stencil_mt == NULL || depth_mt != stencil_mt); 102f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org assert(!depth_mt || !_mesa_is_format_packed_depth_stencil(depth_mt->format)); 103f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 104f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org intel_emit_depth_stall_flushes(intel); 105f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 106f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (depth_mt == NULL) { 107f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org uint32_t dw1 = BRW_DEPTHFORMAT_D32_FLOAT << 18; 108f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org uint32_t dw3 = 0; 109f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org uint32_t tile_x = 0, tile_y = 0; 110f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 111f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (stencil_mt == NULL) { 112f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org dw1 |= (BRW_SURFACE_NULL << 29); 113f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 114f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* _NEW_STENCIL: enable stencil buffer writes */ 115f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org dw1 |= ((ctx->Stencil.WriteMask != 0) << 27); 116f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 117f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org draw_x = srb->draw_x; 118f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org draw_y = srb->draw_y; 119f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org tile_x = draw_x & tile_mask_x; 120f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org tile_y = draw_y & tile_mask_y; 121f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 122f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* According to the Sandy Bridge PRM, volume 2 part 1, pp326-327 123f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * (3DSTATE_DEPTH_BUFFER dw5), in the documentation for "Depth 124f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Coordinate Offset X/Y": 125f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 126f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * "The 3 LSBs of both offsets must be zero to ensure correct 127f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * alignment" 128f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 129f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * We have no guarantee that tile_x and tile_y are correctly aligned, 130f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * since they are determined by the mipmap layout, which is only 131f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * aligned to multiples of 4. 132f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 133f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * So, to avoid hanging the GPU, just smash the low order 3 bits of 134f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * tile_x and tile_y to 0. This is a temporary workaround until we 135f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * come up with a better solution. 136f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 137f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org tile_x &= ~7; 138f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org tile_y &= ~7; 139f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 140f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* 3DSTATE_STENCIL_BUFFER inherits surface type and dimensions. */ 141f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org dw1 |= (BRW_SURFACE_2D << 29); 142f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org dw3 = ((srb->Base.Base.Width + tile_x - 1) << 4) | 143f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ((srb->Base.Base.Height + tile_y - 1) << 18); 144f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 145f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 146f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org BEGIN_BATCH(7); 147f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER << 16 | (7 - 2)); 148f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org OUT_BATCH(dw1); 149f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org OUT_BATCH(0); 150f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org OUT_BATCH(dw3); 151f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org OUT_BATCH(0); 152f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org OUT_BATCH(tile_x | (tile_y << 16)); 153f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org OUT_BATCH(0); 154f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ADVANCE_BATCH(); 155f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 156f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct intel_region *region = depth_mt->region; 157f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org uint32_t tile_x, tile_y, offset; 158f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 159f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org draw_x = drb->draw_x; 160f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org draw_y = drb->draw_y; 161f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org tile_x = draw_x & tile_mask_x; 162f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org tile_y = draw_y & tile_mask_y; 163f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 164f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* According to the Sandy Bridge PRM, volume 2 part 1, pp326-327 165f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * (3DSTATE_DEPTH_BUFFER dw5), in the documentation for "Depth 166f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Coordinate Offset X/Y": 167f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 168f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * "The 3 LSBs of both offsets must be zero to ensure correct 169f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * alignment" 170f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 171f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * We have no guarantee that tile_x and tile_y are correctly aligned, 172f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * since they are determined by the mipmap layout, which is only aligned 173f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * to multiples of 4. 174f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 175f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * So, to avoid hanging the GPU, just smash the low order 3 bits of 176f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * tile_x and tile_y to 0. This is a temporary workaround until we come 177f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * up with a better solution. 178f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 179f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org tile_x &= ~7; 180f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org tile_y &= ~7; 181f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 182f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org offset = intel_region_get_aligned_offset(region, 183f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org draw_x & ~tile_mask_x, 184f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org draw_y & ~tile_mask_y, 185f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org false); 186f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 187f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org assert(region->tiling == I915_TILING_Y); 188f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 189f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* _NEW_DEPTH, _NEW_STENCIL */ 190f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org BEGIN_BATCH(7); 191f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER << 16 | (7 - 2)); 192f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org OUT_BATCH(((region->pitch * region->cpp) - 1) | 193f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org (brw_depthbuffer_format(brw) << 18) | 194f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ((hiz_mt ? 1 : 0) << 22) | /* hiz enable */ 195f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ((stencil_mt != NULL && ctx->Stencil.WriteMask != 0) << 27) | 196f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ((ctx->Depth.Mask != 0) << 28) | 197f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org (BRW_SURFACE_2D << 29)); 198f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org OUT_RELOC(region->bo, 199f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 200f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org offset); 201f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org OUT_BATCH((((drb->Base.Base.Width + tile_x) - 1) << 4) | 202f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org (((drb->Base.Base.Height + tile_y) - 1) << 18)); 203f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org OUT_BATCH(0); 204f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org OUT_BATCH(tile_x | (tile_y << 16)); 205f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org OUT_BATCH(0); 206f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ADVANCE_BATCH(); 207f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 208f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 209f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (hiz_mt == NULL) { 210f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org BEGIN_BATCH(3); 211f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org OUT_BATCH(GEN7_3DSTATE_HIER_DEPTH_BUFFER << 16 | (3 - 2)); 212f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org OUT_BATCH(0); 213f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org OUT_BATCH(0); 214f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ADVANCE_BATCH(); 215f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 216f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org uint32_t hiz_offset = 217f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org intel_region_get_aligned_offset(hiz_mt->region, 218f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org draw_x & ~tile_mask_x, 219f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org (draw_y & ~tile_mask_y) / 2, 220f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org false); 221f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org BEGIN_BATCH(3); 222f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org OUT_BATCH(GEN7_3DSTATE_HIER_DEPTH_BUFFER << 16 | (3 - 2)); 223f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org OUT_BATCH(hiz_mt->region->pitch * hiz_mt->region->cpp - 1); 224f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org OUT_RELOC(hiz_mt->region->bo, 225f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org I915_GEM_DOMAIN_RENDER, 226f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org I915_GEM_DOMAIN_RENDER, 227f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org hiz_offset); 228f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ADVANCE_BATCH(); 229f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 230f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 231f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (stencil_mt == NULL) { 232f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org BEGIN_BATCH(3); 233f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org OUT_BATCH(GEN7_3DSTATE_STENCIL_BUFFER << 16 | (3 - 2)); 234f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org OUT_BATCH(0); 235f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org OUT_BATCH(0); 236f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ADVANCE_BATCH(); 237f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 238f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org const int enabled = intel->is_haswell ? HSW_STENCIL_ENABLED : 0; 239f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 240f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Note: We can't compute the stencil offset using 241f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * intel_region_get_aligned_offset(), because the stencil region claims 242f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * that the region is untiled; in fact it's W tiled. 243f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 244f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org uint32_t stencil_offset = 245f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org (draw_y & ~tile_mask_y) * stencil_mt->region->pitch + 246f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org (draw_x & ~tile_mask_x) * 64; 247f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 248f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org BEGIN_BATCH(3); 249f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org OUT_BATCH(GEN7_3DSTATE_STENCIL_BUFFER << 16 | (3 - 2)); 250f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* The stencil buffer has quirky pitch requirements. From the Graphics 251f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * BSpec: vol2a.11 3D Pipeline Windower > Early Depth/Stencil Processing 252f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * > Depth/Stencil Buffer State > 3DSTATE_STENCIL_BUFFER [DevIVB+], 253f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * field "Surface Pitch": 254f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 255f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * The pitch must be set to 2x the value computed based on width, as 256f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * the stencil buffer is stored with two rows interleaved. 257f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 258f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * (Note that it is not 100% clear whether this intended to apply to 259f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Gen7; the BSpec flags this comment as "DevILK,DevSNB" (which would 260f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * imply that it doesn't), however the comment appears on a "DevIVB+" 261f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * page (which would imply that it does). Experiments with the hardware 262f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * indicate that it does. 263f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 264f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org OUT_BATCH(enabled | 265f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org (2 * stencil_mt->region->pitch * stencil_mt->region->cpp - 1)); 266f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org OUT_RELOC(stencil_mt->region->bo, 267f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 268f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org stencil_offset); 269f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ADVANCE_BATCH(); 270f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 271f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 272f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org BEGIN_BATCH(3); 273f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org OUT_BATCH(GEN7_3DSTATE_CLEAR_PARAMS << 16 | (3 - 2)); 274f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org OUT_BATCH(depth_mt ? depth_mt->depth_clear_value : 0); 275f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org OUT_BATCH(1); 276f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ADVANCE_BATCH(); 277f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 278f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 279f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/** 280f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * \see brw_context.state.depth_region 281f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 282f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgconst struct brw_tracked_state gen7_depthbuffer = { 283f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org .dirty = { 284f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org .mesa = (_NEW_BUFFERS | _NEW_DEPTH | _NEW_STENCIL), 285f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org .brw = BRW_NEW_BATCH, 286f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org .cache = 0, 287f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org }, 288f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org .emit = emit_depthbuffer, 289f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org}; 290