1@//
2@//  Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
3@//
4@//  Use of this source code is governed by a BSD-style license
5@//  that can be found in the LICENSE file in the root of the source
6@//  tree. An additional intellectual property rights grant can be found
7@//  in the file PATENTS.  All contributing project authors may
8@//  be found in the AUTHORS file in the root of the source tree.
9@//
10@//  This is a modification of omxSP_FFTFwd_CToC_SC32_Sfs_s.S
11@//  to support float instead of SC32.
12@//
13
14@//
15@// Description:
16@// Compute an inverse FFT for a complex signal
17@//
18@//
19
20
21@// Include standard headers
22
23#include "dl/api/arm/armCOMM_s.h"
24#include "dl/api/arm/omxtypes_s.h"
25
26@//        M_VARIANTS ARM1136JS
27
28@// Import symbols required from other files
29@// (For example tables)
30
31        .extern  armSP_FFTFwd_CToC_FC32_Radix2_fs_OutOfPlace_unsafe_vfp
32        .extern  armSP_FFTFwd_CToC_FC32_Radix4_fs_OutOfPlace_unsafe_vfp
33        .extern  armSP_FFTFwd_CToC_FC32_Radix8_fs_OutOfPlace_unsafe_vfp
34        .extern  armSP_FFTFwd_CToC_FC32_Radix4_OutOfPlace_unsafe_vfp
35
36@// Set debugging level
37@//DEBUG_ON    SETL {TRUE}
38
39
40
41@// Guarding implementation by the processor name
42
43@/    IF  ARM1136JS
44
45@//Input Registers
46
47#define pSrc		r0
48#define pDst		r1
49#define pFFTSpec	r2
50
51
52@// Output registers
53#define result		r0
54
55@//Local Scratch Registers
56
57#define argTwiddle	r1
58#define argDst		r2
59#define argScale	r4
60#define pTwiddle	r4
61#define pOut		r5
62#define subFFTSize	r7
63#define subFFTNum	r6
64#define N		r6
65#define order		r14
66#define diff		r9
67#define count		r8
68#define diffMinusOne	r2
69#define round		r3
70
71#define x0r s0
72#define x0i s1
73
74
75
76
77    @// Allocate stack memory required by the function
78
79    @// Write function header
80        M_START     omxSP_FFTFwd_CToC_FC32_Sfs_vfp,r11
81
82@ Structure offsets for FFTSpec
83	.set	ARMsFFTSpec_N, 0
84	.set	ARMsFFTSpec_pBitRev, 4
85	.set	ARMsFFTSpec_pTwiddle, 8
86	.set	ARMsFFTSpec_pBuf, 12
87
88        @// Define stack arguments
89
90        @// Read the size from structure and take log
91        LDR     N, [pFFTSpec, #ARMsFFTSpec_N]
92
93        @// Read other structure parameters
94        LDR     pTwiddle, [pFFTSpec, #ARMsFFTSpec_pTwiddle]
95        LDR     pOut, [pFFTSpec, #ARMsFFTSpec_pBuf]
96
97        CLZ     order,N			@// N = 2^order
98        RSB     order,order,#31
99        MOV     subFFTSize,#1
100        @//MOV     subFFTNum,N
101
102
103        CMP     order,#1
104        BGT     orderGreaterthan1	@// order > 1
105	@// order = 0, 1
106	vldmlt.f32 pSrc, {x0r, x0i}
107	vstmlt.f32 pDst, {x0r, x0i}
108
109        MOVLT   pSrc,pDst
110        BLT     End
111
112	@// Handle order = 1
113        MOV     argDst,pDst             @// Set input args to fft stages
114        MOV     argTwiddle,pTwiddle
115        BL    armSP_FFTFwd_CToC_FC32_Radix2_fs_OutOfPlace_unsafe_vfp
116        B     End
117
118
119
120orderGreaterthan1:
121
122        TST     order, #2               @// Set input args to fft stages
123        MOVNE   argDst,pDst
124        MOVEQ   argDst,pOut
125        MOVEQ   pOut,pDst               @// Pass the first stage destination in RN5
126        MOV     argTwiddle,pTwiddle
127
128        @//check for even or odd order
129
130        @// NOTE: The following combination of BL's would work fine
131	@// eventhough the first BL would corrupt the flags. This is
132	@// because the end of the "grpZeroSetLoop" loop inside
133        @// armSP_FFTFwd_CToC_FC32_Radix4_fs_OutOfPlace_unsafe_vfp
134	@// sets the Z flag to EQ
135
136        TST     order,#0x00000001
137        BLEQ    armSP_FFTFwd_CToC_FC32_Radix4_fs_OutOfPlace_unsafe_vfp
138        BLNE    armSP_FFTFwd_CToC_FC32_Radix8_fs_OutOfPlace_unsafe_vfp
139
140unscaledRadix4Loop:
141        CMP        subFFTNum,#1
142         BEQ        End
143         BL        armSP_FFTFwd_CToC_FC32_Radix4_OutOfPlace_unsafe_vfp
144         B        unscaledRadix4Loop
145
146
147End:
148        @// Set return value
149        MOV     result, #OMX_Sts_NoErr
150
151        @// Write function tail
152        M_END
153
154@//    ENDIF                                           @//ARM1136JS
155
156
157    @// Guarding implementation by the processor name
158
159
160
161    .end
162