1@// 2@// Copyright (c) 2013 The WebRTC project authors. All Rights Reserved. 3@// 4@// Use of this source code is governed by a BSD-style license 5@// that can be found in the LICENSE file in the root of the source 6@// tree. An additional intellectual property rights grant can be found 7@// in the file PATENTS. All contributing project authors may 8@// be found in the AUTHORS file in the root of the source tree. 9@// 10@// This file was originally licensed as follows. It has been 11@// relicensed with permission from the copyright holders. 12 13@// 14@// 15@// File Name: armSP_FFT_CToC_SC16_Radix2_fs_unsafe_s.s 16@// OpenMAX DL: v1.0.2 17@// Last Modified Revision: 6693 18@// Last Modified Date: Tue, 10 Jul 2007 19@// 20@// (c) Copyright 2007-2008 ARM Limited. All Rights Reserved. 21@// 22@// 23@// 24@// Description: 25@// Compute a Radix 2 FFT stage for a N point complex signal 26@// 27@// 28 29 30@// Include standard headers 31 32#include "dl/api/arm/armCOMM_s.h" 33#include "dl/api/arm/omxtypes_s.h" 34 35 36@// Import symbols required from other files 37@// (For example tables) 38 39 40 41 42@// Set debugging level 43@//DEBUG_ON SETL {TRUE} 44 45 46 47@// Guarding implementation by the processor name 48 49 50 51@// Guarding implementation by the processor name 52 53 54@//Input Registers 55 56#define pSrc r0 57#define pDst r2 58#define pTwiddle r1 59#define pPingPongBuf r5 60#define subFFTNum r6 61#define subFFTSize r7 62 63 64@//Output Registers 65 66 67@//Local Scratch Registers 68 69#define pointStep r3 70#define outPointStep r3 71#define grpSize r4 72#define setCount r4 73#define step r8 74#define dstStep r8 75 76@// Neon Registers 77 78#define dX0 D0.S16 79#define dX1 D1.S16 80#define dY0 D2.S16 81#define dY1 D3.S16 82#define dX0S32 D0.S32 83#define dX1S32 D1.S32 84#define dY0S32 D2.S32 85#define dY1S32 D3.S32 86 87 88 .macro FFTSTAGE scaled, inverse, name 89 90 @// Define stack arguments 91 92 93 @// update subFFTSize and subFFTNum into RN6 and RN7 for the next stage 94 95 96 MOV subFFTSize,#2 97 LSR grpSize,subFFTNum,#1 98 MOV subFFTNum,grpSize 99 100 101 @// pT0+1 increments pT0 by 8 bytes 102 @// pT0+pointStep = increment of 4*pointStep bytes = 2*grpSize bytes 103 @// Note: outPointStep = pointStep for firststage 104 @// Note: setCount = grpSize/2 (reuse the updated grpSize for setCount) 105 106 MOV pointStep,grpSize,LSL #2 107 RSB step,pointStep,#4 108 109 110 @// Loop on the sets for grp zero: 1 set at a time 111 112grpZeroSetLoop\name: 113 114 VLD1 {dX0S32[0]},[pSrc],pointStep 115 VLD1 {dX1S32[0]},[pSrc],step @// step = -pointStep + 4 116 SUBS setCount,setCount,#1 @// decrement the loop counter 117 118 .ifeqs "\scaled", "TRUE" 119 120 VHADD dY0,dX0,dX1 121 VHSUB dY1,dX0,dX1 122 123 .else 124 125 VADD dY0,dX0,dX1 126 VSUB dY1,dX0,dX1 127 128 129 .endif 130 131 VST1 {dY0S32[0]},[pDst],outPointStep 132 VST1 {dY1S32[0]},[pDst],dstStep @// dstStep = step = -pointStep + 4 133 134 BGT grpZeroSetLoop\name 135 136 137 @// reset pSrc to pDst for the next stage 138 SUB pSrc,pDst,pointStep @// pDst -= 2*grpSize 139 MOV pDst,pPingPongBuf 140 141 .endm 142 143 144 145 M_START armSP_FFTFwd_CToC_SC16_Radix2_fs_OutOfPlace_unsafe,r4 146 FFTSTAGE "FALSE","FALSE",FWD 147 M_END 148 149 150 151 M_START armSP_FFTInv_CToC_SC16_Radix2_fs_OutOfPlace_unsafe,r4 152 FFTSTAGE "FALSE","TRUE",INV 153 M_END 154 155 156 157 M_START armSP_FFTFwd_CToC_SC16_Sfs_Radix2_fs_OutOfPlace_unsafe,r4 158 FFTSTAGE "TRUE","FALSE",FWDSFS 159 M_END 160 161 162 163 M_START armSP_FFTInv_CToC_SC16_Sfs_Radix2_fs_OutOfPlace_unsafe,r4 164 FFTSTAGE "TRUE","TRUE",INVSFS 165 M_END 166 167 168 169 170 .end 171