1@//
2@//  Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
3@//
4@//  Use of this source code is governed by a BSD-style license
5@//  that can be found in the LICENSE file in the root of the source
6@//  tree. An additional intellectual property rights grant can be found
7@//  in the file PATENTS.  All contributing project authors may
8@//  be found in the AUTHORS file in the root of the source tree.
9@//
10@//  This file was originally licensed as follows. It has been
11@//  relicensed with permission from the copyright holders.
12
13@//
14@//
15@// File Name:  armSP_FFT_CToC_SC32_Radix2_fs_unsafe_s.s
16@// OpenMAX DL: v1.0.2
17@// Last Modified Revision:   5995
18@// Last Modified Date:       Fri, 08 Jun 2007
19@//
20@// (c) Copyright 2007-2008 ARM Limited. All Rights Reserved.
21@//
22@//
23@//
24@// Description:
25@// Compute the first stage of a Radix 2 DIT in-order out-of-place FFT
26@// stage for a N point complex signal.
27@//
28
29
30@// Include standard headers
31
32#include "dl/api/arm/armCOMM_s.h"
33#include "dl/api/arm/omxtypes_s.h"
34
35
36@// Import symbols required from other files
37@// (For example tables)
38
39
40
41
42@// Set debugging level
43@//DEBUG_ON    SETL {TRUE}
44
45
46
47@// Guarding implementation by the processor name
48
49
50
51@// Guarding implementation by the processor name
52
53
54@//Input Registers
55
56#define pSrc		r0
57#define pDst		r2
58#define pTwiddle	r1
59#define pPingPongBuf	r5
60#define subFFTNum	r6
61#define subFFTSize	r7
62
63
64@//Output Registers
65
66
67@//Local Scratch Registers
68
69#define pointStep	r3
70#define outPointStep	r3
71#define grpSize		r4
72#define setCount	r4
73#define step		r8
74#define dstStep		r8
75
76@// Neon Registers
77
78#define dX0	D0.S32
79#define dX1	D1.S32
80#define dY0	D2.S32
81#define dY1	D3.S32
82
83
84        .macro FFTSTAGE scaled, inverse, name
85
86        @// Define stack arguments
87
88
89        @// update subFFTSize and subFFTNum into RN6 and RN7 for the next stage
90
91
92        MOV        subFFTSize,#2
93        LSR        grpSize,subFFTNum,#1
94        MOV        subFFTNum,grpSize
95
96
97        @// pT0+1 increments pT0 by 8 bytes
98        @// pT0+pointStep = increment of 8*pointStep bytes = 4*grpSize bytes
99        @// Note: outPointStep = pointStep for firststage
100        @// Note: setCount = grpSize/2 (reuse the updated grpSize for setCount)
101
102        MOV        pointStep,grpSize,LSL #3
103        RSB        step,pointStep,#8
104
105
106        @// Loop on the sets for grp zero
107
108grpZeroSetLoop\name :
109
110        VLD1    dX0,[pSrc],pointStep
111        VLD1    dX1,[pSrc],step                   @// step = -pointStep + 8
112        SUBS    setCount,setCount,#1              @// decrement the loop counter
113
114        .ifeqs "\scaled", "TRUE"
115
116            VHADD    dY0,dX0,dX1
117            VHSUB    dY1,dX0,dX1
118
119        .else
120
121            VADD    dY0,dX0,dX1
122            VSUB    dY1,dX0,dX1
123
124
125        .endif
126
127        VST1    dY0,[pDst],outPointStep
128        VST1    dY1,[pDst],dstStep                  @// dstStep =  step = -pointStep + 8
129
130        BGT     grpZeroSetLoop\name
131
132
133        @// reset pSrc to pDst for the next stage
134        SUB     pSrc,pDst,pointStep                     @// pDst -= 2*grpSize
135        MOV     pDst,pPingPongBuf
136
137        .endm
138
139
140
141        M_START armSP_FFTFwd_CToC_SC32_Radix2_fs_OutOfPlace_unsafe,r4
142        FFTSTAGE "FALSE","FALSE",fwd
143        M_END
144
145
146
147        M_START armSP_FFTInv_CToC_SC32_Radix2_fs_OutOfPlace_unsafe,r4
148        FFTSTAGE "FALSE","TRUE",inv
149        M_END
150
151
152
153        M_START armSP_FFTFwd_CToC_SC32_Sfs_Radix2_fs_OutOfPlace_unsafe,r4
154        FFTSTAGE "TRUE","FALSE",fwdsfs
155        M_END
156
157
158
159        M_START armSP_FFTInv_CToC_SC32_Sfs_Radix2_fs_OutOfPlace_unsafe,r4
160        FFTSTAGE "TRUE","TRUE",invsfs
161        M_END
162
163	.end
164