Targets.cpp revision 70d9b16e951db66152a1d5ecd723edab01267514 
1//===--- Targets.cpp - Implement -arch option and targets -----------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements construction of a TargetInfo object from a
11// target triple.
12//
13//===----------------------------------------------------------------------===//
14
15#include "clang/Basic/TargetInfo.h"
16#include "clang/Basic/Builtins.h"
17#include "clang/Basic/Diagnostic.h"
18#include "clang/Basic/LangOptions.h"
19#include "clang/Basic/MacroBuilder.h"
20#include "clang/Basic/TargetBuiltins.h"
21#include "clang/Basic/TargetOptions.h"
22#include "llvm/ADT/APFloat.h"
23#include "llvm/ADT/OwningPtr.h"
24#include "llvm/ADT/STLExtras.h"
25#include "llvm/ADT/StringRef.h"
26#include "llvm/ADT/StringSwitch.h"
27#include "llvm/ADT/Triple.h"
28#include "llvm/MC/MCSectionMachO.h"
29#include "llvm/Support/ErrorHandling.h"
30#include "llvm/Type.h"
31#include <algorithm>
32using namespace clang;
33
34//===----------------------------------------------------------------------===//
35//  Common code shared among targets.
36//===----------------------------------------------------------------------===//
37
38/// DefineStd - Define a macro name and standard variants.  For example if
39/// MacroName is "unix", then this will define "__unix", "__unix__", and "unix"
40/// when in GNU mode.
41static void DefineStd(MacroBuilder &Builder, StringRef MacroName,
42                      const LangOptions &Opts) {
43  assert(MacroName[0] != '_' && "Identifier should be in the user's namespace");
44
45  // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier
46  // in the user's namespace.
47  if (Opts.GNUMode)
48    Builder.defineMacro(MacroName);
49
50  // Define __unix.
51  Builder.defineMacro("__" + MacroName);
52
53  // Define __unix__.
54  Builder.defineMacro("__" + MacroName + "__");
55}
56
57static void defineCPUMacros(MacroBuilder &Builder, StringRef CPUName,
58                            bool Tuning = true) {
59  Builder.defineMacro("__" + CPUName);
60  Builder.defineMacro("__" + CPUName + "__");
61  if (Tuning)
62    Builder.defineMacro("__tune_" + CPUName + "__");
63}
64
65//===----------------------------------------------------------------------===//
66// Defines specific to certain operating systems.
67//===----------------------------------------------------------------------===//
68
69namespace {
70template<typename TgtInfo>
71class OSTargetInfo : public TgtInfo {
72protected:
73  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
74                            MacroBuilder &Builder) const=0;
75public:
76  OSTargetInfo(const std::string& triple) : TgtInfo(triple) {}
77  virtual void getTargetDefines(const LangOptions &Opts,
78                                MacroBuilder &Builder) const {
79    TgtInfo::getTargetDefines(Opts, Builder);
80    getOSDefines(Opts, TgtInfo::getTriple(), Builder);
81  }
82
83};
84} // end anonymous namespace
85
86
87static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts,
88                             const llvm::Triple &Triple,
89                             StringRef &PlatformName,
90                             VersionTuple &PlatformMinVersion) {
91  Builder.defineMacro("__APPLE_CC__", "5621");
92  Builder.defineMacro("__APPLE__");
93  Builder.defineMacro("__MACH__");
94  Builder.defineMacro("OBJC_NEW_PROPERTIES");
95
96  if (!Opts.ObjCAutoRefCount) {
97    // __weak is always defined, for use in blocks and with objc pointers.
98    Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))");
99
100    // Darwin defines __strong even in C mode (just to nothing).
101    if (Opts.getGC() != LangOptions::NonGC)
102      Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))");
103    else
104      Builder.defineMacro("__strong", "");
105
106    // __unsafe_unretained is defined to nothing in non-ARC mode. We even
107    // allow this in C, since one might have block pointers in structs that
108    // are used in pure C code and in Objective-C ARC.
109    Builder.defineMacro("__unsafe_unretained", "");
110  }
111
112  if (Opts.Static)
113    Builder.defineMacro("__STATIC__");
114  else
115    Builder.defineMacro("__DYNAMIC__");
116
117  if (Opts.POSIXThreads)
118    Builder.defineMacro("_REENTRANT");
119
120  // Get the platform type and version number from the triple.
121  unsigned Maj, Min, Rev;
122  if (Triple.isMacOSX()) {
123    Triple.getMacOSXVersion(Maj, Min, Rev);
124    PlatformName = "macosx";
125  } else {
126    Triple.getOSVersion(Maj, Min, Rev);
127    PlatformName = llvm::Triple::getOSTypeName(Triple.getOS());
128  }
129
130  // If -target arch-pc-win32-macho option specified, we're
131  // generating code for Win32 ABI. No need to emit
132  // __ENVIRONMENT_XX_OS_VERSION_MIN_REQUIRED__.
133  if (PlatformName == "win32") {
134    PlatformMinVersion = VersionTuple(Maj, Min, Rev);
135    return;
136  }
137
138  // Set the appropriate OS version define.
139  if (Triple.getOS() == llvm::Triple::IOS) {
140    assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!");
141    char Str[6];
142    Str[0] = '0' + Maj;
143    Str[1] = '0' + (Min / 10);
144    Str[2] = '0' + (Min % 10);
145    Str[3] = '0' + (Rev / 10);
146    Str[4] = '0' + (Rev % 10);
147    Str[5] = '\0';
148    Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str);
149  } else {
150    // Note that the Driver allows versions which aren't representable in the
151    // define (because we only get a single digit for the minor and micro
152    // revision numbers). So, we limit them to the maximum representable
153    // version.
154    assert(Triple.getEnvironmentName().empty() && "Invalid environment!");
155    assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!");
156    char Str[5];
157    Str[0] = '0' + (Maj / 10);
158    Str[1] = '0' + (Maj % 10);
159    Str[2] = '0' + std::min(Min, 9U);
160    Str[3] = '0' + std::min(Rev, 9U);
161    Str[4] = '\0';
162    Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str);
163  }
164
165  PlatformMinVersion = VersionTuple(Maj, Min, Rev);
166}
167
168namespace {
169template<typename Target>
170class DarwinTargetInfo : public OSTargetInfo<Target> {
171protected:
172  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
173                            MacroBuilder &Builder) const {
174    getDarwinDefines(Builder, Opts, Triple, this->PlatformName,
175                     this->PlatformMinVersion);
176  }
177
178public:
179  DarwinTargetInfo(const std::string& triple) :
180    OSTargetInfo<Target>(triple) {
181      llvm::Triple T = llvm::Triple(triple);
182      this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7);
183      this->MCountName = "\01mcount";
184    }
185
186  virtual std::string isValidSectionSpecifier(StringRef SR) const {
187    // Let MCSectionMachO validate this.
188    StringRef Segment, Section;
189    unsigned TAA, StubSize;
190    bool HasTAA;
191    return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section,
192                                                       TAA, HasTAA, StubSize);
193  }
194
195  virtual const char *getStaticInitSectionSpecifier() const {
196    // FIXME: We should return 0 when building kexts.
197    return "__TEXT,__StaticInit,regular,pure_instructions";
198  }
199
200  /// Darwin does not support protected visibility.  Darwin's "default"
201  /// is very similar to ELF's "protected";  Darwin requires a "weak"
202  /// attribute on declarations that can be dynamically replaced.
203  virtual bool hasProtectedVisibility() const {
204    return false;
205  }
206};
207
208
209// DragonFlyBSD Target
210template<typename Target>
211class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> {
212protected:
213  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
214                            MacroBuilder &Builder) const {
215    // DragonFly defines; list based off of gcc output
216    Builder.defineMacro("__DragonFly__");
217    Builder.defineMacro("__DragonFly_cc_version", "100001");
218    Builder.defineMacro("__ELF__");
219    Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
220    Builder.defineMacro("__tune_i386__");
221    DefineStd(Builder, "unix", Opts);
222  }
223public:
224  DragonFlyBSDTargetInfo(const std::string &triple)
225    : OSTargetInfo<Target>(triple) {
226      this->UserLabelPrefix = "";
227
228      llvm::Triple Triple(triple);
229      switch (Triple.getArch()) {
230        default:
231        case llvm::Triple::x86:
232        case llvm::Triple::x86_64:
233          this->MCountName = ".mcount";
234          break;
235      }
236  }
237};
238
239// FreeBSD Target
240template<typename Target>
241class FreeBSDTargetInfo : public OSTargetInfo<Target> {
242protected:
243  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
244                            MacroBuilder &Builder) const {
245    // FreeBSD defines; list based off of gcc output
246
247    unsigned Release = Triple.getOSMajorVersion();
248    if (Release == 0U)
249      Release = 8;
250
251    Builder.defineMacro("__FreeBSD__", Twine(Release));
252    Builder.defineMacro("__FreeBSD_cc_version", Twine(Release * 100000U + 1U));
253    Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
254    DefineStd(Builder, "unix", Opts);
255    Builder.defineMacro("__ELF__");
256  }
257public:
258  FreeBSDTargetInfo(const std::string &triple)
259    : OSTargetInfo<Target>(triple) {
260      this->UserLabelPrefix = "";
261
262      llvm::Triple Triple(triple);
263      switch (Triple.getArch()) {
264        default:
265        case llvm::Triple::x86:
266        case llvm::Triple::x86_64:
267          this->MCountName = ".mcount";
268          break;
269        case llvm::Triple::mips:
270        case llvm::Triple::mipsel:
271        case llvm::Triple::ppc:
272        case llvm::Triple::ppc64:
273          this->MCountName = "_mcount";
274          break;
275        case llvm::Triple::arm:
276          this->MCountName = "__mcount";
277          break;
278      }
279
280    }
281};
282
283// Minix Target
284template<typename Target>
285class MinixTargetInfo : public OSTargetInfo<Target> {
286protected:
287  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
288                            MacroBuilder &Builder) const {
289    // Minix defines
290
291    Builder.defineMacro("__minix", "3");
292    Builder.defineMacro("_EM_WSIZE", "4");
293    Builder.defineMacro("_EM_PSIZE", "4");
294    Builder.defineMacro("_EM_SSIZE", "2");
295    Builder.defineMacro("_EM_LSIZE", "4");
296    Builder.defineMacro("_EM_FSIZE", "4");
297    Builder.defineMacro("_EM_DSIZE", "8");
298    Builder.defineMacro("__ELF__");
299    DefineStd(Builder, "unix", Opts);
300  }
301public:
302  MinixTargetInfo(const std::string &triple)
303    : OSTargetInfo<Target>(triple) {
304      this->UserLabelPrefix = "";
305    }
306};
307
308// Linux target
309template<typename Target>
310class LinuxTargetInfo : public OSTargetInfo<Target> {
311protected:
312  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
313                            MacroBuilder &Builder) const {
314    // Linux defines; list based off of gcc output
315    DefineStd(Builder, "unix", Opts);
316    DefineStd(Builder, "linux", Opts);
317    Builder.defineMacro("__gnu_linux__");
318    Builder.defineMacro("__ELF__");
319    if (Triple.getEnvironment() == llvm::Triple::ANDROIDEABI)
320      Builder.defineMacro("__ANDROID__", "1");
321    if (Opts.POSIXThreads)
322      Builder.defineMacro("_REENTRANT");
323    if (Opts.CPlusPlus)
324      Builder.defineMacro("_GNU_SOURCE");
325  }
326public:
327  LinuxTargetInfo(const std::string& triple)
328    : OSTargetInfo<Target>(triple) {
329    this->UserLabelPrefix = "";
330    this->WIntType = TargetInfo::UnsignedInt;
331  }
332
333  virtual const char *getStaticInitSectionSpecifier() const {
334    return ".text.startup";
335  }
336};
337
338// NetBSD Target
339template<typename Target>
340class NetBSDTargetInfo : public OSTargetInfo<Target> {
341protected:
342  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
343                            MacroBuilder &Builder) const {
344    // NetBSD defines; list based off of gcc output
345    Builder.defineMacro("__NetBSD__");
346    Builder.defineMacro("__unix__");
347    Builder.defineMacro("__ELF__");
348    if (Opts.POSIXThreads)
349      Builder.defineMacro("_POSIX_THREADS");
350  }
351public:
352  NetBSDTargetInfo(const std::string &triple)
353    : OSTargetInfo<Target>(triple) {
354      this->UserLabelPrefix = "";
355    }
356};
357
358// OpenBSD Target
359template<typename Target>
360class OpenBSDTargetInfo : public OSTargetInfo<Target> {
361protected:
362  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
363                            MacroBuilder &Builder) const {
364    // OpenBSD defines; list based off of gcc output
365
366    Builder.defineMacro("__OpenBSD__");
367    DefineStd(Builder, "unix", Opts);
368    Builder.defineMacro("__ELF__");
369    if (Opts.POSIXThreads)
370      Builder.defineMacro("_REENTRANT");
371  }
372public:
373  OpenBSDTargetInfo(const std::string &triple)
374    : OSTargetInfo<Target>(triple) {
375      this->UserLabelPrefix = "";
376
377      llvm::Triple Triple(triple);
378      switch (Triple.getArch()) {
379        default:
380        case llvm::Triple::x86:
381        case llvm::Triple::x86_64:
382        case llvm::Triple::arm:
383	case llvm::Triple::sparc:
384          this->MCountName = "__mcount";
385          break;
386        case llvm::Triple::mips64:
387        case llvm::Triple::mips64el:
388        case llvm::Triple::ppc:
389	case llvm::Triple::sparcv9:
390          this->MCountName = "_mcount";
391          break;
392      }
393  }
394};
395
396// PSP Target
397template<typename Target>
398class PSPTargetInfo : public OSTargetInfo<Target> {
399protected:
400  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
401                            MacroBuilder &Builder) const {
402    // PSP defines; list based on the output of the pspdev gcc toolchain.
403    Builder.defineMacro("PSP");
404    Builder.defineMacro("_PSP");
405    Builder.defineMacro("__psp__");
406    Builder.defineMacro("__ELF__");
407  }
408public:
409  PSPTargetInfo(const std::string& triple)
410    : OSTargetInfo<Target>(triple) {
411    this->UserLabelPrefix = "";
412  }
413};
414
415// PS3 PPU Target
416template<typename Target>
417class PS3PPUTargetInfo : public OSTargetInfo<Target> {
418protected:
419  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
420                            MacroBuilder &Builder) const {
421    // PS3 PPU defines.
422    Builder.defineMacro("__PPC__");
423    Builder.defineMacro("__PPU__");
424    Builder.defineMacro("__CELLOS_LV2__");
425    Builder.defineMacro("__ELF__");
426    Builder.defineMacro("__LP32__");
427    Builder.defineMacro("_ARCH_PPC64");
428    Builder.defineMacro("__powerpc64__");
429  }
430public:
431  PS3PPUTargetInfo(const std::string& triple)
432    : OSTargetInfo<Target>(triple) {
433    this->UserLabelPrefix = "";
434    this->LongWidth = this->LongAlign = 32;
435    this->PointerWidth = this->PointerAlign = 32;
436    this->IntMaxType = TargetInfo::SignedLongLong;
437    this->UIntMaxType = TargetInfo::UnsignedLongLong;
438    this->Int64Type = TargetInfo::SignedLongLong;
439    this->SizeType = TargetInfo::UnsignedInt;
440    this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
441                              "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
442  }
443};
444
445// FIXME: Need a real SPU target.
446// PS3 SPU Target
447template<typename Target>
448class PS3SPUTargetInfo : public OSTargetInfo<Target> {
449protected:
450  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
451                            MacroBuilder &Builder) const {
452    // PS3 PPU defines.
453    Builder.defineMacro("__SPU__");
454    Builder.defineMacro("__ELF__");
455  }
456public:
457  PS3SPUTargetInfo(const std::string& triple)
458    : OSTargetInfo<Target>(triple) {
459    this->UserLabelPrefix = "";
460  }
461};
462
463// AuroraUX target
464template<typename Target>
465class AuroraUXTargetInfo : public OSTargetInfo<Target> {
466protected:
467  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
468                            MacroBuilder &Builder) const {
469    DefineStd(Builder, "sun", Opts);
470    DefineStd(Builder, "unix", Opts);
471    Builder.defineMacro("__ELF__");
472    Builder.defineMacro("__svr4__");
473    Builder.defineMacro("__SVR4");
474  }
475public:
476  AuroraUXTargetInfo(const std::string& triple)
477    : OSTargetInfo<Target>(triple) {
478    this->UserLabelPrefix = "";
479    this->WCharType = this->SignedLong;
480    // FIXME: WIntType should be SignedLong
481  }
482};
483
484// Solaris target
485template<typename Target>
486class SolarisTargetInfo : public OSTargetInfo<Target> {
487protected:
488  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
489                            MacroBuilder &Builder) const {
490    DefineStd(Builder, "sun", Opts);
491    DefineStd(Builder, "unix", Opts);
492    Builder.defineMacro("__ELF__");
493    Builder.defineMacro("__svr4__");
494    Builder.defineMacro("__SVR4");
495    // Solaris headers require _XOPEN_SOURCE to be set to 600 for C99 and
496    // newer, but to 500 for everything else.  feature_test.h has a check to
497    // ensure that you are not using C99 with an old version of X/Open or C89
498    // with a new version.
499    if (Opts.C99 || Opts.C11)
500      Builder.defineMacro("_XOPEN_SOURCE", "600");
501    else
502      Builder.defineMacro("_XOPEN_SOURCE", "500");
503    if (Opts.CPlusPlus)
504      Builder.defineMacro("__C99FEATURES__");
505    Builder.defineMacro("_LARGEFILE_SOURCE");
506    Builder.defineMacro("_LARGEFILE64_SOURCE");
507    Builder.defineMacro("__EXTENSIONS__");
508    Builder.defineMacro("_REENTRANT");
509  }
510public:
511  SolarisTargetInfo(const std::string& triple)
512    : OSTargetInfo<Target>(triple) {
513    this->UserLabelPrefix = "";
514    this->WCharType = this->SignedInt;
515    // FIXME: WIntType should be SignedLong
516  }
517};
518
519// Windows target
520template<typename Target>
521class WindowsTargetInfo : public OSTargetInfo<Target> {
522protected:
523  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
524                            MacroBuilder &Builder) const {
525    Builder.defineMacro("_WIN32");
526  }
527  void getVisualStudioDefines(const LangOptions &Opts,
528                              MacroBuilder &Builder) const {
529    if (Opts.CPlusPlus) {
530      if (Opts.RTTI)
531        Builder.defineMacro("_CPPRTTI");
532
533      if (Opts.Exceptions)
534        Builder.defineMacro("_CPPUNWIND");
535    }
536
537    if (!Opts.CharIsSigned)
538      Builder.defineMacro("_CHAR_UNSIGNED");
539
540    // FIXME: POSIXThreads isn't exactly the option this should be defined for,
541    //        but it works for now.
542    if (Opts.POSIXThreads)
543      Builder.defineMacro("_MT");
544
545    if (Opts.MSCVersion != 0)
546      Builder.defineMacro("_MSC_VER", Twine(Opts.MSCVersion));
547
548    if (Opts.MicrosoftExt) {
549      Builder.defineMacro("_MSC_EXTENSIONS");
550
551      if (Opts.CPlusPlus0x) {
552        Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED");
553        Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED");
554        Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED");
555      }
556    }
557
558    Builder.defineMacro("_INTEGRAL_MAX_BITS", "64");
559  }
560
561public:
562  WindowsTargetInfo(const std::string &triple)
563    : OSTargetInfo<Target>(triple) {}
564};
565
566} // end anonymous namespace.
567
568//===----------------------------------------------------------------------===//
569// Specific target implementations.
570//===----------------------------------------------------------------------===//
571
572namespace {
573// PPC abstract base class
574class PPCTargetInfo : public TargetInfo {
575  static const Builtin::Info BuiltinInfo[];
576  static const char * const GCCRegNames[];
577  static const TargetInfo::GCCRegAlias GCCRegAliases[];
578public:
579  PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {
580    LongDoubleWidth = LongDoubleAlign = 128;
581    LongDoubleFormat = &llvm::APFloat::PPCDoubleDouble;
582  }
583
584  virtual void getTargetBuiltins(const Builtin::Info *&Records,
585                                 unsigned &NumRecords) const {
586    Records = BuiltinInfo;
587    NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin;
588  }
589
590  virtual bool isCLZForZeroUndef() const { return false; }
591
592  virtual void getTargetDefines(const LangOptions &Opts,
593                                MacroBuilder &Builder) const;
594
595  virtual bool hasFeature(StringRef Feature) const;
596
597  virtual void getGCCRegNames(const char * const *&Names,
598                              unsigned &NumNames) const;
599  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
600                                unsigned &NumAliases) const;
601  virtual bool validateAsmConstraint(const char *&Name,
602                                     TargetInfo::ConstraintInfo &Info) const {
603    switch (*Name) {
604    default: return false;
605    case 'O': // Zero
606      break;
607    case 'b': // Base register
608    case 'f': // Floating point register
609      Info.setAllowsRegister();
610      break;
611    // FIXME: The following are added to allow parsing.
612    // I just took a guess at what the actions should be.
613    // Also, is more specific checking needed?  I.e. specific registers?
614    case 'd': // Floating point register (containing 64-bit value)
615    case 'v': // Altivec vector register
616      Info.setAllowsRegister();
617      break;
618    case 'w':
619      switch (Name[1]) {
620        case 'd':// VSX vector register to hold vector double data
621        case 'f':// VSX vector register to hold vector float data
622        case 's':// VSX vector register to hold scalar float data
623        case 'a':// Any VSX register
624          break;
625        default:
626          return false;
627      }
628      Info.setAllowsRegister();
629      Name++; // Skip over 'w'.
630      break;
631    case 'h': // `MQ', `CTR', or `LINK' register
632    case 'q': // `MQ' register
633    case 'c': // `CTR' register
634    case 'l': // `LINK' register
635    case 'x': // `CR' register (condition register) number 0
636    case 'y': // `CR' register (condition register)
637    case 'z': // `XER[CA]' carry bit (part of the XER register)
638      Info.setAllowsRegister();
639      break;
640    case 'I': // Signed 16-bit constant
641    case 'J': // Unsigned 16-bit constant shifted left 16 bits
642              //  (use `L' instead for SImode constants)
643    case 'K': // Unsigned 16-bit constant
644    case 'L': // Signed 16-bit constant shifted left 16 bits
645    case 'M': // Constant larger than 31
646    case 'N': // Exact power of 2
647    case 'P': // Constant whose negation is a signed 16-bit constant
648    case 'G': // Floating point constant that can be loaded into a
649              // register with one instruction per word
650    case 'H': // Integer/Floating point constant that can be loaded
651              // into a register using three instructions
652      break;
653    case 'm': // Memory operand. Note that on PowerPC targets, m can
654              // include addresses that update the base register. It
655              // is therefore only safe to use `m' in an asm statement
656              // if that asm statement accesses the operand exactly once.
657              // The asm statement must also use `%U<opno>' as a
658              // placeholder for the "update" flag in the corresponding
659              // load or store instruction. For example:
660              // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val));
661              // is correct but:
662              // asm ("st %1,%0" : "=m" (mem) : "r" (val));
663              // is not. Use es rather than m if you don't want the base
664              // register to be updated.
665    case 'e':
666      if (Name[1] != 's')
667          return false;
668              // es: A "stable" memory operand; that is, one which does not
669              // include any automodification of the base register. Unlike
670              // `m', this constraint can be used in asm statements that
671              // might access the operand several times, or that might not
672              // access it at all.
673      Info.setAllowsMemory();
674      Name++; // Skip over 'e'.
675      break;
676    case 'Q': // Memory operand that is an offset from a register (it is
677              // usually better to use `m' or `es' in asm statements)
678    case 'Z': // Memory operand that is an indexed or indirect from a
679              // register (it is usually better to use `m' or `es' in
680              // asm statements)
681      Info.setAllowsMemory();
682      Info.setAllowsRegister();
683      break;
684    case 'R': // AIX TOC entry
685    case 'a': // Address operand that is an indexed or indirect from a
686              // register (`p' is preferable for asm statements)
687    case 'S': // Constant suitable as a 64-bit mask operand
688    case 'T': // Constant suitable as a 32-bit mask operand
689    case 'U': // System V Release 4 small data area reference
690    case 't': // AND masks that can be performed by two rldic{l, r}
691              // instructions
692    case 'W': // Vector constant that does not require memory
693    case 'j': // Vector constant that is all zeros.
694      break;
695    // End FIXME.
696    }
697    return true;
698  }
699  virtual const char *getClobbers() const {
700    return "";
701  }
702};
703
704const Builtin::Info PPCTargetInfo::BuiltinInfo[] = {
705#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
706#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
707                                              ALL_LANGUAGES },
708#include "clang/Basic/BuiltinsPPC.def"
709};
710
711
712/// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
713/// #defines that are not tied to a specific subtarget.
714void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
715                                     MacroBuilder &Builder) const {
716  // Target identification.
717  Builder.defineMacro("__ppc__");
718  Builder.defineMacro("_ARCH_PPC");
719  Builder.defineMacro("__powerpc__");
720  Builder.defineMacro("__POWERPC__");
721  if (PointerWidth == 64) {
722    Builder.defineMacro("_ARCH_PPC64");
723    Builder.defineMacro("_LP64");
724    Builder.defineMacro("__LP64__");
725    Builder.defineMacro("__powerpc64__");
726    Builder.defineMacro("__ppc64__");
727  } else {
728    Builder.defineMacro("__ppc__");
729  }
730
731  // Target properties.
732  if (getTriple().getOS() != llvm::Triple::NetBSD)
733    Builder.defineMacro("_BIG_ENDIAN");
734  Builder.defineMacro("__BIG_ENDIAN__");
735
736  // Subtarget options.
737  Builder.defineMacro("__NATURAL_ALIGNMENT__");
738  Builder.defineMacro("__REGISTER_PREFIX__", "");
739
740  // FIXME: Should be controlled by command line option.
741  Builder.defineMacro("__LONG_DOUBLE_128__");
742
743  if (Opts.AltiVec) {
744    Builder.defineMacro("__VEC__", "10206");
745    Builder.defineMacro("__ALTIVEC__");
746  }
747}
748
749bool PPCTargetInfo::hasFeature(StringRef Feature) const {
750  return Feature == "powerpc";
751}
752
753
754const char * const PPCTargetInfo::GCCRegNames[] = {
755  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
756  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
757  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
758  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
759  "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
760  "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
761  "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
762  "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
763  "mq", "lr", "ctr", "ap",
764  "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
765  "xer",
766  "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
767  "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15",
768  "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",
769  "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
770  "vrsave", "vscr",
771  "spe_acc", "spefscr",
772  "sfp"
773};
774
775void PPCTargetInfo::getGCCRegNames(const char * const *&Names,
776                                   unsigned &NumNames) const {
777  Names = GCCRegNames;
778  NumNames = llvm::array_lengthof(GCCRegNames);
779}
780
781const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
782  // While some of these aliases do map to different registers
783  // they still share the same register name.
784  { { "0" }, "r0" },
785  { { "1"}, "r1" },
786  { { "2" }, "r2" },
787  { { "3" }, "r3" },
788  { { "4" }, "r4" },
789  { { "5" }, "r5" },
790  { { "6" }, "r6" },
791  { { "7" }, "r7" },
792  { { "8" }, "r8" },
793  { { "9" }, "r9" },
794  { { "10" }, "r10" },
795  { { "11" }, "r11" },
796  { { "12" }, "r12" },
797  { { "13" }, "r13" },
798  { { "14" }, "r14" },
799  { { "15" }, "r15" },
800  { { "16" }, "r16" },
801  { { "17" }, "r17" },
802  { { "18" }, "r18" },
803  { { "19" }, "r19" },
804  { { "20" }, "r20" },
805  { { "21" }, "r21" },
806  { { "22" }, "r22" },
807  { { "23" }, "r23" },
808  { { "24" }, "r24" },
809  { { "25" }, "r25" },
810  { { "26" }, "r26" },
811  { { "27" }, "r27" },
812  { { "28" }, "r28" },
813  { { "29" }, "r29" },
814  { { "30" }, "r30" },
815  { { "31" }, "r31" },
816  { { "fr0" }, "f0" },
817  { { "fr1" }, "f1" },
818  { { "fr2" }, "f2" },
819  { { "fr3" }, "f3" },
820  { { "fr4" }, "f4" },
821  { { "fr5" }, "f5" },
822  { { "fr6" }, "f6" },
823  { { "fr7" }, "f7" },
824  { { "fr8" }, "f8" },
825  { { "fr9" }, "f9" },
826  { { "fr10" }, "f10" },
827  { { "fr11" }, "f11" },
828  { { "fr12" }, "f12" },
829  { { "fr13" }, "f13" },
830  { { "fr14" }, "f14" },
831  { { "fr15" }, "f15" },
832  { { "fr16" }, "f16" },
833  { { "fr17" }, "f17" },
834  { { "fr18" }, "f18" },
835  { { "fr19" }, "f19" },
836  { { "fr20" }, "f20" },
837  { { "fr21" }, "f21" },
838  { { "fr22" }, "f22" },
839  { { "fr23" }, "f23" },
840  { { "fr24" }, "f24" },
841  { { "fr25" }, "f25" },
842  { { "fr26" }, "f26" },
843  { { "fr27" }, "f27" },
844  { { "fr28" }, "f28" },
845  { { "fr29" }, "f29" },
846  { { "fr30" }, "f30" },
847  { { "fr31" }, "f31" },
848  { { "cc" }, "cr0" },
849};
850
851void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
852                                     unsigned &NumAliases) const {
853  Aliases = GCCRegAliases;
854  NumAliases = llvm::array_lengthof(GCCRegAliases);
855}
856} // end anonymous namespace.
857
858namespace {
859class PPC32TargetInfo : public PPCTargetInfo {
860public:
861  PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) {
862    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
863                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
864
865    switch (getTriple().getOS()) {
866    case llvm::Triple::Linux:
867    case llvm::Triple::FreeBSD:
868    case llvm::Triple::NetBSD:
869      SizeType = UnsignedInt;
870      PtrDiffType = SignedInt;
871      IntPtrType = SignedInt;
872      break;
873    default:
874      break;
875    }
876
877    if (getTriple().getOS() == llvm::Triple::FreeBSD) {
878      LongDoubleWidth = LongDoubleAlign = 64;
879      LongDoubleFormat = &llvm::APFloat::IEEEdouble;
880    }
881  }
882
883  virtual const char *getVAListDeclaration() const {
884    // This is the ELF definition, and is overridden by the Darwin sub-target
885    return "typedef struct __va_list_tag {"
886           "  unsigned char gpr;"
887           "  unsigned char fpr;"
888           "  unsigned short reserved;"
889           "  void* overflow_arg_area;"
890           "  void* reg_save_area;"
891           "} __builtin_va_list[1];";
892  }
893};
894} // end anonymous namespace.
895
896namespace {
897class PPC64TargetInfo : public PPCTargetInfo {
898public:
899  PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) {
900    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
901    IntMaxType = SignedLong;
902    UIntMaxType = UnsignedLong;
903    Int64Type = SignedLong;
904    DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
905                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64";
906
907    if (getTriple().getOS() == llvm::Triple::FreeBSD) {
908      LongDoubleWidth = LongDoubleAlign = 64;
909      LongDoubleFormat = &llvm::APFloat::IEEEdouble;
910    }
911  }
912  virtual const char *getVAListDeclaration() const {
913    return "typedef char* __builtin_va_list;";
914  }
915};
916} // end anonymous namespace.
917
918
919namespace {
920class DarwinPPC32TargetInfo :
921  public DarwinTargetInfo<PPC32TargetInfo> {
922public:
923  DarwinPPC32TargetInfo(const std::string& triple)
924    : DarwinTargetInfo<PPC32TargetInfo>(triple) {
925    HasAlignMac68kSupport = true;
926    BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool?
927    LongLongAlign = 32;
928    SuitableAlign = 128;
929    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
930                        "i64:32:64-f32:32:32-f64:64:64-v128:128:128-n32";
931  }
932  virtual const char *getVAListDeclaration() const {
933    return "typedef char* __builtin_va_list;";
934  }
935};
936
937class DarwinPPC64TargetInfo :
938  public DarwinTargetInfo<PPC64TargetInfo> {
939public:
940  DarwinPPC64TargetInfo(const std::string& triple)
941    : DarwinTargetInfo<PPC64TargetInfo>(triple) {
942    HasAlignMac68kSupport = true;
943    SuitableAlign = 128;
944  }
945};
946} // end anonymous namespace.
947
948namespace {
949  static const unsigned PTXAddrSpaceMap[] = {
950    0,    // opencl_global
951    4,    // opencl_local
952    1     // opencl_constant
953  };
954  class PTXTargetInfo : public TargetInfo {
955    static const char * const GCCRegNames[];
956    static const Builtin::Info BuiltinInfo[];
957    std::vector<llvm::StringRef> AvailableFeatures;
958  public:
959    PTXTargetInfo(const std::string& triple) : TargetInfo(triple) {
960      BigEndian = false;
961      TLSSupported = false;
962      LongWidth = LongAlign = 64;
963      AddrSpaceMap = &PTXAddrSpaceMap;
964      // Define available target features
965      // These must be defined in sorted order!
966      AvailableFeatures.push_back("compute10");
967      AvailableFeatures.push_back("compute11");
968      AvailableFeatures.push_back("compute12");
969      AvailableFeatures.push_back("compute13");
970      AvailableFeatures.push_back("compute20");
971      AvailableFeatures.push_back("double");
972      AvailableFeatures.push_back("no-fma");
973      AvailableFeatures.push_back("ptx20");
974      AvailableFeatures.push_back("ptx21");
975      AvailableFeatures.push_back("ptx22");
976      AvailableFeatures.push_back("ptx23");
977      AvailableFeatures.push_back("sm10");
978      AvailableFeatures.push_back("sm11");
979      AvailableFeatures.push_back("sm12");
980      AvailableFeatures.push_back("sm13");
981      AvailableFeatures.push_back("sm20");
982      AvailableFeatures.push_back("sm21");
983      AvailableFeatures.push_back("sm22");
984      AvailableFeatures.push_back("sm23");
985    }
986    virtual void getTargetDefines(const LangOptions &Opts,
987                                  MacroBuilder &Builder) const {
988      Builder.defineMacro("__PTX__");
989    }
990    virtual void getTargetBuiltins(const Builtin::Info *&Records,
991                                   unsigned &NumRecords) const {
992      Records = BuiltinInfo;
993      NumRecords = clang::PTX::LastTSBuiltin-Builtin::FirstTSBuiltin;
994    }
995    virtual bool hasFeature(StringRef Feature) const {
996      return Feature == "ptx";
997    }
998
999    virtual void getGCCRegNames(const char * const *&Names,
1000                                unsigned &NumNames) const;
1001    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1002                                  unsigned &NumAliases) const {
1003      // No aliases.
1004      Aliases = 0;
1005      NumAliases = 0;
1006    }
1007    virtual bool validateAsmConstraint(const char *&Name,
1008                                       TargetInfo::ConstraintInfo &info) const {
1009      // FIXME: implement
1010      return true;
1011    }
1012    virtual const char *getClobbers() const {
1013      // FIXME: Is this really right?
1014      return "";
1015    }
1016    virtual const char *getVAListDeclaration() const {
1017      // FIXME: implement
1018      return "typedef char* __builtin_va_list;";
1019    }
1020
1021    virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1022                                   StringRef Name,
1023                                   bool Enabled) const;
1024  };
1025
1026  const Builtin::Info PTXTargetInfo::BuiltinInfo[] = {
1027#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1028#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1029                                              ALL_LANGUAGES },
1030#include "clang/Basic/BuiltinsPTX.def"
1031  };
1032
1033  const char * const PTXTargetInfo::GCCRegNames[] = {
1034    "r0"
1035  };
1036
1037  void PTXTargetInfo::getGCCRegNames(const char * const *&Names,
1038                                     unsigned &NumNames) const {
1039    Names = GCCRegNames;
1040    NumNames = llvm::array_lengthof(GCCRegNames);
1041  }
1042
1043  bool PTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1044                                        StringRef Name,
1045                                        bool Enabled) const {
1046    if(std::binary_search(AvailableFeatures.begin(), AvailableFeatures.end(),
1047                          Name)) {
1048      Features[Name] = Enabled;
1049      return true;
1050    } else {
1051      return false;
1052    }
1053  }
1054
1055  class PTX32TargetInfo : public PTXTargetInfo {
1056  public:
1057  PTX32TargetInfo(const std::string& triple) : PTXTargetInfo(triple) {
1058      PointerWidth = PointerAlign = 32;
1059      SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt;
1060      DescriptionString
1061        = "e-p:32:32-i64:64:64-f64:64:64-n1:8:16:32:64";
1062    }
1063  };
1064
1065  class PTX64TargetInfo : public PTXTargetInfo {
1066  public:
1067  PTX64TargetInfo(const std::string& triple) : PTXTargetInfo(triple) {
1068      PointerWidth = PointerAlign = 64;
1069      SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong;
1070      DescriptionString
1071        = "e-p:64:64-i64:64:64-f64:64:64-n1:8:16:32:64";
1072    }
1073  };
1074}
1075
1076namespace {
1077// MBlaze abstract base class
1078class MBlazeTargetInfo : public TargetInfo {
1079  static const char * const GCCRegNames[];
1080  static const TargetInfo::GCCRegAlias GCCRegAliases[];
1081
1082public:
1083  MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) {
1084    DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16";
1085  }
1086
1087  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1088                                 unsigned &NumRecords) const {
1089    // FIXME: Implement.
1090    Records = 0;
1091    NumRecords = 0;
1092  }
1093
1094  virtual void getTargetDefines(const LangOptions &Opts,
1095                                MacroBuilder &Builder) const;
1096
1097  virtual bool hasFeature(StringRef Feature) const {
1098    return Feature == "mblaze";
1099  }
1100
1101  virtual const char *getVAListDeclaration() const {
1102    return "typedef char* __builtin_va_list;";
1103  }
1104  virtual const char *getTargetPrefix() const {
1105    return "mblaze";
1106  }
1107  virtual void getGCCRegNames(const char * const *&Names,
1108                              unsigned &NumNames) const;
1109  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1110                                unsigned &NumAliases) const;
1111  virtual bool validateAsmConstraint(const char *&Name,
1112                                     TargetInfo::ConstraintInfo &Info) const {
1113    switch (*Name) {
1114    default: return false;
1115    case 'O': // Zero
1116      return true;
1117    case 'b': // Base register
1118    case 'f': // Floating point register
1119      Info.setAllowsRegister();
1120      return true;
1121    }
1122  }
1123  virtual const char *getClobbers() const {
1124    return "";
1125  }
1126};
1127
1128/// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific
1129/// #defines that are not tied to a specific subtarget.
1130void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts,
1131                                     MacroBuilder &Builder) const {
1132  // Target identification.
1133  Builder.defineMacro("__microblaze__");
1134  Builder.defineMacro("_ARCH_MICROBLAZE");
1135  Builder.defineMacro("__MICROBLAZE__");
1136
1137  // Target properties.
1138  Builder.defineMacro("_BIG_ENDIAN");
1139  Builder.defineMacro("__BIG_ENDIAN__");
1140
1141  // Subtarget options.
1142  Builder.defineMacro("__REGISTER_PREFIX__", "");
1143}
1144
1145
1146const char * const MBlazeTargetInfo::GCCRegNames[] = {
1147  "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
1148  "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
1149  "r16",  "r17",  "r18",  "r19",  "r20",  "r21",  "r22",  "r23",
1150  "r24",  "r25",  "r26",  "r27",  "r28",  "r29",  "r30",  "r31",
1151  "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
1152  "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
1153  "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
1154  "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
1155  "hi",   "lo",   "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4",
1156  "$fcc5","$fcc6","$fcc7","$ap",  "$rap", "$frp"
1157};
1158
1159void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names,
1160                                   unsigned &NumNames) const {
1161  Names = GCCRegNames;
1162  NumNames = llvm::array_lengthof(GCCRegNames);
1163}
1164
1165const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = {
1166  { {"f0"},  "r0" },
1167  { {"f1"},  "r1" },
1168  { {"f2"},  "r2" },
1169  { {"f3"},  "r3" },
1170  { {"f4"},  "r4" },
1171  { {"f5"},  "r5" },
1172  { {"f6"},  "r6" },
1173  { {"f7"},  "r7" },
1174  { {"f8"},  "r8" },
1175  { {"f9"},  "r9" },
1176  { {"f10"}, "r10" },
1177  { {"f11"}, "r11" },
1178  { {"f12"}, "r12" },
1179  { {"f13"}, "r13" },
1180  { {"f14"}, "r14" },
1181  { {"f15"}, "r15" },
1182  { {"f16"}, "r16" },
1183  { {"f17"}, "r17" },
1184  { {"f18"}, "r18" },
1185  { {"f19"}, "r19" },
1186  { {"f20"}, "r20" },
1187  { {"f21"}, "r21" },
1188  { {"f22"}, "r22" },
1189  { {"f23"}, "r23" },
1190  { {"f24"}, "r24" },
1191  { {"f25"}, "r25" },
1192  { {"f26"}, "r26" },
1193  { {"f27"}, "r27" },
1194  { {"f28"}, "r28" },
1195  { {"f29"}, "r29" },
1196  { {"f30"}, "r30" },
1197  { {"f31"}, "r31" },
1198};
1199
1200void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
1201                                     unsigned &NumAliases) const {
1202  Aliases = GCCRegAliases;
1203  NumAliases = llvm::array_lengthof(GCCRegAliases);
1204}
1205} // end anonymous namespace.
1206
1207namespace {
1208// Namespace for x86 abstract base class
1209const Builtin::Info BuiltinInfo[] = {
1210#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1211#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1212                                              ALL_LANGUAGES },
1213#include "clang/Basic/BuiltinsX86.def"
1214};
1215
1216static const char* const GCCRegNames[] = {
1217  "ax", "dx", "cx", "bx", "si", "di", "bp", "sp",
1218  "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)",
1219  "argp", "flags", "fpcr", "fpsr", "dirflag", "frame",
1220  "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
1221  "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7",
1222  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
1223  "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
1224  "ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7",
1225  "ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15",
1226};
1227
1228const TargetInfo::AddlRegName AddlRegNames[] = {
1229  { { "al", "ah", "eax", "rax" }, 0 },
1230  { { "bl", "bh", "ebx", "rbx" }, 3 },
1231  { { "cl", "ch", "ecx", "rcx" }, 2 },
1232  { { "dl", "dh", "edx", "rdx" }, 1 },
1233  { { "esi", "rsi" }, 4 },
1234  { { "edi", "rdi" }, 5 },
1235  { { "esp", "rsp" }, 7 },
1236  { { "ebp", "rbp" }, 6 },
1237};
1238
1239// X86 target abstract base class; x86-32 and x86-64 are very close, so
1240// most of the implementation can be shared.
1241class X86TargetInfo : public TargetInfo {
1242  enum X86SSEEnum {
1243    NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2
1244  } SSELevel;
1245  enum MMX3DNowEnum {
1246    NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon
1247  } MMX3DNowLevel;
1248
1249  bool HasAES;
1250  bool HasLZCNT;
1251  bool HasBMI;
1252  bool HasBMI2;
1253  bool HasPOPCNT;
1254  bool HasFMA4;
1255
1256  /// \brief Enumeration of all of the X86 CPUs supported by Clang.
1257  ///
1258  /// Each enumeration represents a particular CPU supported by Clang. These
1259  /// loosely correspond to the options passed to '-march' or '-mtune' flags.
1260  enum CPUKind {
1261    CK_Generic,
1262
1263    /// \name i386
1264    /// i386-generation processors.
1265    //@{
1266    CK_i386,
1267    //@}
1268
1269    /// \name i486
1270    /// i486-generation processors.
1271    //@{
1272    CK_i486,
1273    CK_WinChipC6,
1274    CK_WinChip2,
1275    CK_C3,
1276    //@}
1277
1278    /// \name i586
1279    /// i586-generation processors, P5 microarchitecture based.
1280    //@{
1281    CK_i586,
1282    CK_Pentium,
1283    CK_PentiumMMX,
1284    //@}
1285
1286    /// \name i686
1287    /// i686-generation processors, P6 / Pentium M microarchitecture based.
1288    //@{
1289    CK_i686,
1290    CK_PentiumPro,
1291    CK_Pentium2,
1292    CK_Pentium3,
1293    CK_Pentium3M,
1294    CK_PentiumM,
1295    CK_C3_2,
1296
1297    /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah.
1298    /// Clang however has some logic to suport this.
1299    // FIXME: Warn, deprecate, and potentially remove this.
1300    CK_Yonah,
1301    //@}
1302
1303    /// \name Netburst
1304    /// Netburst microarchitecture based processors.
1305    //@{
1306    CK_Pentium4,
1307    CK_Pentium4M,
1308    CK_Prescott,
1309    CK_Nocona,
1310    //@}
1311
1312    /// \name Core
1313    /// Core microarchitecture based processors.
1314    //@{
1315    CK_Core2,
1316
1317    /// This enumerator, like \see CK_Yonah, is a bit odd. It is another
1318    /// codename which GCC no longer accepts as an option to -march, but Clang
1319    /// has some logic for recognizing it.
1320    // FIXME: Warn, deprecate, and potentially remove this.
1321    CK_Penryn,
1322    //@}
1323
1324    /// \name Atom
1325    /// Atom processors
1326    //@{
1327    CK_Atom,
1328    //@}
1329
1330    /// \name Nehalem
1331    /// Nehalem microarchitecture based processors.
1332    //@{
1333    CK_Corei7,
1334    CK_Corei7AVX,
1335    CK_CoreAVXi,
1336    CK_CoreAVX2,
1337    //@}
1338
1339    /// \name K6
1340    /// K6 architecture processors.
1341    //@{
1342    CK_K6,
1343    CK_K6_2,
1344    CK_K6_3,
1345    //@}
1346
1347    /// \name K7
1348    /// K7 architecture processors.
1349    //@{
1350    CK_Athlon,
1351    CK_AthlonThunderbird,
1352    CK_Athlon4,
1353    CK_AthlonXP,
1354    CK_AthlonMP,
1355    //@}
1356
1357    /// \name K8
1358    /// K8 architecture processors.
1359    //@{
1360    CK_Athlon64,
1361    CK_Athlon64SSE3,
1362    CK_AthlonFX,
1363    CK_K8,
1364    CK_K8SSE3,
1365    CK_Opteron,
1366    CK_OpteronSSE3,
1367    CK_AMDFAM10,
1368    //@}
1369
1370    /// \name Bobcat
1371    /// Bobcat architecture processors.
1372    //@{
1373    CK_BTVER1,
1374    //@}
1375
1376    /// \name Bulldozer
1377    /// Bulldozer architecture processors.
1378    //@{
1379    CK_BDVER1,
1380    CK_BDVER2,
1381    //@}
1382
1383    /// This specification is deprecated and will be removed in the future.
1384    /// Users should prefer \see CK_K8.
1385    // FIXME: Warn on this when the CPU is set to it.
1386    CK_x86_64,
1387    //@}
1388
1389    /// \name Geode
1390    /// Geode processors.
1391    //@{
1392    CK_Geode
1393    //@}
1394  } CPU;
1395
1396public:
1397  X86TargetInfo(const std::string& triple)
1398    : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow),
1399      HasAES(false), HasLZCNT(false), HasBMI(false), HasBMI2(false),
1400      HasPOPCNT(false), HasFMA4(false), CPU(CK_Generic) {
1401    BigEndian = false;
1402    LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
1403  }
1404  virtual unsigned getFloatEvalMethod() const {
1405    // X87 evaluates with 80 bits "long double" precision.
1406    return SSELevel == NoSSE ? 2 : 0;
1407  }
1408  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1409                                 unsigned &NumRecords) const {
1410    Records = BuiltinInfo;
1411    NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin;
1412  }
1413  virtual void getGCCRegNames(const char * const *&Names,
1414                              unsigned &NumNames) const {
1415    Names = GCCRegNames;
1416    NumNames = llvm::array_lengthof(GCCRegNames);
1417  }
1418  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1419                                unsigned &NumAliases) const {
1420    Aliases = 0;
1421    NumAliases = 0;
1422  }
1423  virtual void getGCCAddlRegNames(const AddlRegName *&Names,
1424				  unsigned &NumNames) const {
1425    Names = AddlRegNames;
1426    NumNames = llvm::array_lengthof(AddlRegNames);
1427  }
1428  virtual bool validateAsmConstraint(const char *&Name,
1429                                     TargetInfo::ConstraintInfo &info) const;
1430  virtual std::string convertConstraint(const char *&Constraint) const;
1431  virtual const char *getClobbers() const {
1432    return "~{dirflag},~{fpsr},~{flags}";
1433  }
1434  virtual void getTargetDefines(const LangOptions &Opts,
1435                                MacroBuilder &Builder) const;
1436  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1437                                 StringRef Name,
1438                                 bool Enabled) const;
1439  virtual void getDefaultFeatures(llvm::StringMap<bool> &Features) const;
1440  virtual bool hasFeature(StringRef Feature) const;
1441  virtual void HandleTargetFeatures(std::vector<std::string> &Features);
1442  virtual const char* getABI() const {
1443    if (PointerWidth == 64 && SSELevel >= AVX)
1444      return "avx";
1445    else if (PointerWidth == 32 && MMX3DNowLevel == NoMMX3DNow)
1446      return "no-mmx";
1447    return "";
1448  }
1449  virtual bool setCPU(const std::string &Name) {
1450    CPU = llvm::StringSwitch<CPUKind>(Name)
1451      .Case("i386", CK_i386)
1452      .Case("i486", CK_i486)
1453      .Case("winchip-c6", CK_WinChipC6)
1454      .Case("winchip2", CK_WinChip2)
1455      .Case("c3", CK_C3)
1456      .Case("i586", CK_i586)
1457      .Case("pentium", CK_Pentium)
1458      .Case("pentium-mmx", CK_PentiumMMX)
1459      .Case("i686", CK_i686)
1460      .Case("pentiumpro", CK_PentiumPro)
1461      .Case("pentium2", CK_Pentium2)
1462      .Case("pentium3", CK_Pentium3)
1463      .Case("pentium3m", CK_Pentium3M)
1464      .Case("pentium-m", CK_PentiumM)
1465      .Case("c3-2", CK_C3_2)
1466      .Case("yonah", CK_Yonah)
1467      .Case("pentium4", CK_Pentium4)
1468      .Case("pentium4m", CK_Pentium4M)
1469      .Case("prescott", CK_Prescott)
1470      .Case("nocona", CK_Nocona)
1471      .Case("core2", CK_Core2)
1472      .Case("penryn", CK_Penryn)
1473      .Case("atom", CK_Atom)
1474      .Case("corei7", CK_Corei7)
1475      .Case("corei7-avx", CK_Corei7AVX)
1476      .Case("core-avx-i", CK_CoreAVXi)
1477      .Case("core-avx2", CK_CoreAVX2)
1478      .Case("k6", CK_K6)
1479      .Case("k6-2", CK_K6_2)
1480      .Case("k6-3", CK_K6_3)
1481      .Case("athlon", CK_Athlon)
1482      .Case("athlon-tbird", CK_AthlonThunderbird)
1483      .Case("athlon-4", CK_Athlon4)
1484      .Case("athlon-xp", CK_AthlonXP)
1485      .Case("athlon-mp", CK_AthlonMP)
1486      .Case("athlon64", CK_Athlon64)
1487      .Case("athlon64-sse3", CK_Athlon64SSE3)
1488      .Case("athlon-fx", CK_AthlonFX)
1489      .Case("k8", CK_K8)
1490      .Case("k8-sse3", CK_K8SSE3)
1491      .Case("opteron", CK_Opteron)
1492      .Case("opteron-sse3", CK_OpteronSSE3)
1493      .Case("amdfam10", CK_AMDFAM10)
1494      .Case("btver1", CK_BTVER1)
1495      .Case("bdver1", CK_BDVER1)
1496      .Case("bdver2", CK_BDVER2)
1497      .Case("x86-64", CK_x86_64)
1498      .Case("geode", CK_Geode)
1499      .Default(CK_Generic);
1500
1501    // Perform any per-CPU checks necessary to determine if this CPU is
1502    // acceptable.
1503    // FIXME: This results in terrible diagnostics. Clang just says the CPU is
1504    // invalid without explaining *why*.
1505    switch (CPU) {
1506    case CK_Generic:
1507      // No processor selected!
1508      return false;
1509
1510    case CK_i386:
1511    case CK_i486:
1512    case CK_WinChipC6:
1513    case CK_WinChip2:
1514    case CK_C3:
1515    case CK_i586:
1516    case CK_Pentium:
1517    case CK_PentiumMMX:
1518    case CK_i686:
1519    case CK_PentiumPro:
1520    case CK_Pentium2:
1521    case CK_Pentium3:
1522    case CK_Pentium3M:
1523    case CK_PentiumM:
1524    case CK_Yonah:
1525    case CK_C3_2:
1526    case CK_Pentium4:
1527    case CK_Pentium4M:
1528    case CK_Prescott:
1529    case CK_K6:
1530    case CK_K6_2:
1531    case CK_K6_3:
1532    case CK_Athlon:
1533    case CK_AthlonThunderbird:
1534    case CK_Athlon4:
1535    case CK_AthlonXP:
1536    case CK_AthlonMP:
1537    case CK_Geode:
1538      // Only accept certain architectures when compiling in 32-bit mode.
1539      if (PointerWidth != 32)
1540        return false;
1541
1542      // Fallthrough
1543    case CK_Nocona:
1544    case CK_Core2:
1545    case CK_Penryn:
1546    case CK_Atom:
1547    case CK_Corei7:
1548    case CK_Corei7AVX:
1549    case CK_CoreAVXi:
1550    case CK_CoreAVX2:
1551    case CK_Athlon64:
1552    case CK_Athlon64SSE3:
1553    case CK_AthlonFX:
1554    case CK_K8:
1555    case CK_K8SSE3:
1556    case CK_Opteron:
1557    case CK_OpteronSSE3:
1558    case CK_AMDFAM10:
1559    case CK_BTVER1:
1560    case CK_BDVER1:
1561    case CK_BDVER2:
1562    case CK_x86_64:
1563      return true;
1564    }
1565    llvm_unreachable("Unhandled CPU kind");
1566  }
1567};
1568
1569void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const {
1570  // FIXME: This should not be here.
1571  Features["3dnow"] = false;
1572  Features["3dnowa"] = false;
1573  Features["mmx"] = false;
1574  Features["sse"] = false;
1575  Features["sse2"] = false;
1576  Features["sse3"] = false;
1577  Features["ssse3"] = false;
1578  Features["sse41"] = false;
1579  Features["sse42"] = false;
1580  Features["sse4a"] = false;
1581  Features["aes"] = false;
1582  Features["avx"] = false;
1583  Features["avx2"] = false;
1584  Features["lzcnt"] = false;
1585  Features["bmi"] = false;
1586  Features["bmi2"] = false;
1587  Features["popcnt"] = false;
1588  Features["fma4"] = false;
1589
1590  // FIXME: This *really* should not be here.
1591
1592  // X86_64 always has SSE2.
1593  if (PointerWidth == 64)
1594    Features["sse2"] = Features["sse"] = Features["mmx"] = true;
1595
1596  switch (CPU) {
1597  case CK_Generic:
1598  case CK_i386:
1599  case CK_i486:
1600  case CK_i586:
1601  case CK_Pentium:
1602  case CK_i686:
1603  case CK_PentiumPro:
1604    break;
1605  case CK_PentiumMMX:
1606  case CK_Pentium2:
1607    setFeatureEnabled(Features, "mmx", true);
1608    break;
1609  case CK_Pentium3:
1610  case CK_Pentium3M:
1611    setFeatureEnabled(Features, "mmx", true);
1612    setFeatureEnabled(Features, "sse", true);
1613    break;
1614  case CK_PentiumM:
1615  case CK_Pentium4:
1616  case CK_Pentium4M:
1617  case CK_x86_64:
1618    setFeatureEnabled(Features, "mmx", true);
1619    setFeatureEnabled(Features, "sse2", true);
1620    break;
1621  case CK_Yonah:
1622  case CK_Prescott:
1623  case CK_Nocona:
1624    setFeatureEnabled(Features, "mmx", true);
1625    setFeatureEnabled(Features, "sse3", true);
1626    break;
1627  case CK_Core2:
1628    setFeatureEnabled(Features, "mmx", true);
1629    setFeatureEnabled(Features, "ssse3", true);
1630    break;
1631  case CK_Penryn:
1632    setFeatureEnabled(Features, "mmx", true);
1633    setFeatureEnabled(Features, "sse4.1", true);
1634    break;
1635  case CK_Atom:
1636    setFeatureEnabled(Features, "mmx", true);
1637    setFeatureEnabled(Features, "ssse3", true);
1638    break;
1639  case CK_Corei7:
1640    setFeatureEnabled(Features, "mmx", true);
1641    setFeatureEnabled(Features, "sse4", true);
1642    setFeatureEnabled(Features, "aes", true);
1643    break;
1644  case CK_Corei7AVX:
1645  case CK_CoreAVXi:
1646    setFeatureEnabled(Features, "mmx", true);
1647    setFeatureEnabled(Features, "avx", true);
1648    setFeatureEnabled(Features, "aes", true);
1649    break;
1650  case CK_CoreAVX2:
1651    setFeatureEnabled(Features, "mmx", true);
1652    setFeatureEnabled(Features, "avx2", true);
1653    setFeatureEnabled(Features, "aes", true);
1654    setFeatureEnabled(Features, "lzcnt", true);
1655    setFeatureEnabled(Features, "bmi", true);
1656    setFeatureEnabled(Features, "bmi2", true);
1657    break;
1658  case CK_K6:
1659  case CK_WinChipC6:
1660    setFeatureEnabled(Features, "mmx", true);
1661    break;
1662  case CK_K6_2:
1663  case CK_K6_3:
1664  case CK_WinChip2:
1665  case CK_C3:
1666    setFeatureEnabled(Features, "3dnow", true);
1667    break;
1668  case CK_Athlon:
1669  case CK_AthlonThunderbird:
1670  case CK_Geode:
1671    setFeatureEnabled(Features, "3dnowa", true);
1672    break;
1673  case CK_Athlon4:
1674  case CK_AthlonXP:
1675  case CK_AthlonMP:
1676    setFeatureEnabled(Features, "sse", true);
1677    setFeatureEnabled(Features, "3dnowa", true);
1678    break;
1679  case CK_K8:
1680  case CK_Opteron:
1681  case CK_Athlon64:
1682  case CK_AthlonFX:
1683    setFeatureEnabled(Features, "sse2", true);
1684    setFeatureEnabled(Features, "3dnowa", true);
1685    break;
1686  case CK_K8SSE3:
1687  case CK_OpteronSSE3:
1688  case CK_Athlon64SSE3:
1689    setFeatureEnabled(Features, "sse3", true);
1690    setFeatureEnabled(Features, "3dnowa", true);
1691    break;
1692  case CK_AMDFAM10:
1693    setFeatureEnabled(Features, "sse3", true);
1694    setFeatureEnabled(Features, "sse4a", true);
1695    setFeatureEnabled(Features, "3dnowa", true);
1696    break;
1697  case CK_BTVER1:
1698    setFeatureEnabled(Features, "ssse3", true);
1699    setFeatureEnabled(Features, "sse4a", true);
1700  case CK_BDVER1:
1701  case CK_BDVER2:
1702    setFeatureEnabled(Features, "avx", true);
1703    setFeatureEnabled(Features, "sse4a", true);
1704    setFeatureEnabled(Features, "aes", true);
1705    break;
1706  case CK_C3_2:
1707    setFeatureEnabled(Features, "mmx", true);
1708    setFeatureEnabled(Features, "sse", true);
1709    break;
1710  }
1711}
1712
1713bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1714                                      StringRef Name,
1715                                      bool Enabled) const {
1716  // FIXME: This *really* should not be here.  We need some way of translating
1717  // options into llvm subtarget features.
1718  if (!Features.count(Name) &&
1719      (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1"))
1720    return false;
1721
1722  // FIXME: this should probably use a switch with fall through.
1723
1724  if (Enabled) {
1725    if (Name == "mmx")
1726      Features["mmx"] = true;
1727    else if (Name == "sse")
1728      Features["mmx"] = Features["sse"] = true;
1729    else if (Name == "sse2")
1730      Features["mmx"] = Features["sse"] = Features["sse2"] = true;
1731    else if (Name == "sse3")
1732      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1733        true;
1734    else if (Name == "ssse3")
1735      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1736        Features["ssse3"] = true;
1737    else if (Name == "sse4" || Name == "sse4.2")
1738      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1739        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1740        Features["popcnt"] = true;
1741    else if (Name == "sse4.1")
1742      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1743        Features["ssse3"] = Features["sse41"] = true;
1744    else if (Name == "3dnow")
1745      Features["mmx"] = Features["3dnow"] = true;
1746    else if (Name == "3dnowa")
1747      Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true;
1748    else if (Name == "aes")
1749      Features["aes"] = true;
1750    else if (Name == "avx")
1751      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1752        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1753        Features["popcnt"] = Features["avx"] = true;
1754    else if (Name == "avx2")
1755      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1756        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1757        Features["popcnt"] = Features["avx"] = Features["avx2"] = true;
1758    else if (Name == "fma4")
1759        Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1760        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1761        Features["popcnt"] = Features["avx"] = Features["fma4"] = true;
1762    else if (Name == "sse4a")
1763      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1764        Features["lzcnt"] = Features["popcnt"] = Features["sse4a"] = true;
1765    else if (Name == "lzcnt")
1766      Features["lzcnt"] = true;
1767    else if (Name == "bmi")
1768      Features["bmi"] = true;
1769    else if (Name == "bmi2")
1770      Features["bmi2"] = true;
1771    else if (Name == "popcnt")
1772      Features["popcnt"] = true;
1773  } else {
1774    if (Name == "mmx")
1775      Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false;
1776    else if (Name == "sse")
1777      Features["sse"] = Features["sse2"] = Features["sse3"] =
1778        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1779        Features["sse4a"] = false;
1780    else if (Name == "sse2")
1781      Features["sse2"] = Features["sse3"] = Features["ssse3"] =
1782        Features["sse41"] = Features["sse42"] = Features["sse4a"] = false;
1783    else if (Name == "sse3")
1784      Features["sse3"] = Features["ssse3"] = Features["sse41"] =
1785        Features["sse42"] = Features["sse4a"] = false;
1786    else if (Name == "ssse3")
1787      Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
1788    else if (Name == "sse4" || Name == "sse4.1")
1789      Features["sse41"] = Features["sse42"] = false;
1790    else if (Name == "sse4.2")
1791      Features["sse42"] = false;
1792    else if (Name == "3dnow")
1793      Features["3dnow"] = Features["3dnowa"] = false;
1794    else if (Name == "3dnowa")
1795      Features["3dnowa"] = false;
1796    else if (Name == "aes")
1797      Features["aes"] = false;
1798    else if (Name == "avx")
1799      Features["avx"] = Features["avx2"] = Features["fma4"] = false;
1800    else if (Name == "avx2")
1801      Features["avx2"] = false;
1802    else if (Name == "sse4a")
1803      Features["sse4a"] = false;
1804    else if (Name == "lzcnt")
1805      Features["lzcnt"] = false;
1806    else if (Name == "bmi")
1807      Features["bmi"] = false;
1808    else if (Name == "bmi2")
1809      Features["bmi2"] = false;
1810    else if (Name == "popcnt")
1811      Features["popcnt"] = false;
1812    else if (Name == "fma4")
1813      Features["fma4"] = false;
1814  }
1815
1816  return true;
1817}
1818
1819/// HandleTargetOptions - Perform initialization based on the user
1820/// configured set of features.
1821void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) {
1822  // Remember the maximum enabled sselevel.
1823  for (unsigned i = 0, e = Features.size(); i !=e; ++i) {
1824    // Ignore disabled features.
1825    if (Features[i][0] == '-')
1826      continue;
1827
1828    StringRef Feature = StringRef(Features[i]).substr(1);
1829
1830    if (Feature == "aes") {
1831      HasAES = true;
1832      continue;
1833    }
1834
1835    if (Feature == "lzcnt") {
1836      HasLZCNT = true;
1837      continue;
1838    }
1839
1840    if (Feature == "bmi") {
1841      HasBMI = true;
1842      continue;
1843    }
1844
1845    if (Feature == "bmi2") {
1846      HasBMI2 = true;
1847      continue;
1848    }
1849
1850    if (Feature == "popcnt") {
1851      HasPOPCNT = true;
1852      continue;
1853    }
1854
1855    if (Feature == "fma4") {
1856      HasFMA4 = true;
1857      continue;
1858    }
1859
1860    assert(Features[i][0] == '+' && "Invalid target feature!");
1861    X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Feature)
1862      .Case("avx2", AVX2)
1863      .Case("avx", AVX)
1864      .Case("sse42", SSE42)
1865      .Case("sse41", SSE41)
1866      .Case("ssse3", SSSE3)
1867      .Case("sse3", SSE3)
1868      .Case("sse2", SSE2)
1869      .Case("sse", SSE1)
1870      .Default(NoSSE);
1871    SSELevel = std::max(SSELevel, Level);
1872
1873    MMX3DNowEnum ThreeDNowLevel =
1874      llvm::StringSwitch<MMX3DNowEnum>(Feature)
1875        .Case("3dnowa", AMD3DNowAthlon)
1876        .Case("3dnow", AMD3DNow)
1877        .Case("mmx", MMX)
1878        .Default(NoMMX3DNow);
1879
1880    MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel);
1881  }
1882
1883  // Don't tell the backend if we're turning off mmx; it will end up disabling
1884  // SSE, which we don't want.
1885  std::vector<std::string>::iterator it;
1886  it = std::find(Features.begin(), Features.end(), "-mmx");
1887  if (it != Features.end())
1888    Features.erase(it);
1889}
1890
1891/// X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro
1892/// definitions for this particular subtarget.
1893void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
1894                                     MacroBuilder &Builder) const {
1895  // Target identification.
1896  if (PointerWidth == 64) {
1897    if (getLongWidth() == 64) {
1898      Builder.defineMacro("_LP64");
1899      Builder.defineMacro("__LP64__");
1900    }
1901    Builder.defineMacro("__amd64__");
1902    Builder.defineMacro("__amd64");
1903    Builder.defineMacro("__x86_64");
1904    Builder.defineMacro("__x86_64__");
1905  } else {
1906    DefineStd(Builder, "i386", Opts);
1907  }
1908
1909  // Subtarget options.
1910  // FIXME: We are hard-coding the tune parameters based on the CPU, but they
1911  // truly should be based on -mtune options.
1912  switch (CPU) {
1913  case CK_Generic:
1914    break;
1915  case CK_i386:
1916    // The rest are coming from the i386 define above.
1917    Builder.defineMacro("__tune_i386__");
1918    break;
1919  case CK_i486:
1920  case CK_WinChipC6:
1921  case CK_WinChip2:
1922  case CK_C3:
1923    defineCPUMacros(Builder, "i486");
1924    break;
1925  case CK_PentiumMMX:
1926    Builder.defineMacro("__pentium_mmx__");
1927    Builder.defineMacro("__tune_pentium_mmx__");
1928    // Fallthrough
1929  case CK_i586:
1930  case CK_Pentium:
1931    defineCPUMacros(Builder, "i586");
1932    defineCPUMacros(Builder, "pentium");
1933    break;
1934  case CK_Pentium3:
1935  case CK_Pentium3M:
1936  case CK_PentiumM:
1937    Builder.defineMacro("__tune_pentium3__");
1938    // Fallthrough
1939  case CK_Pentium2:
1940  case CK_C3_2:
1941    Builder.defineMacro("__tune_pentium2__");
1942    // Fallthrough
1943  case CK_PentiumPro:
1944    Builder.defineMacro("__tune_i686__");
1945    Builder.defineMacro("__tune_pentiumpro__");
1946    // Fallthrough
1947  case CK_i686:
1948    Builder.defineMacro("__i686");
1949    Builder.defineMacro("__i686__");
1950    // Strangely, __tune_i686__ isn't defined by GCC when CPU == i686.
1951    Builder.defineMacro("__pentiumpro");
1952    Builder.defineMacro("__pentiumpro__");
1953    break;
1954  case CK_Pentium4:
1955  case CK_Pentium4M:
1956    defineCPUMacros(Builder, "pentium4");
1957    break;
1958  case CK_Yonah:
1959  case CK_Prescott:
1960  case CK_Nocona:
1961    defineCPUMacros(Builder, "nocona");
1962    break;
1963  case CK_Core2:
1964  case CK_Penryn:
1965    defineCPUMacros(Builder, "core2");
1966    break;
1967  case CK_Atom:
1968    defineCPUMacros(Builder, "atom");
1969    break;
1970  case CK_Corei7:
1971  case CK_Corei7AVX:
1972  case CK_CoreAVXi:
1973  case CK_CoreAVX2:
1974    defineCPUMacros(Builder, "corei7");
1975    break;
1976  case CK_K6_2:
1977    Builder.defineMacro("__k6_2__");
1978    Builder.defineMacro("__tune_k6_2__");
1979    // Fallthrough
1980  case CK_K6_3:
1981    if (CPU != CK_K6_2) {  // In case of fallthrough
1982      // FIXME: GCC may be enabling these in cases where some other k6
1983      // architecture is specified but -m3dnow is explicitly provided. The
1984      // exact semantics need to be determined and emulated here.
1985      Builder.defineMacro("__k6_3__");
1986      Builder.defineMacro("__tune_k6_3__");
1987    }
1988    // Fallthrough
1989  case CK_K6:
1990    defineCPUMacros(Builder, "k6");
1991    break;
1992  case CK_Athlon:
1993  case CK_AthlonThunderbird:
1994  case CK_Athlon4:
1995  case CK_AthlonXP:
1996  case CK_AthlonMP:
1997    defineCPUMacros(Builder, "athlon");
1998    if (SSELevel != NoSSE) {
1999      Builder.defineMacro("__athlon_sse__");
2000      Builder.defineMacro("__tune_athlon_sse__");
2001    }
2002    break;
2003  case CK_K8:
2004  case CK_K8SSE3:
2005  case CK_x86_64:
2006  case CK_Opteron:
2007  case CK_OpteronSSE3:
2008  case CK_Athlon64:
2009  case CK_Athlon64SSE3:
2010  case CK_AthlonFX:
2011    defineCPUMacros(Builder, "k8");
2012    break;
2013  case CK_AMDFAM10:
2014    defineCPUMacros(Builder, "amdfam10");
2015    break;
2016  case CK_BTVER1:
2017    defineCPUMacros(Builder, "btver1");
2018    break;
2019  case CK_BDVER1:
2020    defineCPUMacros(Builder, "bdver1");
2021    break;
2022  case CK_BDVER2:
2023    defineCPUMacros(Builder, "bdver2");
2024    break;
2025  case CK_Geode:
2026    defineCPUMacros(Builder, "geode");
2027    break;
2028  }
2029
2030  // Target properties.
2031  Builder.defineMacro("__LITTLE_ENDIAN__");
2032  Builder.defineMacro("__REGISTER_PREFIX__", "");
2033
2034  // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline
2035  // functions in glibc header files that use FP Stack inline asm which the
2036  // backend can't deal with (PR879).
2037  Builder.defineMacro("__NO_MATH_INLINES");
2038
2039  if (HasAES)
2040    Builder.defineMacro("__AES__");
2041
2042  if (HasLZCNT)
2043    Builder.defineMacro("__LZCNT__");
2044
2045  if (HasBMI)
2046    Builder.defineMacro("__BMI__");
2047
2048  if (HasBMI2)
2049    Builder.defineMacro("__BMI2__");
2050
2051  if (HasPOPCNT)
2052    Builder.defineMacro("__POPCNT__");
2053
2054  if (HasFMA4)
2055    Builder.defineMacro("__FMA4__");
2056
2057  // Each case falls through to the previous one here.
2058  switch (SSELevel) {
2059  case AVX2:
2060    Builder.defineMacro("__AVX2__");
2061  case AVX:
2062    Builder.defineMacro("__AVX__");
2063  case SSE42:
2064    Builder.defineMacro("__SSE4_2__");
2065  case SSE41:
2066    Builder.defineMacro("__SSE4_1__");
2067  case SSSE3:
2068    Builder.defineMacro("__SSSE3__");
2069  case SSE3:
2070    Builder.defineMacro("__SSE3__");
2071  case SSE2:
2072    Builder.defineMacro("__SSE2__");
2073    Builder.defineMacro("__SSE2_MATH__");  // -mfp-math=sse always implied.
2074  case SSE1:
2075    Builder.defineMacro("__SSE__");
2076    Builder.defineMacro("__SSE_MATH__");   // -mfp-math=sse always implied.
2077  case NoSSE:
2078    break;
2079  }
2080
2081  if (Opts.MicrosoftExt && PointerWidth == 32) {
2082    switch (SSELevel) {
2083    case AVX2:
2084    case AVX:
2085    case SSE42:
2086    case SSE41:
2087    case SSSE3:
2088    case SSE3:
2089    case SSE2:
2090      Builder.defineMacro("_M_IX86_FP", Twine(2));
2091      break;
2092    case SSE1:
2093      Builder.defineMacro("_M_IX86_FP", Twine(1));
2094      break;
2095    default:
2096      Builder.defineMacro("_M_IX86_FP", Twine(0));
2097    }
2098  }
2099
2100  // Each case falls through to the previous one here.
2101  switch (MMX3DNowLevel) {
2102  case AMD3DNowAthlon:
2103    Builder.defineMacro("__3dNOW_A__");
2104  case AMD3DNow:
2105    Builder.defineMacro("__3dNOW__");
2106  case MMX:
2107    Builder.defineMacro("__MMX__");
2108  case NoMMX3DNow:
2109    break;
2110  }
2111}
2112
2113bool X86TargetInfo::hasFeature(StringRef Feature) const {
2114  return llvm::StringSwitch<bool>(Feature)
2115      .Case("aes", HasAES)
2116      .Case("avx", SSELevel >= AVX)
2117      .Case("avx2", SSELevel >= AVX2)
2118      .Case("bmi", HasBMI)
2119      .Case("bmi2", HasBMI2)
2120      .Case("fma4", HasFMA4)
2121      .Case("lzcnt", HasLZCNT)
2122      .Case("mm3dnow", MMX3DNowLevel >= AMD3DNow)
2123      .Case("mm3dnowa", MMX3DNowLevel >= AMD3DNowAthlon)
2124      .Case("mmx", MMX3DNowLevel >= MMX)
2125      .Case("popcnt", HasPOPCNT)
2126      .Case("sse", SSELevel >= SSE1)
2127      .Case("sse2", SSELevel >= SSE2)
2128      .Case("sse3", SSELevel >= SSE3)
2129      .Case("ssse3", SSELevel >= SSSE3)
2130      .Case("sse41", SSELevel >= SSE41)
2131      .Case("sse42", SSELevel >= SSE42)
2132      .Case("x86", true)
2133      .Case("x86_32", PointerWidth == 32)
2134      .Case("x86_64", PointerWidth == 64)
2135      .Default(false);
2136}
2137
2138bool
2139X86TargetInfo::validateAsmConstraint(const char *&Name,
2140                                     TargetInfo::ConstraintInfo &Info) const {
2141  switch (*Name) {
2142  default: return false;
2143  case 'Y': // first letter of a pair:
2144    switch (*(Name+1)) {
2145    default: return false;
2146    case '0':  // First SSE register.
2147    case 't':  // Any SSE register, when SSE2 is enabled.
2148    case 'i':  // Any SSE register, when SSE2 and inter-unit moves enabled.
2149    case 'm':  // any MMX register, when inter-unit moves enabled.
2150      break;   // falls through to setAllowsRegister.
2151  }
2152  case 'a': // eax.
2153  case 'b': // ebx.
2154  case 'c': // ecx.
2155  case 'd': // edx.
2156  case 'S': // esi.
2157  case 'D': // edi.
2158  case 'A': // edx:eax.
2159  case 'f': // any x87 floating point stack register.
2160  case 't': // top of floating point stack.
2161  case 'u': // second from top of floating point stack.
2162  case 'q': // Any register accessible as [r]l: a, b, c, and d.
2163  case 'y': // Any MMX register.
2164  case 'x': // Any SSE register.
2165  case 'Q': // Any register accessible as [r]h: a, b, c, and d.
2166  case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp.
2167  case 'l': // "Index" registers: any general register that can be used as an
2168            // index in a base+index memory access.
2169    Info.setAllowsRegister();
2170    return true;
2171  case 'C': // SSE floating point constant.
2172  case 'G': // x87 floating point constant.
2173  case 'e': // 32-bit signed integer constant for use with zero-extending
2174            // x86_64 instructions.
2175  case 'Z': // 32-bit unsigned integer constant for use with zero-extending
2176            // x86_64 instructions.
2177    return true;
2178  }
2179}
2180
2181
2182std::string
2183X86TargetInfo::convertConstraint(const char *&Constraint) const {
2184  switch (*Constraint) {
2185  case 'a': return std::string("{ax}");
2186  case 'b': return std::string("{bx}");
2187  case 'c': return std::string("{cx}");
2188  case 'd': return std::string("{dx}");
2189  case 'S': return std::string("{si}");
2190  case 'D': return std::string("{di}");
2191  case 'p': // address
2192    return std::string("im");
2193  case 't': // top of floating point stack.
2194    return std::string("{st}");
2195  case 'u': // second from top of floating point stack.
2196    return std::string("{st(1)}"); // second from top of floating point stack.
2197  default:
2198    return std::string(1, *Constraint);
2199  }
2200}
2201} // end anonymous namespace
2202
2203namespace {
2204// X86-32 generic target
2205class X86_32TargetInfo : public X86TargetInfo {
2206public:
2207  X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) {
2208    DoubleAlign = LongLongAlign = 32;
2209    LongDoubleWidth = 96;
2210    LongDoubleAlign = 32;
2211    SuitableAlign = 128;
2212    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2213                        "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
2214                        "a0:0:64-f80:32:32-n8:16:32-S128";
2215    SizeType = UnsignedInt;
2216    PtrDiffType = SignedInt;
2217    IntPtrType = SignedInt;
2218    RegParmMax = 3;
2219
2220    // Use fpret for all types.
2221    RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) |
2222                             (1 << TargetInfo::Double) |
2223                             (1 << TargetInfo::LongDouble));
2224
2225    // x86-32 has atomics up to 8 bytes
2226    // FIXME: Check that we actually have cmpxchg8b before setting
2227    // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.)
2228    MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
2229  }
2230  virtual const char *getVAListDeclaration() const {
2231    return "typedef char* __builtin_va_list;";
2232  }
2233
2234  int getEHDataRegisterNumber(unsigned RegNo) const {
2235    if (RegNo == 0) return 0;
2236    if (RegNo == 1) return 2;
2237    return -1;
2238  }
2239};
2240} // end anonymous namespace
2241
2242namespace {
2243class NetBSDI386TargetInfo : public NetBSDTargetInfo<X86_32TargetInfo> {
2244public:
2245  NetBSDI386TargetInfo(const std::string &triple) :
2246    NetBSDTargetInfo<X86_32TargetInfo>(triple) {
2247  }
2248
2249  virtual unsigned getFloatEvalMethod() const {
2250    // NetBSD defaults to "double" rounding
2251    return 1;
2252  }
2253};
2254} // end anonymous namespace
2255
2256namespace {
2257class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> {
2258public:
2259  OpenBSDI386TargetInfo(const std::string& triple) :
2260    OpenBSDTargetInfo<X86_32TargetInfo>(triple) {
2261    SizeType = UnsignedLong;
2262    IntPtrType = SignedLong;
2263    PtrDiffType = SignedLong;
2264  }
2265};
2266} // end anonymous namespace
2267
2268namespace {
2269class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> {
2270public:
2271  DarwinI386TargetInfo(const std::string& triple) :
2272    DarwinTargetInfo<X86_32TargetInfo>(triple) {
2273    LongDoubleWidth = 128;
2274    LongDoubleAlign = 128;
2275    SuitableAlign = 128;
2276    SizeType = UnsignedLong;
2277    IntPtrType = SignedLong;
2278    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2279                        "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
2280                        "a0:0:64-f80:128:128-n8:16:32-S128";
2281    HasAlignMac68kSupport = true;
2282  }
2283
2284};
2285} // end anonymous namespace
2286
2287namespace {
2288// x86-32 Windows target
2289class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> {
2290public:
2291  WindowsX86_32TargetInfo(const std::string& triple)
2292    : WindowsTargetInfo<X86_32TargetInfo>(triple) {
2293    TLSSupported = false;
2294    WCharType = UnsignedShort;
2295    DoubleAlign = LongLongAlign = 64;
2296    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2297                        "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-"
2298                        "v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32";
2299  }
2300  virtual void getTargetDefines(const LangOptions &Opts,
2301                                MacroBuilder &Builder) const {
2302    WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder);
2303  }
2304};
2305} // end anonymous namespace
2306
2307namespace {
2308
2309// x86-32 Windows Visual Studio target
2310class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo {
2311public:
2312  VisualStudioWindowsX86_32TargetInfo(const std::string& triple)
2313    : WindowsX86_32TargetInfo(triple) {
2314    LongDoubleWidth = LongDoubleAlign = 64;
2315    LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2316  }
2317  virtual void getTargetDefines(const LangOptions &Opts,
2318                                MacroBuilder &Builder) const {
2319    WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2320    WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder);
2321    // The value of the following reflects processor type.
2322    // 300=386, 400=486, 500=Pentium, 600=Blend (default)
2323    // We lost the original triple, so we use the default.
2324    Builder.defineMacro("_M_IX86", "600");
2325  }
2326};
2327} // end anonymous namespace
2328
2329namespace {
2330// x86-32 MinGW target
2331class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo {
2332public:
2333  MinGWX86_32TargetInfo(const std::string& triple)
2334    : WindowsX86_32TargetInfo(triple) {
2335  }
2336  virtual void getTargetDefines(const LangOptions &Opts,
2337                                MacroBuilder &Builder) const {
2338    WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2339    DefineStd(Builder, "WIN32", Opts);
2340    DefineStd(Builder, "WINNT", Opts);
2341    Builder.defineMacro("_X86_");
2342    Builder.defineMacro("__MSVCRT__");
2343    Builder.defineMacro("__MINGW32__");
2344
2345    // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2346    // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2347    if (Opts.MicrosoftExt)
2348      // Provide "as-is" __declspec.
2349      Builder.defineMacro("__declspec", "__declspec");
2350    else
2351      // Provide alias of __attribute__ like mingw32-gcc.
2352      Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2353  }
2354};
2355} // end anonymous namespace
2356
2357namespace {
2358// x86-32 Cygwin target
2359class CygwinX86_32TargetInfo : public X86_32TargetInfo {
2360public:
2361  CygwinX86_32TargetInfo(const std::string& triple)
2362    : X86_32TargetInfo(triple) {
2363    TLSSupported = false;
2364    WCharType = UnsignedShort;
2365    DoubleAlign = LongLongAlign = 64;
2366    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2367                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2368                        "a0:0:64-f80:32:32-n8:16:32-S32";
2369  }
2370  virtual void getTargetDefines(const LangOptions &Opts,
2371                                MacroBuilder &Builder) const {
2372    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2373    Builder.defineMacro("__CYGWIN__");
2374    Builder.defineMacro("__CYGWIN32__");
2375    DefineStd(Builder, "unix", Opts);
2376    if (Opts.CPlusPlus)
2377      Builder.defineMacro("_GNU_SOURCE");
2378  }
2379};
2380} // end anonymous namespace
2381
2382namespace {
2383// x86-32 Haiku target
2384class HaikuX86_32TargetInfo : public X86_32TargetInfo {
2385public:
2386  HaikuX86_32TargetInfo(const std::string& triple)
2387    : X86_32TargetInfo(triple) {
2388    SizeType = UnsignedLong;
2389    IntPtrType = SignedLong;
2390    PtrDiffType = SignedLong;
2391    this->UserLabelPrefix = "";
2392  }
2393  virtual void getTargetDefines(const LangOptions &Opts,
2394                                MacroBuilder &Builder) const {
2395    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2396    Builder.defineMacro("__INTEL__");
2397    Builder.defineMacro("__HAIKU__");
2398  }
2399};
2400} // end anonymous namespace
2401
2402// RTEMS Target
2403template<typename Target>
2404class RTEMSTargetInfo : public OSTargetInfo<Target> {
2405protected:
2406  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
2407                            MacroBuilder &Builder) const {
2408    // RTEMS defines; list based off of gcc output
2409
2410    Builder.defineMacro("__rtems__");
2411    Builder.defineMacro("__ELF__");
2412  }
2413public:
2414  RTEMSTargetInfo(const std::string &triple)
2415    : OSTargetInfo<Target>(triple) {
2416      this->UserLabelPrefix = "";
2417
2418      llvm::Triple Triple(triple);
2419      switch (Triple.getArch()) {
2420        default:
2421        case llvm::Triple::x86:
2422          // this->MCountName = ".mcount";
2423          break;
2424        case llvm::Triple::mips:
2425        case llvm::Triple::mipsel:
2426        case llvm::Triple::ppc:
2427        case llvm::Triple::ppc64:
2428          // this->MCountName = "_mcount";
2429          break;
2430        case llvm::Triple::arm:
2431          // this->MCountName = "__mcount";
2432          break;
2433      }
2434
2435    }
2436};
2437
2438namespace {
2439// x86-32 RTEMS target
2440class RTEMSX86_32TargetInfo : public X86_32TargetInfo {
2441public:
2442  RTEMSX86_32TargetInfo(const std::string& triple)
2443    : X86_32TargetInfo(triple) {
2444    SizeType = UnsignedLong;
2445    IntPtrType = SignedLong;
2446    PtrDiffType = SignedLong;
2447    this->UserLabelPrefix = "";
2448  }
2449  virtual void getTargetDefines(const LangOptions &Opts,
2450                                MacroBuilder &Builder) const {
2451    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2452    Builder.defineMacro("__INTEL__");
2453    Builder.defineMacro("__rtems__");
2454  }
2455};
2456} // end anonymous namespace
2457
2458namespace {
2459// x86-64 generic target
2460class X86_64TargetInfo : public X86TargetInfo {
2461public:
2462  X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) {
2463    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
2464    LongDoubleWidth = 128;
2465    LongDoubleAlign = 128;
2466    LargeArrayMinWidth = 128;
2467    LargeArrayAlign = 128;
2468    SuitableAlign = 128;
2469    IntMaxType = SignedLong;
2470    UIntMaxType = UnsignedLong;
2471    Int64Type = SignedLong;
2472    RegParmMax = 6;
2473
2474    DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2475                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2476                        "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128";
2477
2478    // Use fpret only for long double.
2479    RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble);
2480
2481    // Use fp2ret for _Complex long double.
2482    ComplexLongDoubleUsesFP2Ret = true;
2483
2484    // x86-64 has atomics up to 16 bytes.
2485    // FIXME: Once the backend is fixed, increase MaxAtomicInlineWidth to 128
2486    // on CPUs with cmpxchg16b
2487    MaxAtomicPromoteWidth = 128;
2488    MaxAtomicInlineWidth = 64;
2489  }
2490  virtual const char *getVAListDeclaration() const {
2491    return "typedef struct __va_list_tag {"
2492           "  unsigned gp_offset;"
2493           "  unsigned fp_offset;"
2494           "  void* overflow_arg_area;"
2495           "  void* reg_save_area;"
2496           "} __va_list_tag;"
2497           "typedef __va_list_tag __builtin_va_list[1];";
2498  }
2499
2500  int getEHDataRegisterNumber(unsigned RegNo) const {
2501    if (RegNo == 0) return 0;
2502    if (RegNo == 1) return 1;
2503    return -1;
2504  }
2505};
2506} // end anonymous namespace
2507
2508namespace {
2509// x86-64 Windows target
2510class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> {
2511public:
2512  WindowsX86_64TargetInfo(const std::string& triple)
2513    : WindowsTargetInfo<X86_64TargetInfo>(triple) {
2514    TLSSupported = false;
2515    WCharType = UnsignedShort;
2516    LongWidth = LongAlign = 32;
2517    DoubleAlign = LongLongAlign = 64;
2518    IntMaxType = SignedLongLong;
2519    UIntMaxType = UnsignedLongLong;
2520    Int64Type = SignedLongLong;
2521    SizeType = UnsignedLongLong;
2522    PtrDiffType = SignedLongLong;
2523    IntPtrType = SignedLongLong;
2524    this->UserLabelPrefix = "";
2525  }
2526  virtual void getTargetDefines(const LangOptions &Opts,
2527                                MacroBuilder &Builder) const {
2528    WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder);
2529    Builder.defineMacro("_WIN64");
2530  }
2531  virtual const char *getVAListDeclaration() const {
2532    return "typedef char* __builtin_va_list;";
2533  }
2534};
2535} // end anonymous namespace
2536
2537namespace {
2538// x86-64 Windows Visual Studio target
2539class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo {
2540public:
2541  VisualStudioWindowsX86_64TargetInfo(const std::string& triple)
2542    : WindowsX86_64TargetInfo(triple) {
2543    LongDoubleWidth = LongDoubleAlign = 64;
2544    LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2545  }
2546  virtual void getTargetDefines(const LangOptions &Opts,
2547                                MacroBuilder &Builder) const {
2548    WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2549    WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder);
2550    Builder.defineMacro("_M_X64");
2551    Builder.defineMacro("_M_AMD64");
2552  }
2553};
2554} // end anonymous namespace
2555
2556namespace {
2557// x86-64 MinGW target
2558class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo {
2559public:
2560  MinGWX86_64TargetInfo(const std::string& triple)
2561    : WindowsX86_64TargetInfo(triple) {
2562  }
2563  virtual void getTargetDefines(const LangOptions &Opts,
2564                                MacroBuilder &Builder) const {
2565    WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2566    DefineStd(Builder, "WIN64", Opts);
2567    Builder.defineMacro("__MSVCRT__");
2568    Builder.defineMacro("__MINGW32__");
2569    Builder.defineMacro("__MINGW64__");
2570
2571    // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2572    // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2573    if (Opts.MicrosoftExt)
2574      // Provide "as-is" __declspec.
2575      Builder.defineMacro("__declspec", "__declspec");
2576    else
2577      // Provide alias of __attribute__ like mingw32-gcc.
2578      Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2579  }
2580};
2581} // end anonymous namespace
2582
2583namespace {
2584class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> {
2585public:
2586  DarwinX86_64TargetInfo(const std::string& triple)
2587      : DarwinTargetInfo<X86_64TargetInfo>(triple) {
2588    Int64Type = SignedLongLong;
2589  }
2590};
2591} // end anonymous namespace
2592
2593namespace {
2594class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> {
2595public:
2596  OpenBSDX86_64TargetInfo(const std::string& triple)
2597      : OpenBSDTargetInfo<X86_64TargetInfo>(triple) {
2598    IntMaxType = SignedLongLong;
2599    UIntMaxType = UnsignedLongLong;
2600    Int64Type = SignedLongLong;
2601  }
2602};
2603} // end anonymous namespace
2604
2605namespace {
2606class ARMTargetInfo : public TargetInfo {
2607  // Possible FPU choices.
2608  enum FPUMode {
2609    NoFPU,
2610    VFP2FPU,
2611    VFP3FPU,
2612    NeonFPU
2613  };
2614
2615  static bool FPUModeIsVFP(FPUMode Mode) {
2616    return Mode >= VFP2FPU && Mode <= NeonFPU;
2617  }
2618
2619  static const TargetInfo::GCCRegAlias GCCRegAliases[];
2620  static const char * const GCCRegNames[];
2621
2622  std::string ABI, CPU;
2623
2624  unsigned FPU : 3;
2625
2626  unsigned IsThumb : 1;
2627
2628  // Initialized via features.
2629  unsigned SoftFloat : 1;
2630  unsigned SoftFloatABI : 1;
2631
2632  static const Builtin::Info BuiltinInfo[];
2633
2634public:
2635  ARMTargetInfo(const std::string &TripleStr)
2636    : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s")
2637  {
2638    BigEndian = false;
2639    SizeType = UnsignedInt;
2640    PtrDiffType = SignedInt;
2641    // AAPCS 7.1.1, ARM-Linux ABI 2.4: type of wchar_t is unsigned int.
2642    WCharType = UnsignedInt;
2643
2644    // {} in inline assembly are neon specifiers, not assembly variant
2645    // specifiers.
2646    NoAsmVariants = true;
2647
2648    // FIXME: Should we just treat this as a feature?
2649    IsThumb = getTriple().getArchName().startswith("thumb");
2650    if (IsThumb) {
2651      // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
2652      // so set preferred for small types to 32.
2653      DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
2654                           "i64:64:64-f32:32:32-f64:64:64-"
2655                           "v64:64:64-v128:64:128-a0:0:32-n32-S64");
2656    } else {
2657      DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2658                           "i64:64:64-f32:32:32-f64:64:64-"
2659                           "v64:64:64-v128:64:128-a0:0:64-n32-S64");
2660    }
2661
2662    // ARM targets default to using the ARM C++ ABI.
2663    CXXABI = CXXABI_ARM;
2664
2665    // ARM has atomics up to 8 bytes
2666    // FIXME: Set MaxAtomicInlineWidth if we have the feature v6e
2667    MaxAtomicPromoteWidth = 64;
2668
2669    // Do force alignment of members that follow zero length bitfields.  If
2670    // the alignment of the zero-length bitfield is greater than the member
2671    // that follows it, `bar', `bar' will be aligned as the  type of the
2672    // zero length bitfield.
2673    UseZeroLengthBitfieldAlignment = true;
2674  }
2675  virtual const char *getABI() const { return ABI.c_str(); }
2676  virtual bool setABI(const std::string &Name) {
2677    ABI = Name;
2678
2679    // The defaults (above) are for AAPCS, check if we need to change them.
2680    //
2681    // FIXME: We need support for -meabi... we could just mangle it into the
2682    // name.
2683    if (Name == "apcs-gnu") {
2684      DoubleAlign = LongLongAlign = LongDoubleAlign = SuitableAlign = 32;
2685      SizeType = UnsignedLong;
2686
2687      // Revert to using SignedInt on apcs-gnu to comply with existing behaviour.
2688      WCharType = SignedInt;
2689
2690      // Do not respect the alignment of bit-field types when laying out
2691      // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc.
2692      UseBitFieldTypeAlignment = false;
2693
2694      /// gcc forces the alignment to 4 bytes, regardless of the type of the
2695      /// zero length bitfield.  This corresponds to EMPTY_FIELD_BOUNDARY in
2696      /// gcc.
2697      ZeroLengthBitfieldBoundary = 32;
2698
2699      if (IsThumb) {
2700        // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
2701        // so set preferred for small types to 32.
2702        DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
2703                             "i64:32:64-f32:32:32-f64:32:64-"
2704                             "v64:32:64-v128:32:128-a0:0:32-n32-S32");
2705      } else {
2706        DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2707                             "i64:32:64-f32:32:32-f64:32:64-"
2708                             "v64:32:64-v128:32:128-a0:0:32-n32-S32");
2709      }
2710
2711      // FIXME: Override "preferred align" for double and long long.
2712    } else if (Name == "aapcs") {
2713      // FIXME: Enumerated types are variable width in straight AAPCS.
2714    } else if (Name == "aapcs-linux") {
2715      ;
2716    } else
2717      return false;
2718
2719    return true;
2720  }
2721
2722  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
2723    if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore")
2724      Features["vfp2"] = true;
2725    else if (CPU == "cortex-a8" || CPU == "cortex-a9")
2726      Features["neon"] = true;
2727  }
2728
2729  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
2730                                 StringRef Name,
2731                                 bool Enabled) const {
2732    if (Name == "soft-float" || Name == "soft-float-abi" ||
2733        Name == "vfp2" || Name == "vfp3" || Name == "neon" || Name == "d16" ||
2734        Name == "neonfp") {
2735      Features[Name] = Enabled;
2736    } else
2737      return false;
2738
2739    return true;
2740  }
2741
2742  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
2743    FPU = NoFPU;
2744    SoftFloat = SoftFloatABI = false;
2745    for (unsigned i = 0, e = Features.size(); i != e; ++i) {
2746      if (Features[i] == "+soft-float")
2747        SoftFloat = true;
2748      else if (Features[i] == "+soft-float-abi")
2749        SoftFloatABI = true;
2750      else if (Features[i] == "+vfp2")
2751        FPU = VFP2FPU;
2752      else if (Features[i] == "+vfp3")
2753        FPU = VFP3FPU;
2754      else if (Features[i] == "+neon")
2755        FPU = NeonFPU;
2756    }
2757
2758    // Remove front-end specific options which the backend handles differently.
2759    std::vector<std::string>::iterator it;
2760    it = std::find(Features.begin(), Features.end(), "+soft-float");
2761    if (it != Features.end())
2762      Features.erase(it);
2763    it = std::find(Features.begin(), Features.end(), "+soft-float-abi");
2764    if (it != Features.end())
2765      Features.erase(it);
2766  }
2767
2768  virtual bool hasFeature(StringRef Feature) const {
2769    return llvm::StringSwitch<bool>(Feature)
2770        .Case("arm", true)
2771        .Case("softfloat", SoftFloat)
2772        .Case("thumb", IsThumb)
2773        .Case("neon", FPU == NeonFPU && !SoftFloat &&
2774              StringRef(getCPUDefineSuffix(CPU)).startswith("7"))
2775        .Default(false);
2776  }
2777  static const char *getCPUDefineSuffix(StringRef Name) {
2778    return llvm::StringSwitch<const char*>(Name)
2779      .Cases("arm8", "arm810", "4")
2780      .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4")
2781      .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T")
2782      .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T")
2783      .Case("ep9312", "4T")
2784      .Cases("arm10tdmi", "arm1020t", "5T")
2785      .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE")
2786      .Case("arm926ej-s", "5TEJ")
2787      .Cases("arm10e", "arm1020e", "arm1022e", "5TE")
2788      .Cases("xscale", "iwmmxt", "5TE")
2789      .Case("arm1136j-s", "6J")
2790      .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK")
2791      .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K")
2792      .Cases("arm1156t2-s", "arm1156t2f-s", "6T2")
2793      .Cases("cortex-a8", "cortex-a9", "7A")
2794      .Case("cortex-m3", "7M")
2795      .Case("cortex-m4", "7M")
2796      .Case("cortex-m0", "6M")
2797      .Default(0);
2798  }
2799  virtual bool setCPU(const std::string &Name) {
2800    if (!getCPUDefineSuffix(Name))
2801      return false;
2802
2803    CPU = Name;
2804    return true;
2805  }
2806  virtual void getTargetDefines(const LangOptions &Opts,
2807                                MacroBuilder &Builder) const {
2808    // Target identification.
2809    Builder.defineMacro("__arm");
2810    Builder.defineMacro("__arm__");
2811
2812    // Target properties.
2813    Builder.defineMacro("__ARMEL__");
2814    Builder.defineMacro("__LITTLE_ENDIAN__");
2815    Builder.defineMacro("__REGISTER_PREFIX__", "");
2816
2817    StringRef CPUArch = getCPUDefineSuffix(CPU);
2818    Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__");
2819
2820    // Subtarget options.
2821
2822    // FIXME: It's more complicated than this and we don't really support
2823    // interworking.
2824    if ('5' <= CPUArch[0] && CPUArch[0] <= '7')
2825      Builder.defineMacro("__THUMB_INTERWORK__");
2826
2827    if (ABI == "aapcs" || ABI == "aapcs-linux")
2828      Builder.defineMacro("__ARM_EABI__");
2829
2830    if (SoftFloat)
2831      Builder.defineMacro("__SOFTFP__");
2832
2833    if (CPU == "xscale")
2834      Builder.defineMacro("__XSCALE__");
2835
2836    bool IsARMv7 = CPUArch.startswith("7");
2837    if (IsThumb) {
2838      Builder.defineMacro("__THUMBEL__");
2839      Builder.defineMacro("__thumb__");
2840      if (CPUArch == "6T2" || IsARMv7)
2841        Builder.defineMacro("__thumb2__");
2842    }
2843
2844    // Note, this is always on in gcc, even though it doesn't make sense.
2845    Builder.defineMacro("__APCS_32__");
2846
2847    if (FPUModeIsVFP((FPUMode) FPU))
2848      Builder.defineMacro("__VFP_FP__");
2849
2850    // This only gets set when Neon instructions are actually available, unlike
2851    // the VFP define, hence the soft float and arch check. This is subtly
2852    // different from gcc, we follow the intent which was that it should be set
2853    // when Neon instructions are actually available.
2854    if (FPU == NeonFPU && !SoftFloat && IsARMv7)
2855      Builder.defineMacro("__ARM_NEON__");
2856  }
2857  virtual void getTargetBuiltins(const Builtin::Info *&Records,
2858                                 unsigned &NumRecords) const {
2859    Records = BuiltinInfo;
2860    NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin;
2861  }
2862  virtual bool isCLZForZeroUndef() const { return false; }
2863  virtual const char *getVAListDeclaration() const {
2864    return "typedef void* __builtin_va_list;";
2865  }
2866  virtual void getGCCRegNames(const char * const *&Names,
2867                              unsigned &NumNames) const;
2868  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2869                                unsigned &NumAliases) const;
2870  virtual bool validateAsmConstraint(const char *&Name,
2871                                     TargetInfo::ConstraintInfo &Info) const {
2872    // FIXME: Check if this is complete
2873    switch (*Name) {
2874    default:
2875    case 'l': // r0-r7
2876    case 'h': // r8-r15
2877    case 'w': // VFP Floating point register single precision
2878    case 'P': // VFP Floating point register double precision
2879      Info.setAllowsRegister();
2880      return true;
2881    case 'Q': // A memory address that is a single base register.
2882      Info.setAllowsMemory();
2883      return true;
2884    case 'U': // a memory reference...
2885      switch (Name[1]) {
2886      case 'q': // ...ARMV4 ldrsb
2887      case 'v': // ...VFP load/store (reg+constant offset)
2888      case 'y': // ...iWMMXt load/store
2889      case 't': // address valid for load/store opaque types wider
2890	        // than 128-bits
2891      case 'n': // valid address for Neon doubleword vector load/store
2892      case 'm': // valid address for Neon element and structure load/store
2893      case 's': // valid address for non-offset loads/stores of quad-word
2894	        // values in four ARM registers
2895        Info.setAllowsMemory();
2896        Name++;
2897        return true;
2898      }
2899    }
2900    return false;
2901  }
2902  virtual std::string convertConstraint(const char *&Constraint) const {
2903    std::string R;
2904    switch (*Constraint) {
2905    case 'U':   // Two-character constraint; add "^" hint for later parsing.
2906      R = std::string("^") + std::string(Constraint, 2);
2907      Constraint++;
2908      break;
2909    case 'p': // 'p' should be translated to 'r' by default.
2910      R = std::string("r");
2911      break;
2912    default:
2913      return std::string(1, *Constraint);
2914    }
2915    return R;
2916  }
2917  virtual const char *getClobbers() const {
2918    // FIXME: Is this really right?
2919    return "";
2920  }
2921};
2922
2923const char * const ARMTargetInfo::GCCRegNames[] = {
2924  // Integer registers
2925  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2926  "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc",
2927
2928  // Float registers
2929  "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
2930  "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15",
2931  "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23",
2932  "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31",
2933
2934  // Double registers
2935  "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
2936  "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15",
2937  "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23",
2938  "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31",
2939
2940  // Quad registers
2941  "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
2942  "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15"
2943};
2944
2945void ARMTargetInfo::getGCCRegNames(const char * const *&Names,
2946                                   unsigned &NumNames) const {
2947  Names = GCCRegNames;
2948  NumNames = llvm::array_lengthof(GCCRegNames);
2949}
2950
2951const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = {
2952  { { "a1" }, "r0" },
2953  { { "a2" }, "r1" },
2954  { { "a3" }, "r2" },
2955  { { "a4" }, "r3" },
2956  { { "v1" }, "r4" },
2957  { { "v2" }, "r5" },
2958  { { "v3" }, "r6" },
2959  { { "v4" }, "r7" },
2960  { { "v5" }, "r8" },
2961  { { "v6", "rfp" }, "r9" },
2962  { { "sl" }, "r10" },
2963  { { "fp" }, "r11" },
2964  { { "ip" }, "r12" },
2965  { { "r13" }, "sp" },
2966  { { "r14" }, "lr" },
2967  { { "r15" }, "pc" },
2968  // The S, D and Q registers overlap, but aren't really aliases; we
2969  // don't want to substitute one of these for a different-sized one.
2970};
2971
2972void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
2973                                       unsigned &NumAliases) const {
2974  Aliases = GCCRegAliases;
2975  NumAliases = llvm::array_lengthof(GCCRegAliases);
2976}
2977
2978const Builtin::Info ARMTargetInfo::BuiltinInfo[] = {
2979#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
2980#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
2981                                              ALL_LANGUAGES },
2982#include "clang/Basic/BuiltinsARM.def"
2983};
2984} // end anonymous namespace.
2985
2986namespace {
2987class DarwinARMTargetInfo :
2988  public DarwinTargetInfo<ARMTargetInfo> {
2989protected:
2990  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
2991                            MacroBuilder &Builder) const {
2992    getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion);
2993  }
2994
2995public:
2996  DarwinARMTargetInfo(const std::string& triple)
2997    : DarwinTargetInfo<ARMTargetInfo>(triple) {
2998    HasAlignMac68kSupport = true;
2999    // iOS always has 64-bit atomic instructions.
3000    // FIXME: This should be based off of the target features in ARMTargetInfo.
3001    MaxAtomicInlineWidth = 64;
3002  }
3003};
3004} // end anonymous namespace.
3005
3006
3007namespace {
3008// Hexagon abstract base class
3009class HexagonTargetInfo : public TargetInfo {
3010  static const Builtin::Info BuiltinInfo[];
3011  static const char * const GCCRegNames[];
3012  static const TargetInfo::GCCRegAlias GCCRegAliases[];
3013  std::string CPU;
3014public:
3015  HexagonTargetInfo(const std::string& triple) : TargetInfo(triple)  {
3016    BigEndian = false;
3017    DescriptionString = ("e-p:32:32:32-"
3018                         "i64:64:64-i32:32:32-"
3019                         "i16:16:16-i1:32:32-a:0:0");
3020
3021    // {} in inline assembly are packet specifiers, not assembly variant
3022    // specifiers.
3023    NoAsmVariants = true;
3024  }
3025
3026  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3027                                 unsigned &NumRecords) const {
3028    Records = BuiltinInfo;
3029    NumRecords = clang::Hexagon::LastTSBuiltin-Builtin::FirstTSBuiltin;
3030  }
3031
3032  virtual bool validateAsmConstraint(const char *&Name,
3033                                     TargetInfo::ConstraintInfo &Info) const {
3034    return true;
3035  }
3036
3037  virtual void getTargetDefines(const LangOptions &Opts,
3038                                MacroBuilder &Builder) const;
3039
3040  virtual bool hasFeature(StringRef Feature) const {
3041    return Feature == "hexagon";
3042  }
3043
3044  virtual const char *getVAListDeclaration() const {
3045    return "typedef char* __builtin_va_list;";
3046  }
3047  virtual void getGCCRegNames(const char * const *&Names,
3048                              unsigned &NumNames) const;
3049  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3050                                unsigned &NumAliases) const;
3051  virtual const char *getClobbers() const {
3052    return "";
3053  }
3054
3055  static const char *getHexagonCPUSuffix(StringRef Name) {
3056    return llvm::StringSwitch<const char*>(Name)
3057      .Case("hexagonv2", "2")
3058      .Case("hexagonv3", "3")
3059      .Case("hexagonv4", "4")
3060      .Default(0);
3061  }
3062
3063  virtual bool setCPU(const std::string &Name) {
3064    if (!getHexagonCPUSuffix(Name))
3065      return false;
3066
3067    CPU = Name;
3068    return true;
3069  }
3070};
3071
3072void HexagonTargetInfo::getTargetDefines(const LangOptions &Opts,
3073                                MacroBuilder &Builder) const {
3074  Builder.defineMacro("qdsp6");
3075  Builder.defineMacro("__qdsp6", "1");
3076  Builder.defineMacro("__qdsp6__", "1");
3077
3078  Builder.defineMacro("hexagon");
3079  Builder.defineMacro("__hexagon", "1");
3080  Builder.defineMacro("__hexagon__", "1");
3081
3082  if(CPU == "hexagonv1") {
3083    Builder.defineMacro("__HEXAGON_V1__");
3084    Builder.defineMacro("__HEXAGON_ARCH__", "1");
3085    if(Opts.HexagonQdsp6Compat) {
3086      Builder.defineMacro("__QDSP6_V1__");
3087      Builder.defineMacro("__QDSP6_ARCH__", "1");
3088    }
3089  }
3090  else if(CPU == "hexagonv2") {
3091    Builder.defineMacro("__HEXAGON_V2__");
3092    Builder.defineMacro("__HEXAGON_ARCH__", "2");
3093    if(Opts.HexagonQdsp6Compat) {
3094      Builder.defineMacro("__QDSP6_V2__");
3095      Builder.defineMacro("__QDSP6_ARCH__", "2");
3096    }
3097  }
3098  else if(CPU == "hexagonv3") {
3099    Builder.defineMacro("__HEXAGON_V3__");
3100    Builder.defineMacro("__HEXAGON_ARCH__", "3");
3101    if(Opts.HexagonQdsp6Compat) {
3102      Builder.defineMacro("__QDSP6_V3__");
3103      Builder.defineMacro("__QDSP6_ARCH__", "3");
3104    }
3105  }
3106  else if(CPU == "hexagonv4") {
3107    Builder.defineMacro("__HEXAGON_V4__");
3108    Builder.defineMacro("__HEXAGON_ARCH__", "4");
3109    if(Opts.HexagonQdsp6Compat) {
3110      Builder.defineMacro("__QDSP6_V4__");
3111      Builder.defineMacro("__QDSP6_ARCH__", "4");
3112    }
3113  }
3114}
3115
3116const char * const HexagonTargetInfo::GCCRegNames[] = {
3117  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3118  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3119  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3120  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
3121  "p0", "p1", "p2", "p3",
3122  "sa0", "lc0", "sa1", "lc1", "m0", "m1", "usr", "ugp"
3123};
3124
3125void HexagonTargetInfo::getGCCRegNames(const char * const *&Names,
3126                                   unsigned &NumNames) const {
3127  Names = GCCRegNames;
3128  NumNames = llvm::array_lengthof(GCCRegNames);
3129}
3130
3131
3132const TargetInfo::GCCRegAlias HexagonTargetInfo::GCCRegAliases[] = {
3133  { { "sp" }, "r29" },
3134  { { "fp" }, "r30" },
3135  { { "lr" }, "r31" },
3136 };
3137
3138void HexagonTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3139                                     unsigned &NumAliases) const {
3140  Aliases = GCCRegAliases;
3141  NumAliases = llvm::array_lengthof(GCCRegAliases);
3142}
3143
3144
3145const Builtin::Info HexagonTargetInfo::BuiltinInfo[] = {
3146#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
3147#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
3148                                              ALL_LANGUAGES },
3149#include "clang/Basic/BuiltinsHexagon.def"
3150};
3151}
3152
3153
3154namespace {
3155class SparcV8TargetInfo : public TargetInfo {
3156  static const TargetInfo::GCCRegAlias GCCRegAliases[];
3157  static const char * const GCCRegNames[];
3158  bool SoftFloat;
3159public:
3160  SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) {
3161    // FIXME: Support Sparc quad-precision long double?
3162    BigEndian = false;
3163    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
3164                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3165  }
3166  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
3167                                 StringRef Name,
3168                                 bool Enabled) const {
3169    if (Name == "soft-float")
3170      Features[Name] = Enabled;
3171    else
3172      return false;
3173
3174    return true;
3175  }
3176  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
3177    SoftFloat = false;
3178    for (unsigned i = 0, e = Features.size(); i != e; ++i)
3179      if (Features[i] == "+soft-float")
3180        SoftFloat = true;
3181  }
3182  virtual void getTargetDefines(const LangOptions &Opts,
3183                                MacroBuilder &Builder) const {
3184    DefineStd(Builder, "sparc", Opts);
3185    Builder.defineMacro("__sparcv8");
3186    Builder.defineMacro("__REGISTER_PREFIX__", "");
3187
3188    if (SoftFloat)
3189      Builder.defineMacro("SOFT_FLOAT", "1");
3190  }
3191
3192  virtual bool hasFeature(StringRef Feature) const {
3193    return llvm::StringSwitch<bool>(Feature)
3194             .Case("softfloat", SoftFloat)
3195             .Case("sparc", true)
3196             .Default(false);
3197  }
3198
3199  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3200                                 unsigned &NumRecords) const {
3201    // FIXME: Implement!
3202  }
3203  virtual const char *getVAListDeclaration() const {
3204    return "typedef void* __builtin_va_list;";
3205  }
3206  virtual void getGCCRegNames(const char * const *&Names,
3207                              unsigned &NumNames) const;
3208  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3209                                unsigned &NumAliases) const;
3210  virtual bool validateAsmConstraint(const char *&Name,
3211                                     TargetInfo::ConstraintInfo &info) const {
3212    // FIXME: Implement!
3213    return false;
3214  }
3215  virtual const char *getClobbers() const {
3216    // FIXME: Implement!
3217    return "";
3218  }
3219};
3220
3221const char * const SparcV8TargetInfo::GCCRegNames[] = {
3222  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3223  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3224  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3225  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
3226};
3227
3228void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names,
3229                                       unsigned &NumNames) const {
3230  Names = GCCRegNames;
3231  NumNames = llvm::array_lengthof(GCCRegNames);
3232}
3233
3234const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = {
3235  { { "g0" }, "r0" },
3236  { { "g1" }, "r1" },
3237  { { "g2" }, "r2" },
3238  { { "g3" }, "r3" },
3239  { { "g4" }, "r4" },
3240  { { "g5" }, "r5" },
3241  { { "g6" }, "r6" },
3242  { { "g7" }, "r7" },
3243  { { "o0" }, "r8" },
3244  { { "o1" }, "r9" },
3245  { { "o2" }, "r10" },
3246  { { "o3" }, "r11" },
3247  { { "o4" }, "r12" },
3248  { { "o5" }, "r13" },
3249  { { "o6", "sp" }, "r14" },
3250  { { "o7" }, "r15" },
3251  { { "l0" }, "r16" },
3252  { { "l1" }, "r17" },
3253  { { "l2" }, "r18" },
3254  { { "l3" }, "r19" },
3255  { { "l4" }, "r20" },
3256  { { "l5" }, "r21" },
3257  { { "l6" }, "r22" },
3258  { { "l7" }, "r23" },
3259  { { "i0" }, "r24" },
3260  { { "i1" }, "r25" },
3261  { { "i2" }, "r26" },
3262  { { "i3" }, "r27" },
3263  { { "i4" }, "r28" },
3264  { { "i5" }, "r29" },
3265  { { "i6", "fp" }, "r30" },
3266  { { "i7" }, "r31" },
3267};
3268
3269void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3270                                         unsigned &NumAliases) const {
3271  Aliases = GCCRegAliases;
3272  NumAliases = llvm::array_lengthof(GCCRegAliases);
3273}
3274} // end anonymous namespace.
3275
3276namespace {
3277class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> {
3278public:
3279  AuroraUXSparcV8TargetInfo(const std::string& triple) :
3280      AuroraUXTargetInfo<SparcV8TargetInfo>(triple) {
3281    SizeType = UnsignedInt;
3282    PtrDiffType = SignedInt;
3283  }
3284};
3285class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> {
3286public:
3287  SolarisSparcV8TargetInfo(const std::string& triple) :
3288      SolarisTargetInfo<SparcV8TargetInfo>(triple) {
3289    SizeType = UnsignedInt;
3290    PtrDiffType = SignedInt;
3291  }
3292};
3293} // end anonymous namespace.
3294
3295namespace {
3296  class MSP430TargetInfo : public TargetInfo {
3297    static const char * const GCCRegNames[];
3298  public:
3299    MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) {
3300      BigEndian = false;
3301      TLSSupported = false;
3302      IntWidth = 16; IntAlign = 16;
3303      LongWidth = 32; LongLongWidth = 64;
3304      LongAlign = LongLongAlign = 16;
3305      PointerWidth = 16; PointerAlign = 16;
3306      SuitableAlign = 16;
3307      SizeType = UnsignedInt;
3308      IntMaxType = SignedLong;
3309      UIntMaxType = UnsignedLong;
3310      IntPtrType = SignedShort;
3311      PtrDiffType = SignedInt;
3312      SigAtomicType = SignedLong;
3313      DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16";
3314   }
3315    virtual void getTargetDefines(const LangOptions &Opts,
3316                                  MacroBuilder &Builder) const {
3317      Builder.defineMacro("MSP430");
3318      Builder.defineMacro("__MSP430__");
3319      // FIXME: defines for different 'flavours' of MCU
3320    }
3321    virtual void getTargetBuiltins(const Builtin::Info *&Records,
3322                                   unsigned &NumRecords) const {
3323     // FIXME: Implement.
3324      Records = 0;
3325      NumRecords = 0;
3326    }
3327    virtual bool hasFeature(StringRef Feature) const {
3328      return Feature == "msp430";
3329    }
3330    virtual void getGCCRegNames(const char * const *&Names,
3331                                unsigned &NumNames) const;
3332    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3333                                  unsigned &NumAliases) const {
3334      // No aliases.
3335      Aliases = 0;
3336      NumAliases = 0;
3337    }
3338    virtual bool validateAsmConstraint(const char *&Name,
3339                                       TargetInfo::ConstraintInfo &info) const {
3340      // No target constraints for now.
3341      return false;
3342    }
3343    virtual const char *getClobbers() const {
3344      // FIXME: Is this really right?
3345      return "";
3346    }
3347    virtual const char *getVAListDeclaration() const {
3348      // FIXME: implement
3349      return "typedef char* __builtin_va_list;";
3350   }
3351  };
3352
3353  const char * const MSP430TargetInfo::GCCRegNames[] = {
3354    "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3355    "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
3356  };
3357
3358  void MSP430TargetInfo::getGCCRegNames(const char * const *&Names,
3359                                        unsigned &NumNames) const {
3360    Names = GCCRegNames;
3361    NumNames = llvm::array_lengthof(GCCRegNames);
3362  }
3363}
3364
3365namespace {
3366
3367  // LLVM and Clang cannot be used directly to output native binaries for
3368  // target, but is used to compile C code to llvm bitcode with correct
3369  // type and alignment information.
3370  //
3371  // TCE uses the llvm bitcode as input and uses it for generating customized
3372  // target processor and program binary. TCE co-design environment is
3373  // publicly available in http://tce.cs.tut.fi
3374
3375  static const unsigned TCEOpenCLAddrSpaceMap[] = {
3376      3, // opencl_global
3377      4, // opencl_local
3378      5  // opencl_constant
3379  };
3380
3381  class TCETargetInfo : public TargetInfo{
3382  public:
3383    TCETargetInfo(const std::string& triple) : TargetInfo(triple) {
3384      TLSSupported = false;
3385      IntWidth = 32;
3386      LongWidth = LongLongWidth = 32;
3387      PointerWidth = 32;
3388      IntAlign = 32;
3389      LongAlign = LongLongAlign = 32;
3390      PointerAlign = 32;
3391      SuitableAlign = 32;
3392      SizeType = UnsignedInt;
3393      IntMaxType = SignedLong;
3394      UIntMaxType = UnsignedLong;
3395      IntPtrType = SignedInt;
3396      PtrDiffType = SignedInt;
3397      FloatWidth = 32;
3398      FloatAlign = 32;
3399      DoubleWidth = 32;
3400      DoubleAlign = 32;
3401      LongDoubleWidth = 32;
3402      LongDoubleAlign = 32;
3403      FloatFormat = &llvm::APFloat::IEEEsingle;
3404      DoubleFormat = &llvm::APFloat::IEEEsingle;
3405      LongDoubleFormat = &llvm::APFloat::IEEEsingle;
3406      DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-"
3407                          "i16:16:32-i32:32:32-i64:32:32-"
3408                          "f32:32:32-f64:32:32-v64:32:32-"
3409                          "v128:32:32-a0:0:32-n32";
3410      AddrSpaceMap = &TCEOpenCLAddrSpaceMap;
3411    }
3412
3413    virtual void getTargetDefines(const LangOptions &Opts,
3414                                  MacroBuilder &Builder) const {
3415      DefineStd(Builder, "tce", Opts);
3416      Builder.defineMacro("__TCE__");
3417      Builder.defineMacro("__TCE_V1__");
3418    }
3419    virtual bool hasFeature(StringRef Feature) const {
3420      return Feature == "tce";
3421    }
3422
3423    virtual void getTargetBuiltins(const Builtin::Info *&Records,
3424                                   unsigned &NumRecords) const {}
3425    virtual const char *getClobbers() const {
3426      return "";
3427    }
3428    virtual const char *getVAListDeclaration() const {
3429      return "typedef void* __builtin_va_list;";
3430    }
3431    virtual void getGCCRegNames(const char * const *&Names,
3432                                unsigned &NumNames) const {}
3433    virtual bool validateAsmConstraint(const char *&Name,
3434                                       TargetInfo::ConstraintInfo &info) const {
3435      return true;
3436    }
3437    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3438                                  unsigned &NumAliases) const {}
3439  };
3440}
3441
3442namespace {
3443class MipsTargetInfoBase : public TargetInfo {
3444  std::string CPU;
3445  bool SoftFloat;
3446  bool SingleFloat;
3447
3448protected:
3449  std::string ABI;
3450
3451public:
3452  MipsTargetInfoBase(const std::string& triple,
3453                     const std::string& ABIStr,
3454                     const std::string& CPUStr)
3455    : TargetInfo(triple),
3456      CPU(CPUStr),
3457      SoftFloat(false), SingleFloat(false),
3458      ABI(ABIStr)
3459  {}
3460
3461  virtual const char *getABI() const { return ABI.c_str(); }
3462  virtual bool setABI(const std::string &Name) = 0;
3463  virtual bool setCPU(const std::string &Name) {
3464    CPU = Name;
3465    return true;
3466  }
3467  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
3468    Features[ABI] = true;
3469    Features[CPU] = true;
3470  }
3471
3472  virtual void getArchDefines(const LangOptions &Opts,
3473                              MacroBuilder &Builder) const {
3474    if (SoftFloat)
3475      Builder.defineMacro("__mips_soft_float", Twine(1));
3476    else if (SingleFloat)
3477      Builder.defineMacro("__mips_single_float", Twine(1));
3478    else if (!SoftFloat && !SingleFloat)
3479      Builder.defineMacro("__mips_hard_float", Twine(1));
3480    else
3481      llvm_unreachable("Invalid float ABI for Mips.");
3482
3483    Builder.defineMacro("_MIPS_SZPTR", Twine(getPointerWidth(0)));
3484    Builder.defineMacro("_MIPS_SZINT", Twine(getIntWidth()));
3485    Builder.defineMacro("_MIPS_SZLONG", Twine(getLongWidth()));
3486  }
3487
3488  virtual void getTargetDefines(const LangOptions &Opts,
3489                                MacroBuilder &Builder) const = 0;
3490  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3491                                 unsigned &NumRecords) const {
3492    // FIXME: Implement!
3493  }
3494  virtual bool hasFeature(StringRef Feature) const {
3495    return Feature == "mips";
3496  }
3497  virtual const char *getVAListDeclaration() const {
3498    return "typedef void* __builtin_va_list;";
3499  }
3500  virtual void getGCCRegNames(const char * const *&Names,
3501                              unsigned &NumNames) const {
3502    static const char * const GCCRegNames[] = {
3503      // CPU register names
3504      // Must match second column of GCCRegAliases
3505      "$0",   "$1",   "$2",   "$3",   "$4",   "$5",   "$6",   "$7",
3506      "$8",   "$9",   "$10",  "$11",  "$12",  "$13",  "$14",  "$15",
3507      "$16",  "$17",  "$18",  "$19",  "$20",  "$21",  "$22",  "$23",
3508      "$24",  "$25",  "$26",  "$27",  "$28",  "$29",  "$30",  "$31",
3509      // Floating point register names
3510      "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
3511      "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
3512      "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
3513      "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
3514      // Hi/lo and condition register names
3515      "hi",   "lo",   "",     "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4",
3516      "$fcc5","$fcc6","$fcc7"
3517    };
3518    Names = GCCRegNames;
3519    NumNames = llvm::array_lengthof(GCCRegNames);
3520  }
3521  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3522                                unsigned &NumAliases) const = 0;
3523  virtual bool validateAsmConstraint(const char *&Name,
3524                                     TargetInfo::ConstraintInfo &Info) const {
3525    switch (*Name) {
3526    default:
3527      return false;
3528
3529    case 'r': // CPU registers.
3530    case 'd': // Equivalent to "r" unless generating MIPS16 code.
3531    case 'y': // Equivalent to "r", backwards compatibility only.
3532    case 'f': // floating-point registers.
3533    case 'c': // $25 for indirect jumps
3534    case 'l': // lo register
3535    case 'x': // hilo register pair
3536      Info.setAllowsRegister();
3537      return true;
3538    }
3539  }
3540
3541  virtual const char *getClobbers() const {
3542    // FIXME: Implement!
3543    return "";
3544  }
3545
3546  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
3547                                 StringRef Name,
3548                                 bool Enabled) const {
3549    if (Name == "soft-float" || Name == "single-float" ||
3550        Name == "o32" || Name == "n32" || Name == "n64" || Name == "eabi" ||
3551        Name == "mips32" || Name == "mips32r2" ||
3552        Name == "mips64" || Name == "mips64r2") {
3553      Features[Name] = Enabled;
3554      return true;
3555    }
3556    return false;
3557  }
3558
3559  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
3560    SoftFloat = false;
3561    SingleFloat = false;
3562
3563    for (std::vector<std::string>::iterator it = Features.begin(),
3564         ie = Features.end(); it != ie; ++it) {
3565      if (*it == "+single-float") {
3566        SingleFloat = true;
3567        break;
3568      }
3569
3570      if (*it == "+soft-float") {
3571        SoftFloat = true;
3572        // This option is front-end specific.
3573        // Do not need to pass it to the backend.
3574        Features.erase(it);
3575        break;
3576      }
3577    }
3578  }
3579};
3580
3581class Mips32TargetInfoBase : public MipsTargetInfoBase {
3582public:
3583  Mips32TargetInfoBase(const std::string& triple) :
3584    MipsTargetInfoBase(triple, "o32", "mips32") {
3585    SizeType = UnsignedInt;
3586    PtrDiffType = SignedInt;
3587  }
3588  virtual bool setABI(const std::string &Name) {
3589    if ((Name == "o32") || (Name == "eabi")) {
3590      ABI = Name;
3591      return true;
3592    } else
3593      return false;
3594  }
3595  virtual void getArchDefines(const LangOptions &Opts,
3596                              MacroBuilder &Builder) const {
3597    MipsTargetInfoBase::getArchDefines(Opts, Builder);
3598
3599    if (ABI == "o32") {
3600      Builder.defineMacro("__mips_o32");
3601      Builder.defineMacro("_ABIO32", "1");
3602      Builder.defineMacro("_MIPS_SIM", "_ABIO32");
3603    }
3604    else if (ABI == "eabi")
3605      Builder.defineMacro("__mips_eabi");
3606    else
3607      llvm_unreachable("Invalid ABI for Mips32.");
3608  }
3609  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3610                                unsigned &NumAliases) const {
3611    static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
3612      { { "at" },  "$1" },
3613      { { "v0" },  "$2" },
3614      { { "v1" },  "$3" },
3615      { { "a0" },  "$4" },
3616      { { "a1" },  "$5" },
3617      { { "a2" },  "$6" },
3618      { { "a3" },  "$7" },
3619      { { "t0" },  "$8" },
3620      { { "t1" },  "$9" },
3621      { { "t2" }, "$10" },
3622      { { "t3" }, "$11" },
3623      { { "t4" }, "$12" },
3624      { { "t5" }, "$13" },
3625      { { "t6" }, "$14" },
3626      { { "t7" }, "$15" },
3627      { { "s0" }, "$16" },
3628      { { "s1" }, "$17" },
3629      { { "s2" }, "$18" },
3630      { { "s3" }, "$19" },
3631      { { "s4" }, "$20" },
3632      { { "s5" }, "$21" },
3633      { { "s6" }, "$22" },
3634      { { "s7" }, "$23" },
3635      { { "t8" }, "$24" },
3636      { { "t9" }, "$25" },
3637      { { "k0" }, "$26" },
3638      { { "k1" }, "$27" },
3639      { { "gp" }, "$28" },
3640      { { "sp","$sp" }, "$29" },
3641      { { "fp","$fp" }, "$30" },
3642      { { "ra" }, "$31" }
3643    };
3644    Aliases = GCCRegAliases;
3645    NumAliases = llvm::array_lengthof(GCCRegAliases);
3646  }
3647};
3648
3649class Mips32EBTargetInfo : public Mips32TargetInfoBase {
3650public:
3651  Mips32EBTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
3652    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3653                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3654  }
3655  virtual void getTargetDefines(const LangOptions &Opts,
3656                                MacroBuilder &Builder) const {
3657    DefineStd(Builder, "mips", Opts);
3658    Builder.defineMacro("_mips");
3659    DefineStd(Builder, "MIPSEB", Opts);
3660    Builder.defineMacro("_MIPSEB");
3661    Builder.defineMacro("__REGISTER_PREFIX__", "");
3662    getArchDefines(Opts, Builder);
3663  }
3664};
3665
3666class Mips32ELTargetInfo : public Mips32TargetInfoBase {
3667public:
3668  Mips32ELTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
3669    BigEndian = false;
3670    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3671                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3672  }
3673  virtual void getTargetDefines(const LangOptions &Opts,
3674                                MacroBuilder &Builder) const {
3675    DefineStd(Builder, "mips", Opts);
3676    Builder.defineMacro("_mips");
3677    DefineStd(Builder, "MIPSEL", Opts);
3678    Builder.defineMacro("_MIPSEL");
3679    Builder.defineMacro("__REGISTER_PREFIX__", "");
3680    getArchDefines(Opts, Builder);
3681  }
3682};
3683
3684class Mips64TargetInfoBase : public MipsTargetInfoBase {
3685  virtual void SetDescriptionString(const std::string &Name) = 0;
3686public:
3687  Mips64TargetInfoBase(const std::string& triple) :
3688    MipsTargetInfoBase(triple, "n64", "mips64") {
3689    LongWidth = LongAlign = 64;
3690    PointerWidth = PointerAlign = 64;
3691    LongDoubleWidth = LongDoubleAlign = 128;
3692    LongDoubleFormat = &llvm::APFloat::IEEEquad;
3693    SuitableAlign = 128;
3694  }
3695  virtual bool setABI(const std::string &Name) {
3696    SetDescriptionString(Name);
3697
3698    if (Name != "n32" && Name != "n64")
3699      return false;
3700
3701    ABI = Name;
3702
3703    if (Name == "n32") {
3704      LongWidth = LongAlign = 32;
3705      PointerWidth = PointerAlign = 32;
3706    }
3707
3708    return true;
3709  }
3710  virtual void getArchDefines(const LangOptions &Opts,
3711                              MacroBuilder &Builder) const {
3712    MipsTargetInfoBase::getArchDefines(Opts, Builder);
3713
3714    if (ABI == "n32") {
3715      Builder.defineMacro("__mips_n32");
3716      Builder.defineMacro("_ABIN32", "2");
3717      Builder.defineMacro("_MIPS_SIM", "_ABIN32");
3718    }
3719    else if (ABI == "n64") {
3720      Builder.defineMacro("__mips_n64");
3721      Builder.defineMacro("_ABI64", "3");
3722      Builder.defineMacro("_MIPS_SIM", "_ABI64");
3723    }
3724    else
3725      llvm_unreachable("Invalid ABI for Mips64.");
3726  }
3727  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3728                                unsigned &NumAliases) const {
3729    static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
3730      { { "at" },  "$1" },
3731      { { "v0" },  "$2" },
3732      { { "v1" },  "$3" },
3733      { { "a0" },  "$4" },
3734      { { "a1" },  "$5" },
3735      { { "a2" },  "$6" },
3736      { { "a3" },  "$7" },
3737      { { "a4" },  "$8" },
3738      { { "a5" },  "$9" },
3739      { { "a6" }, "$10" },
3740      { { "a7" }, "$11" },
3741      { { "t0" }, "$12" },
3742      { { "t1" }, "$13" },
3743      { { "t2" }, "$14" },
3744      { { "t3" }, "$15" },
3745      { { "s0" }, "$16" },
3746      { { "s1" }, "$17" },
3747      { { "s2" }, "$18" },
3748      { { "s3" }, "$19" },
3749      { { "s4" }, "$20" },
3750      { { "s5" }, "$21" },
3751      { { "s6" }, "$22" },
3752      { { "s7" }, "$23" },
3753      { { "t8" }, "$24" },
3754      { { "t9" }, "$25" },
3755      { { "k0" }, "$26" },
3756      { { "k1" }, "$27" },
3757      { { "gp" }, "$28" },
3758      { { "sp","$sp" }, "$29" },
3759      { { "fp","$fp" }, "$30" },
3760      { { "ra" }, "$31" }
3761    };
3762    Aliases = GCCRegAliases;
3763    NumAliases = llvm::array_lengthof(GCCRegAliases);
3764  }
3765};
3766
3767class Mips64EBTargetInfo : public Mips64TargetInfoBase {
3768  virtual void SetDescriptionString(const std::string &Name) {
3769    // Change DescriptionString only if ABI is n32.
3770    if (Name == "n32")
3771      DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3772                          "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
3773                          "v64:64:64-n32";
3774  }
3775public:
3776  Mips64EBTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
3777    // Default ABI is n64.
3778    DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3779                        "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
3780                        "v64:64:64-n32";
3781  }
3782  virtual void getTargetDefines(const LangOptions &Opts,
3783                                MacroBuilder &Builder) const {
3784    DefineStd(Builder, "mips", Opts);
3785    Builder.defineMacro("_mips");
3786    DefineStd(Builder, "MIPSEB", Opts);
3787    Builder.defineMacro("_MIPSEB");
3788    Builder.defineMacro("__REGISTER_PREFIX__", "");
3789    getArchDefines(Opts, Builder);
3790  }
3791};
3792
3793class Mips64ELTargetInfo : public Mips64TargetInfoBase {
3794  virtual void SetDescriptionString(const std::string &Name) {
3795    // Change DescriptionString only if ABI is n32.
3796    if (Name == "n32")
3797      DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3798                          "i64:64:64-f32:32:32-f64:64:64-f128:128:128"
3799                          "-v64:64:64-n32";
3800  }
3801public:
3802  Mips64ELTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
3803    // Default ABI is n64.
3804    BigEndian = false;
3805    DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3806                        "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
3807                        "v64:64:64-n32";
3808  }
3809  virtual void getTargetDefines(const LangOptions &Opts,
3810                                MacroBuilder &Builder) const {
3811    DefineStd(Builder, "mips", Opts);
3812    Builder.defineMacro("_mips");
3813    DefineStd(Builder, "MIPSEL", Opts);
3814    Builder.defineMacro("_MIPSEL");
3815    Builder.defineMacro("__REGISTER_PREFIX__", "");
3816    getArchDefines(Opts, Builder);
3817  }
3818};
3819} // end anonymous namespace.
3820
3821namespace {
3822class PNaClTargetInfo : public TargetInfo {
3823public:
3824  PNaClTargetInfo(const std::string& triple) : TargetInfo(triple) {
3825    BigEndian = false;
3826    this->UserLabelPrefix = "";
3827    this->LongAlign = 32;
3828    this->LongWidth = 32;
3829    this->PointerAlign = 32;
3830    this->PointerWidth = 32;
3831    this->IntMaxType = TargetInfo::SignedLongLong;
3832    this->UIntMaxType = TargetInfo::UnsignedLongLong;
3833    this->Int64Type = TargetInfo::SignedLongLong;
3834    this->DoubleAlign = 64;
3835    this->LongDoubleWidth = 64;
3836    this->LongDoubleAlign = 64;
3837    this->SizeType = TargetInfo::UnsignedInt;
3838    this->PtrDiffType = TargetInfo::SignedInt;
3839    this->IntPtrType = TargetInfo::SignedInt;
3840    this->RegParmMax = 2;
3841    DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
3842                        "f32:32:32-f64:64:64-p:32:32:32-v128:32:32";
3843  }
3844
3845  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
3846  }
3847  virtual void getArchDefines(const LangOptions &Opts,
3848                              MacroBuilder &Builder) const {
3849    Builder.defineMacro("__le32__");
3850    Builder.defineMacro("__pnacl__");
3851  }
3852  virtual void getTargetDefines(const LangOptions &Opts,
3853                                MacroBuilder &Builder) const {
3854    DefineStd(Builder, "unix", Opts);
3855    Builder.defineMacro("__ELF__");
3856    if (Opts.POSIXThreads)
3857      Builder.defineMacro("_REENTRANT");
3858    if (Opts.CPlusPlus)
3859      Builder.defineMacro("_GNU_SOURCE");
3860
3861    Builder.defineMacro("__LITTLE_ENDIAN__");
3862    Builder.defineMacro("__native_client__");
3863    getArchDefines(Opts, Builder);
3864  }
3865  virtual bool hasFeature(StringRef Feature) const {
3866    return Feature == "pnacl";
3867  }
3868  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3869                                 unsigned &NumRecords) const {
3870  }
3871  virtual const char *getVAListDeclaration() const {
3872    return "typedef int __builtin_va_list[4];";
3873  }
3874  virtual void getGCCRegNames(const char * const *&Names,
3875                              unsigned &NumNames) const;
3876  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3877                                unsigned &NumAliases) const;
3878  virtual bool validateAsmConstraint(const char *&Name,
3879                                     TargetInfo::ConstraintInfo &Info) const {
3880    return false;
3881  }
3882
3883  virtual const char *getClobbers() const {
3884    return "";
3885  }
3886};
3887
3888void PNaClTargetInfo::getGCCRegNames(const char * const *&Names,
3889                                     unsigned &NumNames) const {
3890  Names = NULL;
3891  NumNames = 0;
3892}
3893
3894void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3895                                       unsigned &NumAliases) const {
3896  Aliases = NULL;
3897  NumAliases = 0;
3898}
3899} // end anonymous namespace.
3900
3901
3902//===----------------------------------------------------------------------===//
3903// Driver code
3904//===----------------------------------------------------------------------===//
3905
3906static TargetInfo *AllocateTarget(const std::string &T) {
3907  llvm::Triple Triple(T);
3908  llvm::Triple::OSType os = Triple.getOS();
3909
3910  switch (Triple.getArch()) {
3911  default:
3912    return NULL;
3913
3914  case llvm::Triple::hexagon:
3915    return new HexagonTargetInfo(T);
3916
3917  case llvm::Triple::arm:
3918  case llvm::Triple::thumb:
3919    if (Triple.isOSDarwin())
3920      return new DarwinARMTargetInfo(T);
3921
3922    switch (os) {
3923    case llvm::Triple::Linux:
3924      return new LinuxTargetInfo<ARMTargetInfo>(T);
3925    case llvm::Triple::FreeBSD:
3926      return new FreeBSDTargetInfo<ARMTargetInfo>(T);
3927    case llvm::Triple::NetBSD:
3928      return new NetBSDTargetInfo<ARMTargetInfo>(T);
3929    case llvm::Triple::RTEMS:
3930      return new RTEMSTargetInfo<ARMTargetInfo>(T);
3931    default:
3932      return new ARMTargetInfo(T);
3933    }
3934
3935  case llvm::Triple::msp430:
3936    return new MSP430TargetInfo(T);
3937
3938  case llvm::Triple::mips:
3939    switch (os) {
3940    case llvm::Triple::Linux:
3941      return new LinuxTargetInfo<Mips32EBTargetInfo>(T);
3942    case llvm::Triple::RTEMS:
3943      return new RTEMSTargetInfo<Mips32EBTargetInfo>(T);
3944    case llvm::Triple::FreeBSD:
3945      return new FreeBSDTargetInfo<Mips32EBTargetInfo>(T);
3946    case llvm::Triple::NetBSD:
3947      return new NetBSDTargetInfo<Mips32EBTargetInfo>(T);
3948    default:
3949      return new Mips32EBTargetInfo(T);
3950    }
3951
3952  case llvm::Triple::mipsel:
3953    switch (os) {
3954    case llvm::Triple::Linux:
3955      return new LinuxTargetInfo<Mips32ELTargetInfo>(T);
3956    case llvm::Triple::RTEMS:
3957      return new RTEMSTargetInfo<Mips32ELTargetInfo>(T);
3958    case llvm::Triple::FreeBSD:
3959      return new FreeBSDTargetInfo<Mips32ELTargetInfo>(T);
3960    case llvm::Triple::NetBSD:
3961      return new NetBSDTargetInfo<Mips32ELTargetInfo>(T);
3962    default:
3963      return new Mips32ELTargetInfo(T);
3964    }
3965
3966  case llvm::Triple::mips64:
3967    switch (os) {
3968    case llvm::Triple::Linux:
3969      return new LinuxTargetInfo<Mips64EBTargetInfo>(T);
3970    case llvm::Triple::RTEMS:
3971      return new RTEMSTargetInfo<Mips64EBTargetInfo>(T);
3972    case llvm::Triple::FreeBSD:
3973      return new FreeBSDTargetInfo<Mips64EBTargetInfo>(T);
3974    case llvm::Triple::NetBSD:
3975      return new NetBSDTargetInfo<Mips64EBTargetInfo>(T);
3976    default:
3977      return new Mips64EBTargetInfo(T);
3978    }
3979
3980  case llvm::Triple::mips64el:
3981    switch (os) {
3982    case llvm::Triple::Linux:
3983      return new LinuxTargetInfo<Mips64ELTargetInfo>(T);
3984    case llvm::Triple::RTEMS:
3985      return new RTEMSTargetInfo<Mips64ELTargetInfo>(T);
3986    case llvm::Triple::FreeBSD:
3987      return new FreeBSDTargetInfo<Mips64ELTargetInfo>(T);
3988    case llvm::Triple::NetBSD:
3989      return new NetBSDTargetInfo<Mips64ELTargetInfo>(T);
3990    default:
3991      return new Mips64ELTargetInfo(T);
3992    }
3993
3994  case llvm::Triple::le32:
3995    switch (os) {
3996      case llvm::Triple::NativeClient:
3997        return new PNaClTargetInfo(T);
3998      default:
3999        return NULL;
4000    }
4001
4002  case llvm::Triple::ppc:
4003    if (Triple.isOSDarwin())
4004      return new DarwinPPC32TargetInfo(T);
4005    switch (os) {
4006    case llvm::Triple::Linux:
4007      return new LinuxTargetInfo<PPC32TargetInfo>(T);
4008    case llvm::Triple::FreeBSD:
4009      return new FreeBSDTargetInfo<PPC32TargetInfo>(T);
4010    case llvm::Triple::NetBSD:
4011      return new NetBSDTargetInfo<PPC32TargetInfo>(T);
4012    case llvm::Triple::RTEMS:
4013      return new RTEMSTargetInfo<PPC32TargetInfo>(T);
4014    default:
4015      return new PPC32TargetInfo(T);
4016    }
4017
4018  case llvm::Triple::ppc64:
4019    if (Triple.isOSDarwin())
4020      return new DarwinPPC64TargetInfo(T);
4021    switch (os) {
4022    case llvm::Triple::Linux:
4023      return new LinuxTargetInfo<PPC64TargetInfo>(T);
4024    case llvm::Triple::Lv2:
4025      return new PS3PPUTargetInfo<PPC64TargetInfo>(T);
4026    case llvm::Triple::FreeBSD:
4027      return new FreeBSDTargetInfo<PPC64TargetInfo>(T);
4028    case llvm::Triple::NetBSD:
4029      return new NetBSDTargetInfo<PPC64TargetInfo>(T);
4030    default:
4031      return new PPC64TargetInfo(T);
4032    }
4033
4034  case llvm::Triple::ptx32:
4035    return new PTX32TargetInfo(T);
4036  case llvm::Triple::ptx64:
4037    return new PTX64TargetInfo(T);
4038
4039  case llvm::Triple::mblaze:
4040    return new MBlazeTargetInfo(T);
4041
4042  case llvm::Triple::sparc:
4043    switch (os) {
4044    case llvm::Triple::Linux:
4045      return new LinuxTargetInfo<SparcV8TargetInfo>(T);
4046    case llvm::Triple::AuroraUX:
4047      return new AuroraUXSparcV8TargetInfo(T);
4048    case llvm::Triple::Solaris:
4049      return new SolarisSparcV8TargetInfo(T);
4050    case llvm::Triple::NetBSD:
4051      return new NetBSDTargetInfo<SparcV8TargetInfo>(T);
4052    case llvm::Triple::RTEMS:
4053      return new RTEMSTargetInfo<SparcV8TargetInfo>(T);
4054    default:
4055      return new SparcV8TargetInfo(T);
4056    }
4057
4058  // FIXME: Need a real SPU target.
4059  case llvm::Triple::cellspu:
4060    return new PS3SPUTargetInfo<PPC64TargetInfo>(T);
4061
4062  case llvm::Triple::tce:
4063    return new TCETargetInfo(T);
4064
4065  case llvm::Triple::x86:
4066    if (Triple.isOSDarwin())
4067      return new DarwinI386TargetInfo(T);
4068
4069    switch (os) {
4070    case llvm::Triple::AuroraUX:
4071      return new AuroraUXTargetInfo<X86_32TargetInfo>(T);
4072    case llvm::Triple::Linux:
4073      return new LinuxTargetInfo<X86_32TargetInfo>(T);
4074    case llvm::Triple::DragonFly:
4075      return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T);
4076    case llvm::Triple::NetBSD:
4077      return new NetBSDI386TargetInfo(T);
4078    case llvm::Triple::OpenBSD:
4079      return new OpenBSDI386TargetInfo(T);
4080    case llvm::Triple::FreeBSD:
4081      return new FreeBSDTargetInfo<X86_32TargetInfo>(T);
4082    case llvm::Triple::Minix:
4083      return new MinixTargetInfo<X86_32TargetInfo>(T);
4084    case llvm::Triple::Solaris:
4085      return new SolarisTargetInfo<X86_32TargetInfo>(T);
4086    case llvm::Triple::Cygwin:
4087      return new CygwinX86_32TargetInfo(T);
4088    case llvm::Triple::MinGW32:
4089      return new MinGWX86_32TargetInfo(T);
4090    case llvm::Triple::Win32:
4091      return new VisualStudioWindowsX86_32TargetInfo(T);
4092    case llvm::Triple::Haiku:
4093      return new HaikuX86_32TargetInfo(T);
4094    case llvm::Triple::RTEMS:
4095      return new RTEMSX86_32TargetInfo(T);
4096    default:
4097      return new X86_32TargetInfo(T);
4098    }
4099
4100  case llvm::Triple::x86_64:
4101    if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO)
4102      return new DarwinX86_64TargetInfo(T);
4103
4104    switch (os) {
4105    case llvm::Triple::AuroraUX:
4106      return new AuroraUXTargetInfo<X86_64TargetInfo>(T);
4107    case llvm::Triple::Linux:
4108      return new LinuxTargetInfo<X86_64TargetInfo>(T);
4109    case llvm::Triple::DragonFly:
4110      return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T);
4111    case llvm::Triple::NetBSD:
4112      return new NetBSDTargetInfo<X86_64TargetInfo>(T);
4113    case llvm::Triple::OpenBSD:
4114      return new OpenBSDX86_64TargetInfo(T);
4115    case llvm::Triple::FreeBSD:
4116      return new FreeBSDTargetInfo<X86_64TargetInfo>(T);
4117    case llvm::Triple::Solaris:
4118      return new SolarisTargetInfo<X86_64TargetInfo>(T);
4119    case llvm::Triple::MinGW32:
4120      return new MinGWX86_64TargetInfo(T);
4121    case llvm::Triple::Win32:   // This is what Triple.h supports now.
4122      return new VisualStudioWindowsX86_64TargetInfo(T);
4123    default:
4124      return new X86_64TargetInfo(T);
4125    }
4126  }
4127}
4128
4129/// CreateTargetInfo - Return the target info object for the specified target
4130/// triple.
4131TargetInfo *TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags,
4132                                         TargetOptions &Opts) {
4133  llvm::Triple Triple(Opts.Triple);
4134
4135  // Construct the target
4136  OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str()));
4137  if (!Target) {
4138    Diags.Report(diag::err_target_unknown_triple) << Triple.str();
4139    return 0;
4140  }
4141
4142  // Set the target CPU if specified.
4143  if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) {
4144    Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU;
4145    return 0;
4146  }
4147
4148  // Set the target ABI if specified.
4149  if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) {
4150    Diags.Report(diag::err_target_unknown_abi) << Opts.ABI;
4151    return 0;
4152  }
4153
4154  // Set the target C++ ABI.
4155  if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) {
4156    Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI;
4157    return 0;
4158  }
4159
4160  // Compute the default target features, we need the target to handle this
4161  // because features may have dependencies on one another.
4162  llvm::StringMap<bool> Features;
4163  Target->getDefaultFeatures(Features);
4164
4165  // Apply the user specified deltas.
4166  // First the enables.
4167  for (std::vector<std::string>::const_iterator it = Opts.Features.begin(),
4168         ie = Opts.Features.end(); it != ie; ++it) {
4169    const char *Name = it->c_str();
4170
4171    if (Name[0] != '+')
4172      continue;
4173
4174    // Apply the feature via the target.
4175    if (!Target->setFeatureEnabled(Features, Name + 1, true)) {
4176      Diags.Report(diag::err_target_invalid_feature) << Name;
4177      return 0;
4178    }
4179  }
4180
4181  // Then the disables.
4182  for (std::vector<std::string>::const_iterator it = Opts.Features.begin(),
4183         ie = Opts.Features.end(); it != ie; ++it) {
4184    const char *Name = it->c_str();
4185
4186    if (Name[0] == '+')
4187      continue;
4188
4189    // Apply the feature via the target.
4190    if (Name[0] != '-' ||
4191        !Target->setFeatureEnabled(Features, Name + 1, false)) {
4192      Diags.Report(diag::err_target_invalid_feature) << Name;
4193      return 0;
4194    }
4195  }
4196
4197  // Add the features to the compile options.
4198  //
4199  // FIXME: If we are completely confident that we have the right set, we only
4200  // need to pass the minuses.
4201  Opts.Features.clear();
4202  for (llvm::StringMap<bool>::const_iterator it = Features.begin(),
4203         ie = Features.end(); it != ie; ++it)
4204    Opts.Features.push_back((it->second ? "+" : "-") + it->first().str());
4205  Target->HandleTargetFeatures(Opts.Features);
4206
4207  return Target.take();
4208}
4209