mmx-shift-with-immediate.c revision 1dfc2124efc2709b04c1da99091357884907ab32 
1// RUN: %clang -mmmx -ccc-host-triple i386-unknown-unknown -emit-llvm -S %s -o - | FileCheck %s
2#include <mmintrin.h>
3
4void shift(__m64 a, __m64 b, int c) {
5  // CHECK: <4 x i16> @llvm.x86.mmx.pslli.w(<4 x i16> %{{.*}}, i32 {{.*}})
6  _mm_slli_pi16(a, c);
7  // CHECK: <2 x i32> @llvm.x86.mmx.pslli.d(<2 x i32> %{{.*}}, i32 {{.*}})
8  _mm_slli_pi32(a, c);
9  // FIXME: <1 x i64> @llvm.x86.mmx.pslli.q(<1 x i64> %{{.*}}, i32 {{.*}})
10  // This is currently lowered into non-intrinsic instructions. This may not be
11  // correct once the MMX reworking is finished.
12  _mm_slli_si64(a, c);
13
14  // CHECK: <4 x i16> @llvm.x86.mmx.psrli.w(<4 x i16> %{{.*}}, i32 {{.*}})
15  _mm_srli_pi16(a, c);
16  // CHECK: <2 x i32> @llvm.x86.mmx.psrli.d(<2 x i32> %{{.*}}, i32 {{.*}})
17  _mm_srli_pi32(a, c);
18  // FIXME: <1 x i64> @llvm.x86.mmx.psrli.q(<1 x i64> %{{.*}}, i32 {{.*}})
19  // See above.
20  _mm_srli_si64(a, c);
21
22  // CHECK: <4 x i16> @llvm.x86.mmx.psrai.w(<4 x i16> %{{.*}}, i32 {{.*}})
23  _mm_srai_pi16(a, c);
24  // CHECK: <2 x i32> @llvm.x86.mmx.psrai.d(<2 x i32> %{{.*}}, i32 {{.*}})
25  _mm_srai_pi32(a, c);
26}
27