1224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/*
2224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
3224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>
4224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Copyright (c) 2008 Red Hat Inc.
5224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
6224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Copyright (c) 2007-2008 Intel Corporation
7224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng *
8224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Permission is hereby granted, free of charge, to any person obtaining a
9224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * copy of this software and associated documentation files (the "Software"),
10224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * to deal in the Software without restriction, including without limitation
11224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * and/or sell copies of the Software, and to permit persons to whom the
13224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Software is furnished to do so, subject to the following conditions:
14224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng *
15224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * The above copyright notice and this permission notice shall be included in
16224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * all copies or substantial portions of the Software.
17224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng *
18224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
21224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * IN THE SOFTWARE.
25224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */
26224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
27224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#ifndef _DRM_MODE_H
28224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define _DRM_MODE_H
29224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
30224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#include <linux/types.h>
31224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
32224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_DISPLAY_INFO_LEN	32
33224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_CONNECTOR_NAME_LEN	32
34224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_DISPLAY_MODE_LEN	32
35224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_PROP_NAME_LEN	32
36224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
37224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_TYPE_BUILTIN	(1<<0)
38224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_TYPE_CLOCK_C	((1<<1) | DRM_MODE_TYPE_BUILTIN)
39224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_TYPE_CRTC_C	((1<<2) | DRM_MODE_TYPE_BUILTIN)
40224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_TYPE_PREFERRED	(1<<3)
41224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_TYPE_DEFAULT	(1<<4)
42224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_TYPE_USERDEF	(1<<5)
43224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_TYPE_DRIVER	(1<<6)
44224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
45224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* Video mode flags */
46224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* bit compatible with the xorg definitions. */
47e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_MODE_FLAG_PHSYNC			(1<<0)
48e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_MODE_FLAG_NHSYNC			(1<<1)
49e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_MODE_FLAG_PVSYNC			(1<<2)
50e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_MODE_FLAG_NVSYNC			(1<<3)
51e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_MODE_FLAG_INTERLACE			(1<<4)
52e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_MODE_FLAG_DBLSCAN			(1<<5)
53e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_MODE_FLAG_CSYNC			(1<<6)
54e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_MODE_FLAG_PCSYNC			(1<<7)
55e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_MODE_FLAG_NCSYNC			(1<<8)
56e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_MODE_FLAG_HSKEW			(1<<9) /* hskew provided */
57e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_MODE_FLAG_BCAST			(1<<10)
58e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_MODE_FLAG_PIXMUX			(1<<11)
59e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_MODE_FLAG_DBLCLK			(1<<12)
60e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_MODE_FLAG_CLKDIV2			(1<<13)
61e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl /*
62e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl  * When adding a new stereo mode don't forget to adjust DRM_MODE_FLAGS_3D_MAX
63e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl  * (define not exposed to user space).
64e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl  */
65e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_MODE_FLAG_3D_MASK			(0x1f<<14)
66e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define  DRM_MODE_FLAG_3D_NONE			(0<<14)
67e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define  DRM_MODE_FLAG_3D_FRAME_PACKING		(1<<14)
68e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define  DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE	(2<<14)
69e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define  DRM_MODE_FLAG_3D_LINE_ALTERNATIVE	(3<<14)
70e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL	(4<<14)
71e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define  DRM_MODE_FLAG_3D_L_DEPTH		(5<<14)
72e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define  DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH	(6<<14)
73e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM	(7<<14)
74e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF	(8<<14)
75e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl
76224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
77224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* DPMS flags */
78224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* bit compatible with the xorg definitions. */
79224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_DPMS_ON	0
80224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_DPMS_STANDBY	1
81224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_DPMS_SUSPEND	2
82224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_DPMS_OFF	3
83224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
84224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* Scaling mode options */
85224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_SCALE_NONE		0 /* Unmodified timing (display or
86224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng					     software can still scale) */
87224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_SCALE_FULLSCREEN	1 /* Full screen, ignore aspect */
88224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_SCALE_CENTER		2 /* Centered, no scaling */
89224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_SCALE_ASPECT		3 /* Full screen, preserve aspect */
90224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
91224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* Dithering mode options */
92224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_DITHERING_OFF	0
93224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_DITHERING_ON	1
94224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_DITHERING_AUTO 2
95224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
96224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* Dirty info options */
97224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_DIRTY_OFF      0
98224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_DIRTY_ON       1
99224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_DIRTY_ANNOTATE 2
100224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
101224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_mode_modeinfo {
102224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 clock;
103224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u16 hdisplay, hsync_start, hsync_end, htotal, hskew;
104224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u16 vdisplay, vsync_start, vsync_end, vtotal, vscan;
105224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
106224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 vrefresh;
107224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
108224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 flags;
109224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 type;
110224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	char name[DRM_DISPLAY_MODE_LEN];
111224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng};
112224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
113224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_mode_card_res {
114224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u64 fb_id_ptr;
115224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u64 crtc_id_ptr;
116224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u64 connector_id_ptr;
117224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u64 encoder_id_ptr;
118224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 count_fbs;
119224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 count_crtcs;
120224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 count_connectors;
121224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 count_encoders;
122224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 min_width, max_width;
123224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 min_height, max_height;
124224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng};
125224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
126224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_mode_crtc {
127224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u64 set_connectors_ptr;
128224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 count_connectors;
129224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
130224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 crtc_id; /**< Id */
131224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 fb_id; /**< Id of framebuffer */
132224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
133224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 x, y; /**< Position on the frameuffer */
134224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
135224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 gamma_size;
136224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 mode_valid;
137224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	struct drm_mode_modeinfo mode;
138224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng};
139224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
140224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_PRESENT_TOP_FIELD	(1<<0)
141224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_PRESENT_BOTTOM_FIELD	(1<<1)
142224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
143224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* Planes blend with or override other bits on the CRTC */
144224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_mode_set_plane {
145224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 plane_id;
146224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 crtc_id;
147224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 fb_id; /* fb object contains surface format type */
148224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 flags; /* see above flags */
149224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
150224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	/* Signed dest location allows it to be partially off screen */
151224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__s32 crtc_x, crtc_y;
152224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 crtc_w, crtc_h;
153224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
154224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	/* Source values are 16.16 fixed point */
155224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 src_x, src_y;
156224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 src_h, src_w;
157224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng};
158224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
159224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_mode_get_plane {
160224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 plane_id;
161224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
162224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 crtc_id;
163224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 fb_id;
164224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
165224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 possible_crtcs;
166224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 gamma_size;
167224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
168224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 count_format_types;
169224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u64 format_type_ptr;
170224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng};
171224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
172224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_mode_get_plane_res {
173224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u64 plane_id_ptr;
174224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 count_planes;
175224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng};
176224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
177224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_ENCODER_NONE	0
178224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_ENCODER_DAC	1
179224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_ENCODER_TMDS	2
180224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_ENCODER_LVDS	3
181224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_ENCODER_TVDAC	4
182224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_ENCODER_VIRTUAL 5
183e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_MODE_ENCODER_DSI	6
184224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
185224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_mode_get_encoder {
186224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 encoder_id;
187224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 encoder_type;
188224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
189224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 crtc_id; /**< Id of crtc */
190224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
191224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 possible_crtcs;
192224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 possible_clones;
193224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng};
194224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
195224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* This is for connectors with multiple signal types. */
196224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
197224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_SUBCONNECTOR_Automatic	0
198224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_SUBCONNECTOR_Unknown	0
199224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_SUBCONNECTOR_DVID	3
200224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_SUBCONNECTOR_DVIA	4
201224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_SUBCONNECTOR_Composite	5
202224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_SUBCONNECTOR_SVIDEO	6
203224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_SUBCONNECTOR_Component	8
204224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_SUBCONNECTOR_SCART	9
205224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
206224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_CONNECTOR_Unknown	0
207224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_CONNECTOR_VGA		1
208224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_CONNECTOR_DVII		2
209224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_CONNECTOR_DVID		3
210224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_CONNECTOR_DVIA		4
211224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_CONNECTOR_Composite	5
212224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_CONNECTOR_SVIDEO	6
213224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_CONNECTOR_LVDS		7
214224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_CONNECTOR_Component	8
215224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_CONNECTOR_9PinDIN	9
216224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_CONNECTOR_DisplayPort	10
217224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_CONNECTOR_HDMIA	11
218224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_CONNECTOR_HDMIB	12
219224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_CONNECTOR_TV		13
220224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_CONNECTOR_eDP		14
221224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_CONNECTOR_VIRTUAL      15
222e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_MODE_CONNECTOR_DSI		16
223224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
224224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_mode_get_connector {
225224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
226224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u64 encoders_ptr;
227224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u64 modes_ptr;
228224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u64 props_ptr;
229224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u64 prop_values_ptr;
230224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
231224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 count_modes;
232224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 count_props;
233224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 count_encoders;
234224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
235224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 encoder_id; /**< Current Encoder */
236224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 connector_id; /**< Id */
237224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 connector_type;
238224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 connector_type_id;
239224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
240224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 connection;
241224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 mm_width, mm_height; /**< HxW in millimeters */
242224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 subpixel;
243e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl
244e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl	__u32 pad;
245224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng};
246224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
247224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_PROP_PENDING	(1<<0)
248224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_PROP_RANGE	(1<<1)
249224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_PROP_IMMUTABLE	(1<<2)
250224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_PROP_ENUM	(1<<3) /* enumerated type with text strings */
251224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_PROP_BLOB	(1<<4)
252224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_PROP_BITMASK	(1<<5) /* bitmask of enumerated types */
253224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
254224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_mode_property_enum {
255224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u64 value;
256224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	char name[DRM_PROP_NAME_LEN];
257224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng};
258224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
259224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_mode_get_property {
260224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u64 values_ptr; /* values and blob lengths */
261224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u64 enum_blob_ptr; /* enum and blob id ptrs */
262224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
263224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 prop_id;
264224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 flags;
265224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	char name[DRM_PROP_NAME_LEN];
266224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
267224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 count_values;
268224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 count_enum_blobs;
269224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng};
270224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
271224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_mode_connector_set_property {
272224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u64 value;
273224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 prop_id;
274224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 connector_id;
275224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng};
276224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
277224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_mode_obj_get_properties {
278224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u64 props_ptr;
279224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u64 prop_values_ptr;
280224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 count_props;
281224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 obj_id;
282224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 obj_type;
283224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng};
284224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
285224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_mode_obj_set_property {
286224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u64 value;
287224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 prop_id;
288224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 obj_id;
289224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 obj_type;
290224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng};
291224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
292224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_mode_get_blob {
293224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 blob_id;
294224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 length;
295224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u64 data;
296224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng};
297224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
298224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_mode_fb_cmd {
299224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 fb_id;
300224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 width, height;
301224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 pitch;
302224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 bpp;
303224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 depth;
304224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	/* driver specific handle */
305224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 handle;
306224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng};
307224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
308224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_FB_INTERLACED	(1<<0) /* for interlaced framebuffers */
309224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
310224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_mode_fb_cmd2 {
311224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 fb_id;
312224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 width, height;
313224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 pixel_format; /* fourcc code from drm_fourcc.h */
314224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 flags; /* see above flags */
315224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
316224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	/*
317224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	 * In case of planar formats, this ioctl allows up to 4
318224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	 * buffer objects with offets and pitches per plane.
319224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	 * The pitch and offset order is dictated by the fourcc,
320224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	 * e.g. NV12 (http://fourcc.org/yuv.php#NV12) is described as:
321224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	 *
322224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	 *   YUV 4:2:0 image with a plane of 8 bit Y samples
323224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	 *   followed by an interleaved U/V plane containing
324224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	 *   8 bit 2x2 subsampled colour difference samples.
325224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	 *
326224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	 * So it would consist of Y as offset[0] and UV as
327224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	 * offeset[1].  Note that offset[0] will generally
328224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	 * be 0.
329224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	 */
330224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 handles[4];
331224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 pitches[4]; /* pitch for each plane */
332224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 offsets[4]; /* offset of each plane */
333224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng};
334224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
335224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
336224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02
337224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_FB_DIRTY_FLAGS         0x03
338224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
339224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_FB_DIRTY_MAX_CLIPS     256
340224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
341224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/*
342224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Mark a region of a framebuffer as dirty.
343224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng *
344224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Some hardware does not automatically update display contents
345224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * as a hardware or software draw to a framebuffer. This ioctl
346224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * allows userspace to tell the kernel and the hardware what
347224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * regions of the framebuffer have changed.
348224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng *
349224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * The kernel or hardware is free to update more then just the
350224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * region specified by the clip rects. The kernel or hardware
351224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * may also delay and/or coalesce several calls to dirty into a
352224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * single update.
353224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng *
354224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Userspace may annotate the updates, the annotates are a
355224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * promise made by the caller that the change is either a copy
356224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * of pixels or a fill of a single color in the region specified.
357224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng *
358224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then
359224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * the number of updated regions are half of num_clips given,
360224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * where the clip rects are paired in src and dst. The width and
361224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * height of each one of the pairs must match.
362224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng *
363224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller
364224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * promises that the region specified of the clip rects is filled
365224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * completely with a single color as given in the color argument.
366224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */
367224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
368224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_mode_fb_dirty_cmd {
369224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 fb_id;
370224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 flags;
371224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 color;
372224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 num_clips;
373224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u64 clips_ptr;
374224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng};
375224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
376224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_mode_mode_cmd {
377224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 connector_id;
378224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	struct drm_mode_modeinfo mode;
379224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng};
380224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
381224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_CURSOR_BO	0x01
382224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_CURSOR_MOVE	0x02
383224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_CURSOR_FLAGS	0x03
384224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
385224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/*
386224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * depending on the value in flags different members are used.
387224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng *
388224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * CURSOR_BO uses
389224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng *    crtc_id
390224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng *    width
391224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng *    height
392224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng *    handle - if 0 turns the cursor off
393224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng *
394224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * CURSOR_MOVE uses
395224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng *    crtc_id
396224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng *    x
397224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng *    y
398224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */
399224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_mode_cursor {
400224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 flags;
401224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 crtc_id;
402224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__s32 x;
403224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__s32 y;
404224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 width;
405224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 height;
406224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	/* driver specific handle */
407224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 handle;
408224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng};
409224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
410e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heylstruct drm_mode_cursor2 {
411e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl	__u32 flags;
412e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl	__u32 crtc_id;
413e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl	__s32 x;
414e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl	__s32 y;
415e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl	__u32 width;
416e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl	__u32 height;
417e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl	/* driver specific handle */
418e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl	__u32 handle;
419e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl	__s32 hot_x;
420e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl	__s32 hot_y;
421e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl};
422e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl
423224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_mode_crtc_lut {
424224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 crtc_id;
425224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 gamma_size;
426224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
427224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	/* pointers to arrays */
428224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u64 red;
429224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u64 green;
430224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u64 blue;
431224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng};
432224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
433224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MODE_PAGE_FLIP_EVENT 0x01
434e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_MODE_PAGE_FLIP_ASYNC 0x02
435e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT|DRM_MODE_PAGE_FLIP_ASYNC)
436224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
437224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/*
438224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Request a page flip on the specified crtc.
439224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng *
440224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * This ioctl will ask KMS to schedule a page flip for the specified
441224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * crtc.  Once any pending rendering targeting the specified fb (as of
442224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * ioctl time) has completed, the crtc will be reprogrammed to display
443224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * that fb after the next vertical refresh.  The ioctl returns
444224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * immediately, but subsequent rendering to the current fb will block
445224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * in the execbuffer ioctl until the page flip happens.  If a page
446224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * flip is already pending as the ioctl is called, EBUSY will be
447224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * returned.
448224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng *
449e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * Flag DRM_MODE_PAGE_FLIP_EVENT requests that drm sends back a vblank
450e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * event (see drm.h: struct drm_event_vblank) when the page flip is
451e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * done.  The user_data field passed in with this ioctl will be
452e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * returned as the user_data field in the vblank event struct.
453e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl *
454e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * Flag DRM_MODE_PAGE_FLIP_ASYNC requests that the flip happen
455e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 'as soon as possible', meaning that it not delay waiting for vblank.
456e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * This may cause tearing on the screen.
457224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng *
458224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * The reserved field must be zero until we figure out something
459224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * clever to use it for.
460224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */
461224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
462224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_mode_crtc_page_flip {
463224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 crtc_id;
464224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 fb_id;
465224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 flags;
466224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 reserved;
467224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u64 user_data;
468224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng};
469224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
470224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* create a dumb scanout buffer */
471224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_mode_create_dumb {
472224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	uint32_t height;
473224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	uint32_t width;
474224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	uint32_t bpp;
475224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	uint32_t flags;
476224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	/* handle, pitch, size will be returned */
477224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	uint32_t handle;
478224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	uint32_t pitch;
479224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	uint64_t size;
480224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng};
481224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
482224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* set up for mmap of a dumb scanout buffer */
483224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_mode_map_dumb {
484224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	/** Handle for the object being mapped. */
485224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 handle;
486224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u32 pad;
487224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	/**
488224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	 * Fake offset to use for subsequent mmap call
489224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	 *
490224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	 * This is a fixed-size type for 32/64 compatibility.
491224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	 */
492224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	__u64 offset;
493224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng};
494224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
495224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_mode_destroy_dumb {
496224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng	uint32_t handle;
497224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng};
498224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng
499224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#endif
500