130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/************************************************************************** 230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA 430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * All Rights Reserved. 530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Permission is hereby granted, free of charge, to any person obtaining a 730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * copy of this software and associated documentation files (the 830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * "Software"), to deal in the Software without restriction, including 930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * without limitation the rights to use, copy, modify, merge, publish, 1030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * distribute, sub license, and/or sell copies of the Software, and to 1130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * permit persons to whom the Software is furnished to do so, subject to 1230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * the following conditions: 1330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 1430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * The above copyright notice and this permission notice (including the 1530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * next paragraph) shall be included in all copies or substantial portions 1630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * of the Software. 1730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 1830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 1930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 2030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 2130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 2230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 2330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 2430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * USE OR OTHER DEALINGS IN THE SOFTWARE. 2530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 2630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng **************************************************************************/ 2730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 2830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#ifndef __VMWGFX_DRM_H__ 2930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define __VMWGFX_DRM_H__ 3030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 31e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#ifndef __KERNEL__ 32e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#include <drm.h> 33e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#endif 34e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl 3530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_MAX_SURFACE_FACES 6 3630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_MAX_MIP_LEVELS 24 3730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 3830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 3930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_GET_PARAM 0 4030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_ALLOC_DMABUF 1 4130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_UNREF_DMABUF 2 4230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_CURSOR_BYPASS 3 4330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/* guarded by DRM_VMW_PARAM_NUM_STREAMS != 0*/ 4430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_CONTROL_STREAM 4 4530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_CLAIM_STREAM 5 4630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_UNREF_STREAM 6 4730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/* guarded by DRM_VMW_PARAM_3D == 1 */ 4830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_CREATE_CONTEXT 7 4930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_UNREF_CONTEXT 8 5030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_CREATE_SURFACE 9 5130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_UNREF_SURFACE 10 5230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_REF_SURFACE 11 5330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_EXECBUF 12 5430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_GET_3D_CAP 13 5530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_FENCE_WAIT 14 5630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_FENCE_SIGNALED 15 5730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_FENCE_UNREF 16 5830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_FENCE_EVENT 17 5930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_PRESENT 18 6030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_PRESENT_READBACK 19 6130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_UPDATE_LAYOUT 20 62e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_VMW_CREATE_SHADER 21 63e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_VMW_UNREF_SHADER 22 64e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_VMW_GB_SURFACE_CREATE 23 65e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_VMW_GB_SURFACE_REF 24 66e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_VMW_SYNCCPU 25 6730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 6830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/*************************************************************************/ 6930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 7030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * DRM_VMW_GET_PARAM - get device information. 7130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 7230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * DRM_VMW_PARAM_FIFO_OFFSET: 7330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Offset to use to map the first page of the FIFO read-only. 7430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * The fifo is mapped using the mmap() system call on the drm device. 7530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 7630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * DRM_VMW_PARAM_OVERLAY_IOCTL: 7730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Does the driver support the overlay ioctl. 7830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 7930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 8030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_PARAM_NUM_STREAMS 0 8130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_PARAM_NUM_FREE_STREAMS 1 8230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_PARAM_3D 2 8330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_PARAM_HW_CAPS 3 8430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_PARAM_FIFO_CAPS 4 8530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_PARAM_MAX_FB_SIZE 5 8630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_PARAM_FIFO_HW_VERSION 6 87e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_VMW_PARAM_MAX_SURF_MEMORY 7 88e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_VMW_PARAM_3D_CAPS_SIZE 8 89e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_VMW_PARAM_MAX_MOB_MEMORY 9 90e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_VMW_PARAM_MAX_MOB_SIZE 10 9130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 9230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 9330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * struct drm_vmw_getparam_arg 9430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 9530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @value: Returned value. //Out 9630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @param: Parameter to query. //In. 9730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 9830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Argument to the DRM_VMW_GET_PARAM Ioctl. 9930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 10030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 10130692c65c4174412c90e79489e98ab85c1a7412fBen Chengstruct drm_vmw_getparam_arg { 10230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint64_t value; 10330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t param; 10430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t pad64; 10530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng}; 10630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 10730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/*************************************************************************/ 10830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 10930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * DRM_VMW_CREATE_CONTEXT - Create a host context. 11030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 11130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Allocates a device unique context id, and queues a create context command 11230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * for the host. Does not wait for host completion. 11330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 11430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 11530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 11630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * struct drm_vmw_context_arg 11730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 11830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @cid: Device unique context ID. 11930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 12030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl. 12130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl. 12230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 12330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 12430692c65c4174412c90e79489e98ab85c1a7412fBen Chengstruct drm_vmw_context_arg { 12530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng int32_t cid; 12630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t pad64; 12730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng}; 12830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 12930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/*************************************************************************/ 13030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 13130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * DRM_VMW_UNREF_CONTEXT - Create a host context. 13230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 13330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Frees a global context id, and queues a destroy host command for the host. 13430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Does not wait for host completion. The context ID can be used directly 13530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * in the command stream and shows up as the same context ID on the host. 13630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 13730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 13830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/*************************************************************************/ 13930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 14030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * DRM_VMW_CREATE_SURFACE - Create a host suface. 14130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 14230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Allocates a device unique surface id, and queues a create surface command 14330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * for the host. Does not wait for host completion. The surface ID can be 14430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * used directly in the command stream and shows up as the same surface 14530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * ID on the host. 14630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 14730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 14830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 14930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * struct drm_wmv_surface_create_req 15030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 15130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @flags: Surface flags as understood by the host. 15230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @format: Surface format as understood by the host. 15330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @mip_levels: Number of mip levels for each face. 15430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * An unused face should have 0 encoded. 15530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @size_addr: Address of a user-space array of sruct drm_vmw_size 15630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * cast to an uint64_t for 32-64 bit compatibility. 15730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * The size of the array should equal the total number of mipmap levels. 15830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @shareable: Boolean whether other clients (as identified by file descriptors) 15930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * may reference this surface. 16030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @scanout: Boolean whether the surface is intended to be used as a 16130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * scanout. 16230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 16330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Input data to the DRM_VMW_CREATE_SURFACE Ioctl. 16430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Output data from the DRM_VMW_REF_SURFACE Ioctl. 16530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 16630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 16730692c65c4174412c90e79489e98ab85c1a7412fBen Chengstruct drm_vmw_surface_create_req { 16830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t flags; 16930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t format; 17030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t mip_levels[DRM_VMW_MAX_SURFACE_FACES]; 17130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint64_t size_addr; 17230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng int32_t shareable; 17330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng int32_t scanout; 17430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng}; 17530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 17630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 17730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * struct drm_wmv_surface_arg 17830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 17930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @sid: Surface id of created surface or surface to destroy or reference. 18030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 18130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Output data from the DRM_VMW_CREATE_SURFACE Ioctl. 18230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Input argument to the DRM_VMW_UNREF_SURFACE Ioctl. 18330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Input argument to the DRM_VMW_REF_SURFACE Ioctl. 18430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 18530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 18630692c65c4174412c90e79489e98ab85c1a7412fBen Chengstruct drm_vmw_surface_arg { 18730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng int32_t sid; 18830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t pad64; 18930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng}; 19030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 19130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 19230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * struct drm_vmw_size ioctl. 19330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 19430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @width - mip level width 19530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @height - mip level height 19630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @depth - mip level depth 19730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 19830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Description of a mip level. 19930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Input data to the DRM_WMW_CREATE_SURFACE Ioctl. 20030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 20130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 20230692c65c4174412c90e79489e98ab85c1a7412fBen Chengstruct drm_vmw_size { 20330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t width; 20430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t height; 20530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t depth; 20630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t pad64; 20730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng}; 20830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 20930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 21030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * union drm_vmw_surface_create_arg 21130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 21230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @rep: Output data as described above. 21330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @req: Input data as described above. 21430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 21530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Argument to the DRM_VMW_CREATE_SURFACE Ioctl. 21630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 21730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 21830692c65c4174412c90e79489e98ab85c1a7412fBen Chengunion drm_vmw_surface_create_arg { 21930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng struct drm_vmw_surface_arg rep; 22030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng struct drm_vmw_surface_create_req req; 22130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng}; 22230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 22330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/*************************************************************************/ 22430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 22530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * DRM_VMW_REF_SURFACE - Reference a host surface. 22630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 22730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Puts a reference on a host surface with a give sid, as previously 22830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * returned by the DRM_VMW_CREATE_SURFACE ioctl. 22930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * A reference will make sure the surface isn't destroyed while we hold 23030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * it and will allow the calling client to use the surface ID in the command 23130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * stream. 23230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 23330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * On successful return, the Ioctl returns the surface information given 23430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * in the DRM_VMW_CREATE_SURFACE ioctl. 23530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 23630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 23730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 23830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * union drm_vmw_surface_reference_arg 23930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 24030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @rep: Output data as described above. 24130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @req: Input data as described above. 24230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 24330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Argument to the DRM_VMW_REF_SURFACE Ioctl. 24430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 24530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 24630692c65c4174412c90e79489e98ab85c1a7412fBen Chengunion drm_vmw_surface_reference_arg { 24730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng struct drm_vmw_surface_create_req rep; 24830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng struct drm_vmw_surface_arg req; 24930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng}; 25030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 25130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/*************************************************************************/ 25230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 25330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * DRM_VMW_UNREF_SURFACE - Unreference a host surface. 25430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 25530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Clear a reference previously put on a host surface. 25630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * When all references are gone, including the one implicitly placed 25730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * on creation, 25830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * a destroy surface command will be queued for the host. 25930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Does not wait for completion. 26030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 26130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 26230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/*************************************************************************/ 26330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 26430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * DRM_VMW_EXECBUF 26530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 26630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Submit a command buffer for execution on the host, and return a 26730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * fence seqno that when signaled, indicates that the command buffer has 26830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * executed. 26930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 27030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 27130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 27230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * struct drm_vmw_execbuf_arg 27330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 27430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @commands: User-space address of a command buffer cast to an uint64_t. 27530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @command-size: Size in bytes of the command buffer. 27630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @throttle-us: Sleep until software is less than @throttle_us 27730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * microseconds ahead of hardware. The driver may round this value 27830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * to the nearest kernel tick. 27930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @fence_rep: User-space address of a struct drm_vmw_fence_rep cast to an 28030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * uint64_t. 28130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @version: Allows expanding the execbuf ioctl parameters without breaking 28230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * backwards compatibility, since user-space will always tell the kernel 28330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * which version it uses. 28430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @flags: Execbuf flags. None currently. 28530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 28630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Argument to the DRM_VMW_EXECBUF Ioctl. 28730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 28830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 28930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_EXECBUF_VERSION 1 29030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 29130692c65c4174412c90e79489e98ab85c1a7412fBen Chengstruct drm_vmw_execbuf_arg { 29230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint64_t commands; 29330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t command_size; 29430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t throttle_us; 29530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint64_t fence_rep; 29630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t version; 29730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t flags; 29830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng}; 29930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 30030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 30130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * struct drm_vmw_fence_rep 30230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 30330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @handle: Fence object handle for fence associated with a command submission. 30430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @mask: Fence flags relevant for this fence object. 30530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @seqno: Fence sequence number in fifo. A fence object with a lower 30630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * seqno will signal the EXEC flag before a fence object with a higher 30730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * seqno. This can be used by user-space to avoid kernel calls to determine 30830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * whether a fence has signaled the EXEC flag. Note that @seqno will 30930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * wrap at 32-bit. 31030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @passed_seqno: The highest seqno number processed by the hardware 31130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * so far. This can be used to mark user-space fence objects as signaled, and 31230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * to determine whether a fence seqno might be stale. 31330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @error: This member should've been set to -EFAULT on submission. 31430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * The following actions should be take on completion: 31530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * error == -EFAULT: Fence communication failed. The host is synchronized. 31630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Use the last fence id read from the FIFO fence register. 31730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * error != 0 && error != -EFAULT: 31830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Fence submission failed. The host is synchronized. Use the fence_seq member. 31930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * error == 0: All is OK, The host may not be synchronized. 32030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Use the fence_seq member. 32130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 32230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Input / Output data to the DRM_VMW_EXECBUF Ioctl. 32330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 32430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 32530692c65c4174412c90e79489e98ab85c1a7412fBen Chengstruct drm_vmw_fence_rep { 32630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t handle; 32730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t mask; 32830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t seqno; 32930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t passed_seqno; 33030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t pad64; 33130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng int32_t error; 33230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng}; 33330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 33430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/*************************************************************************/ 33530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 33630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * DRM_VMW_ALLOC_DMABUF 33730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 33830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Allocate a DMA buffer that is visible also to the host. 33930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * NOTE: The buffer is 34030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * identified by a handle and an offset, which are private to the guest, but 34130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * useable in the command stream. The guest kernel may translate these 34230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * and patch up the command stream accordingly. In the future, the offset may 34330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * be zero at all times, or it may disappear from the interface before it is 34430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * fixed. 34530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 34630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * The DMA buffer may stay user-space mapped in the guest at all times, 34730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * and is thus suitable for sub-allocation. 34830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 34930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * DMA buffers are mapped using the mmap() syscall on the drm device. 35030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 35130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 35230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 35330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * struct drm_vmw_alloc_dmabuf_req 35430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 35530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @size: Required minimum size of the buffer. 35630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 35730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Input data to the DRM_VMW_ALLOC_DMABUF Ioctl. 35830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 35930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 36030692c65c4174412c90e79489e98ab85c1a7412fBen Chengstruct drm_vmw_alloc_dmabuf_req { 36130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t size; 36230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t pad64; 36330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng}; 36430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 36530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 36630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * struct drm_vmw_dmabuf_rep 36730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 36830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @map_handle: Offset to use in the mmap() call used to map the buffer. 36930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @handle: Handle unique to this buffer. Used for unreferencing. 37030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @cur_gmr_id: GMR id to use in the command stream when this buffer is 37130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * referenced. See not above. 37230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @cur_gmr_offset: Offset to use in the command stream when this buffer is 37330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * referenced. See note above. 37430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 37530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Output data from the DRM_VMW_ALLOC_DMABUF Ioctl. 37630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 37730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 37830692c65c4174412c90e79489e98ab85c1a7412fBen Chengstruct drm_vmw_dmabuf_rep { 37930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint64_t map_handle; 38030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t handle; 38130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t cur_gmr_id; 38230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t cur_gmr_offset; 38330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t pad64; 38430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng}; 38530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 38630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 38730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * union drm_vmw_dmabuf_arg 38830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 38930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @req: Input data as described above. 39030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @rep: Output data as described above. 39130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 39230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Argument to the DRM_VMW_ALLOC_DMABUF Ioctl. 39330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 39430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 39530692c65c4174412c90e79489e98ab85c1a7412fBen Chengunion drm_vmw_alloc_dmabuf_arg { 39630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng struct drm_vmw_alloc_dmabuf_req req; 39730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng struct drm_vmw_dmabuf_rep rep; 39830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng}; 39930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 40030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/*************************************************************************/ 40130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 40230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * DRM_VMW_UNREF_DMABUF - Free a DMA buffer. 40330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 40430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 40530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 40630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 40730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * struct drm_vmw_unref_dmabuf_arg 40830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 40930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @handle: Handle indicating what buffer to free. Obtained from the 41030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * DRM_VMW_ALLOC_DMABUF Ioctl. 41130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 41230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Argument to the DRM_VMW_UNREF_DMABUF Ioctl. 41330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 41430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 41530692c65c4174412c90e79489e98ab85c1a7412fBen Chengstruct drm_vmw_unref_dmabuf_arg { 41630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t handle; 41730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t pad64; 41830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng}; 41930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 42030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/*************************************************************************/ 42130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 42230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * DRM_VMW_CONTROL_STREAM - Control overlays, aka streams. 42330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 42430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * This IOCTL controls the overlay units of the svga device. 42530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * The SVGA overlay units does not work like regular hardware units in 42630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * that they do not automaticaly read back the contents of the given dma 42730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * buffer. But instead only read back for each call to this ioctl, and 42830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * at any point between this call being made and a following call that 42930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * either changes the buffer or disables the stream. 43030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 43130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 43230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 43330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * struct drm_vmw_rect 43430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 43530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Defines a rectangle. Used in the overlay ioctl to define 43630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * source and destination rectangle. 43730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 43830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 43930692c65c4174412c90e79489e98ab85c1a7412fBen Chengstruct drm_vmw_rect { 44030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng int32_t x; 44130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng int32_t y; 44230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t w; 44330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t h; 44430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng}; 44530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 44630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 44730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * struct drm_vmw_control_stream_arg 44830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 44930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @stream_id: Stearm to control 45030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @enabled: If false all following arguments are ignored. 45130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @handle: Handle to buffer for getting data from. 45230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @format: Format of the overlay as understood by the host. 45330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @width: Width of the overlay. 45430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @height: Height of the overlay. 45530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @size: Size of the overlay in bytes. 45630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @pitch: Array of pitches, the two last are only used for YUV12 formats. 45730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @offset: Offset from start of dma buffer to overlay. 45830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @src: Source rect, must be within the defined area above. 45930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @dst: Destination rect, x and y may be negative. 46030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 46130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Argument to the DRM_VMW_CONTROL_STREAM Ioctl. 46230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 46330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 46430692c65c4174412c90e79489e98ab85c1a7412fBen Chengstruct drm_vmw_control_stream_arg { 46530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t stream_id; 46630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t enabled; 46730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 46830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t flags; 46930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t color_key; 47030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 47130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t handle; 47230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t offset; 47330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng int32_t format; 47430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t size; 47530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t width; 47630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t height; 47730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t pitch[3]; 47830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 47930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t pad64; 48030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng struct drm_vmw_rect src; 48130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng struct drm_vmw_rect dst; 48230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng}; 48330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 48430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/*************************************************************************/ 48530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 48630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * DRM_VMW_CURSOR_BYPASS - Give extra information about cursor bypass. 48730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 48830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 48930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 49030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_CURSOR_BYPASS_ALL (1 << 0) 49130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_CURSOR_BYPASS_FLAGS (1) 49230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 49330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 49430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * struct drm_vmw_cursor_bypass_arg 49530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 49630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @flags: Flags. 49730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @crtc_id: Crtc id, only used if DMR_CURSOR_BYPASS_ALL isn't passed. 49830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @xpos: X position of cursor. 49930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @ypos: Y position of cursor. 50030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @xhot: X hotspot. 50130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @yhot: Y hotspot. 50230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 50330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Argument to the DRM_VMW_CURSOR_BYPASS Ioctl. 50430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 50530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 50630692c65c4174412c90e79489e98ab85c1a7412fBen Chengstruct drm_vmw_cursor_bypass_arg { 50730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t flags; 50830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t crtc_id; 50930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng int32_t xpos; 51030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng int32_t ypos; 51130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng int32_t xhot; 51230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng int32_t yhot; 51330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng}; 51430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 51530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/*************************************************************************/ 51630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 51730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * DRM_VMW_CLAIM_STREAM - Claim a single stream. 51830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 51930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 52030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 52130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * struct drm_vmw_context_arg 52230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 52330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @stream_id: Device unique context ID. 52430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 52530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl. 52630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl. 52730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 52830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 52930692c65c4174412c90e79489e98ab85c1a7412fBen Chengstruct drm_vmw_stream_arg { 53030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t stream_id; 53130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t pad64; 53230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng}; 53330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 53430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/*************************************************************************/ 53530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 53630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * DRM_VMW_UNREF_STREAM - Unclaim a stream. 53730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 53830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Return a single stream that was claimed by this process. Also makes 53930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * sure that the stream has been stopped. 54030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 54130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 54230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/*************************************************************************/ 54330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 54430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * DRM_VMW_GET_3D_CAP 54530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 54630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Read 3D capabilities from the FIFO 54730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 54830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 54930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 55030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 55130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * struct drm_vmw_get_3d_cap_arg 55230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 55330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @buffer: Pointer to a buffer for capability data, cast to an uint64_t 55430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @size: Max size to copy 55530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 55630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Input argument to the DRM_VMW_GET_3D_CAP_IOCTL 55730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * ioctls. 55830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 55930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 56030692c65c4174412c90e79489e98ab85c1a7412fBen Chengstruct drm_vmw_get_3d_cap_arg { 56130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint64_t buffer; 56230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t max_size; 56330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t pad64; 56430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng}; 56530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 56630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/*************************************************************************/ 56730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 56830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * DRM_VMW_FENCE_WAIT 56930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 57030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Waits for a fence object to signal. The wait is interruptible, so that 57130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * signals may be delivered during the interrupt. The wait may timeout, 57230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * in which case the calls returns -EBUSY. If the wait is restarted, 57330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * that is restarting without resetting @cookie_valid to zero, 57430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * the timeout is computed from the first call. 57530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 57630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * The flags argument to the DRM_VMW_FENCE_WAIT ioctl indicates what to wait 57730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * on: 57830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * DRM_VMW_FENCE_FLAG_EXEC: All commands ahead of the fence in the command 57930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * stream 58030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * have executed. 58130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * DRM_VMW_FENCE_FLAG_QUERY: All query results resulting from query finish 58230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * commands 58330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * in the buffer given to the EXECBUF ioctl returning the fence object handle 58430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * are available to user-space. 58530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 58630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * DRM_VMW_WAIT_OPTION_UNREF: If this wait option is given, and the 58730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * fenc wait ioctl returns 0, the fence object has been unreferenced after 58830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * the wait. 58930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 59030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 59130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_FENCE_FLAG_EXEC (1 << 0) 59230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_FENCE_FLAG_QUERY (1 << 1) 59330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 59430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_WAIT_OPTION_UNREF (1 << 0) 59530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 59630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 59730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * struct drm_vmw_fence_wait_arg 59830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 59930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl. 60030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @cookie_valid: Must be reset to 0 on first call. Left alone on restart. 60130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @kernel_cookie: Set to 0 on first call. Left alone on restart. 60230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @timeout_us: Wait timeout in microseconds. 0 for indefinite timeout. 60330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @lazy: Set to 1 if timing is not critical. Allow more than a kernel tick 60430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * before returning. 60530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @flags: Fence flags to wait on. 60630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @wait_options: Options that control the behaviour of the wait ioctl. 60730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 60830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Input argument to the DRM_VMW_FENCE_WAIT ioctl. 60930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 61030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 61130692c65c4174412c90e79489e98ab85c1a7412fBen Chengstruct drm_vmw_fence_wait_arg { 61230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t handle; 61330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng int32_t cookie_valid; 61430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint64_t kernel_cookie; 61530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint64_t timeout_us; 61630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng int32_t lazy; 61730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng int32_t flags; 61830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng int32_t wait_options; 61930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng int32_t pad64; 62030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng}; 62130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 62230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/*************************************************************************/ 62330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 62430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * DRM_VMW_FENCE_SIGNALED 62530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 62630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Checks if a fence object is signaled.. 62730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 62830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 62930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 63030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * struct drm_vmw_fence_signaled_arg 63130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 63230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl. 63330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @flags: Fence object flags input to DRM_VMW_FENCE_SIGNALED ioctl 63430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @signaled: Out: Flags signaled. 63530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @sequence: Out: Highest sequence passed so far. Can be used to signal the 63630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * EXEC flag of user-space fence objects. 63730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 63830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Input/Output argument to the DRM_VMW_FENCE_SIGNALED and DRM_VMW_FENCE_UNREF 63930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * ioctls. 64030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 64130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 64230692c65c4174412c90e79489e98ab85c1a7412fBen Chengstruct drm_vmw_fence_signaled_arg { 64330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t handle; 64430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t flags; 64530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng int32_t signaled; 64630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t passed_seqno; 64730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t signaled_flags; 64830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t pad64; 64930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng}; 65030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 65130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/*************************************************************************/ 65230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 65330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * DRM_VMW_FENCE_UNREF 65430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 65530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Unreferences a fence object, and causes it to be destroyed if there are no 65630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * other references to it. 65730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 65830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 65930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 66030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 66130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * struct drm_vmw_fence_arg 66230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 66330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl. 66430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 66530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Input/Output argument to the DRM_VMW_FENCE_UNREF ioctl.. 66630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 66730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 66830692c65c4174412c90e79489e98ab85c1a7412fBen Chengstruct drm_vmw_fence_arg { 66930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t handle; 67030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t pad64; 67130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng}; 67230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 67330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 67430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/*************************************************************************/ 67530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 67630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * DRM_VMW_FENCE_EVENT 67730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 67830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Queues an event on a fence to be delivered on the drm character device 67930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * when the fence has signaled the DRM_VMW_FENCE_FLAG_EXEC flag. 68030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Optionally the approximate time when the fence signaled is 68130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * given by the event. 68230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 68330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 68430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/* 68530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * The event type 68630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 68730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_EVENT_FENCE_SIGNALED 0x80000000 68830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 68930692c65c4174412c90e79489e98ab85c1a7412fBen Chengstruct drm_vmw_event_fence { 69030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng struct drm_event base; 69130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint64_t user_data; 69230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t tv_sec; 69330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t tv_usec; 69430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng}; 69530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 69630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/* 69730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Flags that may be given to the command. 69830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 69930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/* Request fence signaled time on the event. */ 70030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define DRM_VMW_FE_FLAG_REQ_TIME (1 << 0) 70130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 70230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 70330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * struct drm_vmw_fence_event_arg 70430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 70530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @fence_rep: Pointer to fence_rep structure cast to uint64_t or 0 if 70630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * the fence is not supposed to be referenced by user-space. 70730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @user_info: Info to be delivered with the event. 70830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @handle: Attach the event to this fence only. 70930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @flags: A set of flags as defined above. 71030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 71130692c65c4174412c90e79489e98ab85c1a7412fBen Chengstruct drm_vmw_fence_event_arg { 71230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint64_t fence_rep; 71330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint64_t user_data; 71430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t handle; 71530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t flags; 71630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng}; 71730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 71830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 71930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/*************************************************************************/ 72030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 72130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * DRM_VMW_PRESENT 72230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 72330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Executes an SVGA present on a given fb for a given surface. The surface 72430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * is placed on the framebuffer. Cliprects are given relative to the given 72530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * point (the point disignated by dest_{x|y}). 72630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 72730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 72830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 72930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 73030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * struct drm_vmw_present_arg 73130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @fb_id: framebuffer id to present / read back from. 73230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @sid: Surface id to present from. 73330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @dest_x: X placement coordinate for surface. 73430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @dest_y: Y placement coordinate for surface. 73530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @clips_ptr: Pointer to an array of clip rects cast to an uint64_t. 73630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @num_clips: Number of cliprects given relative to the framebuffer origin, 73730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * in the same coordinate space as the frame buffer. 73830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @pad64: Unused 64-bit padding. 73930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 74030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Input argument to the DRM_VMW_PRESENT ioctl. 74130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 74230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 74330692c65c4174412c90e79489e98ab85c1a7412fBen Chengstruct drm_vmw_present_arg { 74430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t fb_id; 74530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t sid; 74630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng int32_t dest_x; 74730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng int32_t dest_y; 74830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint64_t clips_ptr; 74930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t num_clips; 75030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t pad64; 75130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng}; 75230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 75330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 75430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/*************************************************************************/ 75530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 75630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * DRM_VMW_PRESENT_READBACK 75730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 75830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Executes an SVGA present readback from a given fb to the dma buffer 75930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * currently bound as the fb. If there is no dma buffer bound to the fb, 76030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * an error will be returned. 76130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 76230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 76330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 76430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 76530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * struct drm_vmw_present_arg 76630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @fb_id: fb_id to present / read back from. 76730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @num_clips: Number of cliprects. 76830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @clips_ptr: Pointer to an array of clip rects cast to an uint64_t. 76930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @fence_rep: Pointer to a struct drm_vmw_fence_rep, cast to an uint64_t. 77030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * If this member is NULL, then the ioctl should not return a fence. 77130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 77230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 77330692c65c4174412c90e79489e98ab85c1a7412fBen Chengstruct drm_vmw_present_readback_arg { 77430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t fb_id; 77530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t num_clips; 77630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint64_t clips_ptr; 77730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint64_t fence_rep; 77830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng}; 77930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 78030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/*************************************************************************/ 78130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 78230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * DRM_VMW_UPDATE_LAYOUT - Update layout 78330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 78430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Updates the preferred modes and connection status for connectors. The 78530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * command consists of one drm_vmw_update_layout_arg pointing to an array 78630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * of num_outputs drm_vmw_rect's. 78730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 78830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 78930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/** 79030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * struct drm_vmw_update_layout_arg 79130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 79230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @num_outputs: number of active connectors 79330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * @rects: pointer to array of drm_vmw_rect cast to an uint64_t 79430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 79530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Input argument to the DRM_VMW_UPDATE_LAYOUT Ioctl. 79630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 79730692c65c4174412c90e79489e98ab85c1a7412fBen Chengstruct drm_vmw_update_layout_arg { 79830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t num_outputs; 79930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint32_t pad64; 80030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng uint64_t rects; 80130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng}; 80230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 803e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl 804e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl/*************************************************************************/ 805e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl/** 806e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * DRM_VMW_CREATE_SHADER - Create shader 807e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 808e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * Creates a shader and optionally binds it to a dma buffer containing 809e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * the shader byte-code. 810e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl */ 811e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl 812e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl/** 813e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * enum drm_vmw_shader_type - Shader types 814e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl */ 815e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heylenum drm_vmw_shader_type { 816e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl drm_vmw_shader_type_vs = 0, 817e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl drm_vmw_shader_type_ps, 818e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl drm_vmw_shader_type_gs 819e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl}; 820e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl 821e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl 822e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl/** 823e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * struct drm_vmw_shader_create_arg 824e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 825e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @shader_type: Shader type of the shader to create. 826e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @size: Size of the byte-code in bytes. 827e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * where the shader byte-code starts 828e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @buffer_handle: Buffer handle identifying the buffer containing the 829e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * shader byte-code 830e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @shader_handle: On successful completion contains a handle that 831e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * can be used to subsequently identify the shader. 832e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @offset: Offset in bytes into the buffer given by @buffer_handle, 833e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 834e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * Input / Output argument to the DRM_VMW_CREATE_SHADER Ioctl. 835e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl */ 836e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heylstruct drm_vmw_shader_create_arg { 837e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl enum drm_vmw_shader_type shader_type; 838e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl uint32_t size; 839e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl uint32_t buffer_handle; 840e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl uint32_t shader_handle; 841e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl uint64_t offset; 842e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl}; 843e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl 844e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl/*************************************************************************/ 845e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl/** 846e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * DRM_VMW_UNREF_SHADER - Unreferences a shader 847e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 848e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * Destroys a user-space reference to a shader, optionally destroying 849e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * it. 850e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl */ 851e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl 852e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl/** 853e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * struct drm_vmw_shader_arg 854e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 855e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @handle: Handle identifying the shader to destroy. 856e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 857e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * Input argument to the DRM_VMW_UNREF_SHADER ioctl. 858e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl */ 859e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heylstruct drm_vmw_shader_arg { 860e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl uint32_t handle; 861e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl uint32_t pad64; 862e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl}; 863e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl 864e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl/*************************************************************************/ 865e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl/** 866e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * DRM_VMW_GB_SURFACE_CREATE - Create a host guest-backed surface. 867e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 868e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * Allocates a surface handle and queues a create surface command 869e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * for the host on the first use of the surface. The surface ID can 870e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * be used as the surface ID in commands referencing the surface. 871e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl */ 872e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl 873e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl/** 874e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * enum drm_vmw_surface_flags 875e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 876e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @drm_vmw_surface_flag_shareable: Whether the surface is shareable 877e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @drm_vmw_surface_flag_scanout: Whether the surface is a scanout 878e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * surface. 879e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @drm_vmw_surface_flag_create_buffer: Create a backup buffer if none is 880e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * given. 881e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl */ 882e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heylenum drm_vmw_surface_flags { 883e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl drm_vmw_surface_flag_shareable = (1 << 0), 884e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl drm_vmw_surface_flag_scanout = (1 << 1), 885e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl drm_vmw_surface_flag_create_buffer = (1 << 2) 886e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl}; 887e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl 888e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl/** 889e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * struct drm_vmw_gb_surface_create_req 890e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 891e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @svga3d_flags: SVGA3d surface flags for the device. 892e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @format: SVGA3d format. 893e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @mip_level: Number of mip levels for all faces. 894e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @drm_surface_flags Flags as described above. 895e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @multisample_count Future use. Set to 0. 896e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @autogen_filter Future use. Set to 0. 897e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @buffer_handle Buffer handle of backup buffer. SVGA3D_INVALID_ID 898e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * if none. 899e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @base_size Size of the base mip level for all faces. 900e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 901e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * Input argument to the DRM_VMW_GB_SURFACE_CREATE Ioctl. 902e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * Part of output argument for the DRM_VMW_GB_SURFACE_REF Ioctl. 903e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl */ 904e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heylstruct drm_vmw_gb_surface_create_req { 905e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl uint32_t svga3d_flags; 906e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl uint32_t format; 907e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl uint32_t mip_levels; 908e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl enum drm_vmw_surface_flags drm_surface_flags; 909e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl uint32_t multisample_count; 910e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl uint32_t autogen_filter; 911e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl uint32_t buffer_handle; 912e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl uint32_t pad64; 913e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl struct drm_vmw_size base_size; 914e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl}; 915e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl 916e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl/** 917e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * struct drm_vmw_gb_surface_create_rep 918e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 919e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @handle: Surface handle. 920e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @backup_size: Size of backup buffers for this surface. 921e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @buffer_handle: Handle of backup buffer. SVGA3D_INVALID_ID if none. 922e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @buffer_size: Actual size of the buffer identified by 923e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @buffer_handle 924e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @buffer_map_handle: Offset into device address space for the buffer 925e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * identified by @buffer_handle. 926e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 927e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * Part of output argument for the DRM_VMW_GB_SURFACE_REF ioctl. 928e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * Output argument for the DRM_VMW_GB_SURFACE_CREATE ioctl. 929e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl */ 930e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heylstruct drm_vmw_gb_surface_create_rep { 931e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl uint32_t handle; 932e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl uint32_t backup_size; 933e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl uint32_t buffer_handle; 934e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl uint32_t buffer_size; 935e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl uint64_t buffer_map_handle; 936e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl}; 937e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl 938e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl/** 939e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * union drm_vmw_gb_surface_create_arg 940e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 941e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @req: Input argument as described above. 942e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @rep: Output argument as described above. 943e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 944e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * Argument to the DRM_VMW_GB_SURFACE_CREATE ioctl. 945e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl */ 946e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heylunion drm_vmw_gb_surface_create_arg { 947e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl struct drm_vmw_gb_surface_create_rep rep; 948e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl struct drm_vmw_gb_surface_create_req req; 949e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl}; 950e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl 951e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl/*************************************************************************/ 952e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl/** 953e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * DRM_VMW_GB_SURFACE_REF - Reference a host surface. 954e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 955e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * Puts a reference on a host surface with a given handle, as previously 956e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * returned by the DRM_VMW_GB_SURFACE_CREATE ioctl. 957e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * A reference will make sure the surface isn't destroyed while we hold 958e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * it and will allow the calling client to use the surface handle in 959e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * the command stream. 960e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 961e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * On successful return, the Ioctl returns the surface information given 962e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * to and returned from the DRM_VMW_GB_SURFACE_CREATE ioctl. 963e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl */ 964e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl 965e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl/** 966e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * struct drm_vmw_gb_surface_reference_arg 967e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 968e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @creq: The data used as input when the surface was created, as described 969e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * above at "struct drm_vmw_gb_surface_create_req" 970e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @crep: Additional data output when the surface was created, as described 971e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * above at "struct drm_vmw_gb_surface_create_rep" 972e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 973e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * Output Argument to the DRM_VMW_GB_SURFACE_REF ioctl. 974e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl */ 975e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heylstruct drm_vmw_gb_surface_ref_rep { 976e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl struct drm_vmw_gb_surface_create_req creq; 977e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl struct drm_vmw_gb_surface_create_rep crep; 978e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl}; 979e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl 980e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl/** 981e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * union drm_vmw_gb_surface_reference_arg 982e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 983e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @req: Input data as described above at "struct drm_vmw_surface_arg" 984e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @rep: Output data as described above at "struct drm_vmw_gb_surface_ref_rep" 985e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 986e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * Argument to the DRM_VMW_GB_SURFACE_REF Ioctl. 987e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl */ 988e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heylunion drm_vmw_gb_surface_reference_arg { 989e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl struct drm_vmw_gb_surface_ref_rep rep; 990e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl struct drm_vmw_surface_arg req; 991e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl}; 992e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl 993e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl 994e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl/*************************************************************************/ 995e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl/** 996e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * DRM_VMW_SYNCCPU - Sync a DMA buffer / MOB for CPU access. 997e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 998e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * Idles any previously submitted GPU operations on the buffer and 999e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * by default blocks command submissions that reference the buffer. 1000e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * If the file descriptor used to grab a blocking CPU sync is closed, the 1001e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * cpu sync is released. 1002e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * The flags argument indicates how the grab / release operation should be 1003e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * performed: 1004e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl */ 1005e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl 1006e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl/** 1007e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * enum drm_vmw_synccpu_flags - Synccpu flags: 1008e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 1009e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @drm_vmw_synccpu_read: Sync for read. If sync is done for read only, it's a 1010e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * hint to the kernel to allow command submissions that references the buffer 1011e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * for read-only. 1012e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @drm_vmw_synccpu_write: Sync for write. Block all command submissions 1013e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * referencing this buffer. 1014e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @drm_vmw_synccpu_dontblock: Dont wait for GPU idle, but rather return 1015e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * -EBUSY should the buffer be busy. 1016e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @drm_vmw_synccpu_allow_cs: Allow command submission that touches the buffer 1017e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * while the buffer is synced for CPU. This is similar to the GEM bo idle 1018e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * behavior. 1019e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl */ 1020e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heylenum drm_vmw_synccpu_flags { 1021e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl drm_vmw_synccpu_read = (1 << 0), 1022e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl drm_vmw_synccpu_write = (1 << 1), 1023e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl drm_vmw_synccpu_dontblock = (1 << 2), 1024e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl drm_vmw_synccpu_allow_cs = (1 << 3) 1025e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl}; 1026e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl 1027e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl/** 1028e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * enum drm_vmw_synccpu_op - Synccpu operations: 1029e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 1030e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @drm_vmw_synccpu_grab: Grab the buffer for CPU operations 1031e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @drm_vmw_synccpu_release: Release a previous grab. 1032e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl */ 1033e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heylenum drm_vmw_synccpu_op { 1034e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl drm_vmw_synccpu_grab, 1035e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl drm_vmw_synccpu_release 1036e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl}; 1037e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl 1038e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl/** 1039e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * struct drm_vmw_synccpu_arg 1040e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 1041e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @op: The synccpu operation as described above. 1042e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @handle: Handle identifying the buffer object. 1043e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * @flags: Flags as described above. 1044e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl */ 1045e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heylstruct drm_vmw_synccpu_arg { 1046e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl enum drm_vmw_synccpu_op op; 1047e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl enum drm_vmw_synccpu_flags flags; 1048e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl uint32_t handle; 1049e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl uint32_t pad64; 1050e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl}; 1051e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl 105230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#endif 1053