130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#ifndef _UAPI_XT_PHYSDEV_H 230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define _UAPI_XT_PHYSDEV_H 330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#include <linux/types.h> 530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define XT_PHYSDEV_OP_IN 0x01 830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define XT_PHYSDEV_OP_OUT 0x02 930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define XT_PHYSDEV_OP_BRIDGED 0x04 1030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define XT_PHYSDEV_OP_ISIN 0x08 1130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define XT_PHYSDEV_OP_ISOUT 0x10 1230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define XT_PHYSDEV_OP_MASK (0x20 - 1) 1330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 1430692c65c4174412c90e79489e98ab85c1a7412fBen Chengstruct xt_physdev_info { 1530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng char physindev[IFNAMSIZ]; 1630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng char in_mask[IFNAMSIZ]; 1730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng char physoutdev[IFNAMSIZ]; 1830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng char out_mask[IFNAMSIZ]; 1930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng __u8 invert; 2030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng __u8 bitmask; 2130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng}; 2230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 2330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#endif /* _UAPI_XT_PHYSDEV_H */ 24