130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/***************************************************************************** 230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * * 330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Copyright (c) David L. Mills 1993 * 430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * * 530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Permission to use, copy, modify, and distribute this software and its * 630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * documentation for any purpose and without fee is hereby granted, provided * 730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * that the above copyright notice appears in all copies and that both the * 830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * copyright notice and this permission notice appear in supporting * 930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * documentation, and that the name University of Delaware not be used in * 1030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * advertising or publicity pertaining to distribution of the software * 1130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * without specific, written prior permission. The University of Delaware * 1230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * makes no representations about the suitability this software for any * 1330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * purpose. It is provided "as is" without express or implied warranty. * 1430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * * 1530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng *****************************************************************************/ 1630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 1730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/* 1830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Modification history timex.h 1930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 2030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 29 Dec 97 Russell King 2130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Moved CLOCK_TICK_RATE, CLOCK_TICK_FACTOR and FINETUNE to asm/timex.h 2230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * for ARM machines 2330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 2430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 9 Jan 97 Adrian Sun 2530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Shifted LATCH define to allow access to alpha machines. 2630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 2730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 26 Sep 94 David L. Mills 2830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Added defines for hybrid phase/frequency-lock loop. 2930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 3030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 19 Mar 94 David L. Mills 3130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Moved defines from kernel routines to header file and added new 3230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * defines for PPS phase-lock loop. 3330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 3430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 20 Feb 94 David L. Mills 3530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Revised status codes and structures for external clock and PPS 3630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * signal discipline. 3730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 3830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 28 Nov 93 David L. Mills 3930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Adjusted parameters to improve stability and increase poll 4030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * interval. 4130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 4230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 17 Sep 93 David L. Mills 4330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Created file $NTP/include/sys/timex.h 4430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 07 Oct 93 Torsten Duwe 4530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Derived linux/timex.h 4630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 1995-08-13 Torsten Duwe 4730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * kernel PLL updated to 1994-12-13 specs (rfc-1589) 4830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 1997-08-30 Ulrich Windl 4930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Added new constant NTP_PHASE_LIMIT 5030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * 2004-08-12 Christoph Lameter 5130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Reworked time interpolation logic 5230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 5330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#ifndef _UAPI_LINUX_TIMEX_H 5430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define _UAPI_LINUX_TIMEX_H 5530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 5630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#include <linux/time.h> 5730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 5830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define NTP_API 4 /* NTP API version */ 5930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 6030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/* 6130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * syscall interface - used (mainly by NTP daemon) 6230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * to discipline kernel clock oscillator 6330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 6430692c65c4174412c90e79489e98ab85c1a7412fBen Chengstruct timex { 6530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng unsigned int modes; /* mode selector */ 66e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl __kernel_long_t offset; /* time offset (usec) */ 67e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl __kernel_long_t freq; /* frequency offset (scaled ppm) */ 68e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl __kernel_long_t maxerror;/* maximum error (usec) */ 69e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl __kernel_long_t esterror;/* estimated error (usec) */ 7030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng int status; /* clock command/status */ 71e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl __kernel_long_t constant;/* pll time constant */ 72e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl __kernel_long_t precision;/* clock precision (usec) (read only) */ 73e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl __kernel_long_t tolerance;/* clock frequency tolerance (ppm) 74e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * (read only) 75e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl */ 7630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng struct timeval time; /* (read only, except for ADJ_SETOFFSET) */ 77e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl __kernel_long_t tick; /* (modified) usecs between clock ticks */ 7830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 79e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl __kernel_long_t ppsfreq;/* pps frequency (scaled ppm) (ro) */ 80e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl __kernel_long_t jitter; /* pps jitter (us) (ro) */ 8130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng int shift; /* interval duration (s) (shift) (ro) */ 82e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl __kernel_long_t stabil; /* pps stability (scaled ppm) (ro) */ 83e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl __kernel_long_t jitcnt; /* jitter limit exceeded (ro) */ 84e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl __kernel_long_t calcnt; /* calibration intervals (ro) */ 85e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl __kernel_long_t errcnt; /* calibration errors (ro) */ 86e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl __kernel_long_t stbcnt; /* stability limit exceeded (ro) */ 8730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 8830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng int tai; /* TAI offset (ro) */ 8930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 9030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng int :32; int :32; int :32; int :32; 9130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng int :32; int :32; int :32; int :32; 9230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng int :32; int :32; int :32; 9330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng}; 9430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 9530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/* 9630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Mode codes (timex.mode) 9730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 9830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define ADJ_OFFSET 0x0001 /* time offset */ 9930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define ADJ_FREQUENCY 0x0002 /* frequency offset */ 10030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define ADJ_MAXERROR 0x0004 /* maximum time error */ 10130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define ADJ_ESTERROR 0x0008 /* estimated time error */ 10230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define ADJ_STATUS 0x0010 /* clock status */ 10330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define ADJ_TIMECONST 0x0020 /* pll time constant */ 10430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define ADJ_TAI 0x0080 /* set TAI offset */ 10530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define ADJ_SETOFFSET 0x0100 /* add 'time' to current time */ 10630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define ADJ_MICRO 0x1000 /* select microsecond resolution */ 10730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define ADJ_NANO 0x2000 /* select nanosecond resolution */ 10830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define ADJ_TICK 0x4000 /* tick value */ 10930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 11030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#ifndef __KERNEL__ 11130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define ADJ_OFFSET_SINGLESHOT 0x8001 /* old-fashioned adjtime */ 11230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define ADJ_OFFSET_SS_READ 0xa001 /* read-only adjtime */ 11330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#endif 11430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 11530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/* NTP userland likes the MOD_ prefix better */ 11630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define MOD_OFFSET ADJ_OFFSET 11730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define MOD_FREQUENCY ADJ_FREQUENCY 11830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define MOD_MAXERROR ADJ_MAXERROR 11930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define MOD_ESTERROR ADJ_ESTERROR 12030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define MOD_STATUS ADJ_STATUS 12130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define MOD_TIMECONST ADJ_TIMECONST 12230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define MOD_TAI ADJ_TAI 12330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define MOD_MICRO ADJ_MICRO 12430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define MOD_NANO ADJ_NANO 12530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 12630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 12730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/* 12830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Status codes (timex.status) 12930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 13030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define STA_PLL 0x0001 /* enable PLL updates (rw) */ 13130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define STA_PPSFREQ 0x0002 /* enable PPS freq discipline (rw) */ 13230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define STA_PPSTIME 0x0004 /* enable PPS time discipline (rw) */ 13330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define STA_FLL 0x0008 /* select frequency-lock mode (rw) */ 13430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 13530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define STA_INS 0x0010 /* insert leap (rw) */ 13630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define STA_DEL 0x0020 /* delete leap (rw) */ 13730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define STA_UNSYNC 0x0040 /* clock unsynchronized (rw) */ 13830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define STA_FREQHOLD 0x0080 /* hold frequency (rw) */ 13930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 14030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define STA_PPSSIGNAL 0x0100 /* PPS signal present (ro) */ 14130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define STA_PPSJITTER 0x0200 /* PPS signal jitter exceeded (ro) */ 14230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define STA_PPSWANDER 0x0400 /* PPS signal wander exceeded (ro) */ 14330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define STA_PPSERROR 0x0800 /* PPS signal calibration error (ro) */ 14430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 14530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define STA_CLOCKERR 0x1000 /* clock hardware fault (ro) */ 14630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define STA_NANO 0x2000 /* resolution (0 = us, 1 = ns) (ro) */ 14730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define STA_MODE 0x4000 /* mode (0 = PLL, 1 = FLL) (ro) */ 14830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define STA_CLK 0x8000 /* clock source (0 = A, 1 = B) (ro) */ 14930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 15030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/* read-only bits */ 15130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define STA_RONLY (STA_PPSSIGNAL | STA_PPSJITTER | STA_PPSWANDER | \ 15230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng STA_PPSERROR | STA_CLOCKERR | STA_NANO | STA_MODE | STA_CLK) 15330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 15430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng/* 15530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng * Clock states (time_state) 15630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng */ 15730692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define TIME_OK 0 /* clock synchronized, no leap second */ 15830692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define TIME_INS 1 /* insert leap second */ 15930692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define TIME_DEL 2 /* delete leap second */ 16030692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define TIME_OOP 3 /* leap second in progress */ 16130692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define TIME_WAIT 4 /* leap second has occurred */ 16230692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define TIME_ERROR 5 /* clock not synchronized */ 16330692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#define TIME_BAD TIME_ERROR /* bw compat */ 16430692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 16530692c65c4174412c90e79489e98ab85c1a7412fBen Cheng 16630692c65c4174412c90e79489e98ab85c1a7412fBen Cheng#endif /* _UAPI_LINUX_TIMEX_H */ 167