hcidefs.h revision e9df6ba5a8fcccf306a80b1670b423be8fe7746a
1/****************************************************************************** 2 * 3 * Copyright (C) 1999-2012 Broadcom Corporation 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at: 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 * 17 ******************************************************************************/ 18 19#ifndef HCIDEFS_H 20#define HCIDEFS_H 21 22#define HCI_PROTO_VERSION 0x01 /* Version for BT spec 1.1 */ 23#define HCI_PROTO_VERSION_1_2 0x02 /* Version for BT spec 1.2 */ 24#define HCI_PROTO_VERSION_2_0 0x03 /* Version for BT spec 2.0 */ 25#define HCI_PROTO_VERSION_2_1 0x04 /* Version for BT spec 2.1 [Lisbon] */ 26#define HCI_PROTO_VERSION_3_0 0x05 /* Version for BT spec 3.0 */ 27#define HCI_PROTO_REVISION 0x000C /* Current implementation version */ 28/* 29** Definitions for HCI groups 30*/ 31#define HCI_GRP_LINK_CONTROL_CMDS (0x01 << 10) /* 0x0400 */ 32#define HCI_GRP_LINK_POLICY_CMDS (0x02 << 10) /* 0x0800 */ 33#define HCI_GRP_HOST_CONT_BASEBAND_CMDS (0x03 << 10) /* 0x0C00 */ 34#define HCI_GRP_INFORMATIONAL_PARAMS (0x04 << 10) /* 0x1000 */ 35#define HCI_GRP_STATUS_PARAMS (0x05 << 10) /* 0x1400 */ 36#define HCI_GRP_TESTING_CMDS (0x06 << 10) /* 0x1800 */ 37 38#define HCI_GRP_VENDOR_SPECIFIC (0x3F << 10) /* 0xFC00 */ 39 40/* Group occupies high 6 bits of the HCI command rest is opcode itself */ 41#define HCI_OGF(p) (UINT8)((0xFC00 & (p)) >> 10) 42#define HCI_OCF(p) ( 0x3FF & (p)) 43 44/* 45** Defentions for Link Control Commands 46*/ 47/* Following opcode is used only in command complete event for flow control */ 48#define HCI_COMMAND_NONE 0x0000 49 50/* Commands of HCI_GRP_LINK_CONTROL_CMDS group */ 51#define HCI_INQUIRY (0x0001 | HCI_GRP_LINK_CONTROL_CMDS) 52#define HCI_INQUIRY_CANCEL (0x0002 | HCI_GRP_LINK_CONTROL_CMDS) 53#define HCI_PERIODIC_INQUIRY_MODE (0x0003 | HCI_GRP_LINK_CONTROL_CMDS) 54#define HCI_EXIT_PERIODIC_INQUIRY_MODE (0x0004 | HCI_GRP_LINK_CONTROL_CMDS) 55#define HCI_CREATE_CONNECTION (0x0005 | HCI_GRP_LINK_CONTROL_CMDS) 56#define HCI_DISCONNECT (0x0006 | HCI_GRP_LINK_CONTROL_CMDS) 57#define HCI_ADD_SCO_CONNECTION (0x0007 | HCI_GRP_LINK_CONTROL_CMDS) 58#define HCI_CREATE_CONNECTION_CANCEL (0x0008 | HCI_GRP_LINK_CONTROL_CMDS) 59#define HCI_ACCEPT_CONNECTION_REQUEST (0x0009 | HCI_GRP_LINK_CONTROL_CMDS) 60#define HCI_REJECT_CONNECTION_REQUEST (0x000A | HCI_GRP_LINK_CONTROL_CMDS) 61#define HCI_LINK_KEY_REQUEST_REPLY (0x000B | HCI_GRP_LINK_CONTROL_CMDS) 62#define HCI_LINK_KEY_REQUEST_NEG_REPLY (0x000C | HCI_GRP_LINK_CONTROL_CMDS) 63#define HCI_PIN_CODE_REQUEST_REPLY (0x000D | HCI_GRP_LINK_CONTROL_CMDS) 64#define HCI_PIN_CODE_REQUEST_NEG_REPLY (0x000E | HCI_GRP_LINK_CONTROL_CMDS) 65#define HCI_CHANGE_CONN_PACKET_TYPE (0x000F | HCI_GRP_LINK_CONTROL_CMDS) 66#define HCI_AUTHENTICATION_REQUESTED (0x0011 | HCI_GRP_LINK_CONTROL_CMDS) 67#define HCI_SET_CONN_ENCRYPTION (0x0013 | HCI_GRP_LINK_CONTROL_CMDS) 68#define HCI_CHANGE_CONN_LINK_KEY (0x0015 | HCI_GRP_LINK_CONTROL_CMDS) 69#define HCI_MASTER_LINK_KEY (0x0017 | HCI_GRP_LINK_CONTROL_CMDS) 70#define HCI_RMT_NAME_REQUEST (0x0019 | HCI_GRP_LINK_CONTROL_CMDS) 71#define HCI_RMT_NAME_REQUEST_CANCEL (0x001A | HCI_GRP_LINK_CONTROL_CMDS) 72#define HCI_READ_RMT_FEATURES (0x001B | HCI_GRP_LINK_CONTROL_CMDS) 73#define HCI_READ_RMT_EXT_FEATURES (0x001C | HCI_GRP_LINK_CONTROL_CMDS) 74#define HCI_READ_RMT_VERSION_INFO (0x001D | HCI_GRP_LINK_CONTROL_CMDS) 75#define HCI_READ_RMT_CLOCK_OFFSET (0x001F | HCI_GRP_LINK_CONTROL_CMDS) 76#define HCI_READ_LMP_HANDLE (0x0020 | HCI_GRP_LINK_CONTROL_CMDS) 77#define HCI_SETUP_ESCO_CONNECTION (0x0028 | HCI_GRP_LINK_CONTROL_CMDS) 78#define HCI_ACCEPT_ESCO_CONNECTION (0x0029 | HCI_GRP_LINK_CONTROL_CMDS) 79#define HCI_REJECT_ESCO_CONNECTION (0x002A | HCI_GRP_LINK_CONTROL_CMDS) 80#define HCI_IO_CAPABILITY_RESPONSE (0x002B | HCI_GRP_LINK_CONTROL_CMDS) 81#define HCI_USER_CONF_REQUEST_REPLY (0x002C | HCI_GRP_LINK_CONTROL_CMDS) 82#define HCI_USER_CONF_VALUE_NEG_REPLY (0x002D | HCI_GRP_LINK_CONTROL_CMDS) 83#define HCI_USER_PASSKEY_REQ_REPLY (0x002E | HCI_GRP_LINK_CONTROL_CMDS) 84#define HCI_USER_PASSKEY_REQ_NEG_REPLY (0x002F | HCI_GRP_LINK_CONTROL_CMDS) 85#define HCI_REM_OOB_DATA_REQ_REPLY (0x0030 | HCI_GRP_LINK_CONTROL_CMDS) 86#define HCI_REM_OOB_DATA_REQ_NEG_REPLY (0x0033 | HCI_GRP_LINK_CONTROL_CMDS) 87#define HCI_IO_CAP_REQ_NEG_REPLY (0x0034 | HCI_GRP_LINK_CONTROL_CMDS) 88 89/* AMP HCI */ 90#define HCI_CREATE_PHYSICAL_LINK (0x0035 | HCI_GRP_LINK_CONTROL_CMDS) 91#define HCI_ACCEPT_PHYSICAL_LINK (0x0036 | HCI_GRP_LINK_CONTROL_CMDS) 92#define HCI_DISCONNECT_PHYSICAL_LINK (0x0037 | HCI_GRP_LINK_CONTROL_CMDS) 93#define HCI_CREATE_LOGICAL_LINK (0x0038 | HCI_GRP_LINK_CONTROL_CMDS) 94#define HCI_ACCEPT_LOGICAL_LINK (0x0039 | HCI_GRP_LINK_CONTROL_CMDS) 95#define HCI_DISCONNECT_LOGICAL_LINK (0x003A | HCI_GRP_LINK_CONTROL_CMDS) 96#define HCI_LOGICAL_LINK_CANCEL (0x003B | HCI_GRP_LINK_CONTROL_CMDS) 97#define HCI_FLOW_SPEC_MODIFY (0x003C | HCI_GRP_LINK_CONTROL_CMDS) 98 99#define HCI_LINK_CTRL_CMDS_FIRST HCI_INQUIRY 100#define HCI_LINK_CTRL_CMDS_LAST HCI_FLOW_SPEC_MODIFY 101 102/* Commands of HCI_GRP_LINK_POLICY_CMDS */ 103#define HCI_HOLD_MODE (0x0001 | HCI_GRP_LINK_POLICY_CMDS) 104#define HCI_SNIFF_MODE (0x0003 | HCI_GRP_LINK_POLICY_CMDS) 105#define HCI_EXIT_SNIFF_MODE (0x0004 | HCI_GRP_LINK_POLICY_CMDS) 106#define HCI_PARK_MODE (0x0005 | HCI_GRP_LINK_POLICY_CMDS) 107#define HCI_EXIT_PARK_MODE (0x0006 | HCI_GRP_LINK_POLICY_CMDS) 108#define HCI_QOS_SETUP (0x0007 | HCI_GRP_LINK_POLICY_CMDS) 109#define HCI_ROLE_DISCOVERY (0x0009 | HCI_GRP_LINK_POLICY_CMDS) 110#define HCI_SWITCH_ROLE (0x000B | HCI_GRP_LINK_POLICY_CMDS) 111#define HCI_READ_POLICY_SETTINGS (0x000C | HCI_GRP_LINK_POLICY_CMDS) 112#define HCI_WRITE_POLICY_SETTINGS (0x000D | HCI_GRP_LINK_POLICY_CMDS) 113#define HCI_READ_DEF_POLICY_SETTINGS (0x000E | HCI_GRP_LINK_POLICY_CMDS) 114#define HCI_WRITE_DEF_POLICY_SETTINGS (0x000F | HCI_GRP_LINK_POLICY_CMDS) 115#define HCI_FLOW_SPECIFICATION (0x0010 | HCI_GRP_LINK_POLICY_CMDS) 116#define HCI_SNIFF_SUB_RATE (0x0011 | HCI_GRP_LINK_POLICY_CMDS) 117 118#define HCI_LINK_POLICY_CMDS_FIRST HCI_HOLD_MODE 119#define HCI_LINK_POLICY_CMDS_LAST HCI_SNIFF_SUB_RATE 120 121 122/* Commands of HCI_GRP_HOST_CONT_BASEBAND_CMDS */ 123#define HCI_SET_EVENT_MASK (0x0001 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 124#define HCI_RESET (0x0003 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 125#define HCI_SET_EVENT_FILTER (0x0005 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 126#define HCI_FLUSH (0x0008 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 127#define HCI_READ_PIN_TYPE (0x0009 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 128#define HCI_WRITE_PIN_TYPE (0x000A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 129#define HCI_CREATE_NEW_UNIT_KEY (0x000B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 130#define HCI_READ_STORED_LINK_KEY (0x000D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 131#define HCI_WRITE_STORED_LINK_KEY (0x0011 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 132#define HCI_DELETE_STORED_LINK_KEY (0x0012 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 133#define HCI_CHANGE_LOCAL_NAME (0x0013 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 134#define HCI_READ_LOCAL_NAME (0x0014 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 135#define HCI_READ_CONN_ACCEPT_TOUT (0x0015 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 136#define HCI_WRITE_CONN_ACCEPT_TOUT (0x0016 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 137#define HCI_READ_PAGE_TOUT (0x0017 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 138#define HCI_WRITE_PAGE_TOUT (0x0018 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 139#define HCI_READ_SCAN_ENABLE (0x0019 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 140#define HCI_WRITE_SCAN_ENABLE (0x001A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 141#define HCI_READ_PAGESCAN_CFG (0x001B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 142#define HCI_WRITE_PAGESCAN_CFG (0x001C | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 143#define HCI_READ_INQUIRYSCAN_CFG (0x001D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 144#define HCI_WRITE_INQUIRYSCAN_CFG (0x001E | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 145#define HCI_READ_AUTHENTICATION_ENABLE (0x001F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 146#define HCI_WRITE_AUTHENTICATION_ENABLE (0x0020 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 147#define HCI_READ_ENCRYPTION_MODE (0x0021 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 148#define HCI_WRITE_ENCRYPTION_MODE (0x0022 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 149#define HCI_READ_CLASS_OF_DEVICE (0x0023 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 150#define HCI_WRITE_CLASS_OF_DEVICE (0x0024 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 151#define HCI_READ_VOICE_SETTINGS (0x0025 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 152#define HCI_WRITE_VOICE_SETTINGS (0x0026 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 153#define HCI_READ_AUTO_FLUSH_TOUT (0x0027 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 154#define HCI_WRITE_AUTO_FLUSH_TOUT (0x0028 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 155#define HCI_READ_NUM_BCAST_REXMITS (0x0029 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 156#define HCI_WRITE_NUM_BCAST_REXMITS (0x002A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 157#define HCI_READ_HOLD_MODE_ACTIVITY (0x002B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 158#define HCI_WRITE_HOLD_MODE_ACTIVITY (0x002C | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 159#define HCI_READ_TRANSMIT_POWER_LEVEL (0x002D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 160#define HCI_READ_SCO_FLOW_CTRL_ENABLE (0x002E | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 161#define HCI_WRITE_SCO_FLOW_CTRL_ENABLE (0x002F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 162#define HCI_SET_HC_TO_HOST_FLOW_CTRL (0x0031 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 163#define HCI_HOST_BUFFER_SIZE (0x0033 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 164#define HCI_HOST_NUM_PACKETS_DONE (0x0035 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 165#define HCI_READ_LINK_SUPER_TOUT (0x0036 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 166#define HCI_WRITE_LINK_SUPER_TOUT (0x0037 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 167#define HCI_READ_NUM_SUPPORTED_IAC (0x0038 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 168#define HCI_READ_CURRENT_IAC_LAP (0x0039 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 169#define HCI_WRITE_CURRENT_IAC_LAP (0x003A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 170#define HCI_READ_PAGESCAN_PERIOD_MODE (0x003B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 171#define HCI_WRITE_PAGESCAN_PERIOD_MODE (0x003C | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 172#define HCI_READ_PAGESCAN_MODE (0x003D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 173#define HCI_WRITE_PAGESCAN_MODE (0x003E | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 174#define HCI_SET_AFH_CHANNELS (0x003F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 175 176#define HCI_READ_INQSCAN_TYPE (0x0042 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 177#define HCI_WRITE_INQSCAN_TYPE (0x0043 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 178#define HCI_READ_INQUIRY_MODE (0x0044 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 179#define HCI_WRITE_INQUIRY_MODE (0x0045 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 180#define HCI_READ_PAGESCAN_TYPE (0x0046 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 181#define HCI_WRITE_PAGESCAN_TYPE (0x0047 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 182#define HCI_READ_AFH_ASSESSMENT_MODE (0x0048 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 183#define HCI_WRITE_AFH_ASSESSMENT_MODE (0x0049 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 184#define HCI_READ_EXT_INQ_RESPONSE (0x0051 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 185#define HCI_WRITE_EXT_INQ_RESPONSE (0x0052 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 186#define HCI_REFRESH_ENCRYPTION_KEY (0x0053 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 187#define HCI_READ_SIMPLE_PAIRING_MODE (0x0055 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 188#define HCI_WRITE_SIMPLE_PAIRING_MODE (0x0056 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 189#define HCI_READ_LOCAL_OOB_DATA (0x0057 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 190#define HCI_READ_INQ_TX_POWER_LEVEL (0x0058 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 191#define HCI_WRITE_INQ_TX_POWER_LEVEL (0x0059 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 192#define HCI_READ_ERRONEOUS_DATA_RPT (0x005A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 193#define HCI_WRITE_ERRONEOUS_DATA_RPT (0x005B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 194#define HCI_ENHANCED_FLUSH (0x005F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 195#define HCI_SEND_KEYPRESS_NOTIF (0x0060 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 196 197 198/* AMP HCI */ 199#define HCI_READ_LOGICAL_LINK_ACCEPT_TIMEOUT (0x0061 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 200#define HCI_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT (0x0062 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 201#define HCI_SET_EVENT_MASK_PAGE_2 (0x0063 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 202#define HCI_READ_LOCATION_DATA (0x0064 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 203#define HCI_WRITE_LOCATION_DATA (0x0065 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 204#define HCI_READ_FLOW_CONTROL_MODE (0x0066 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 205#define HCI_WRITE_FLOW_CONTROL_MODE (0x0067 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 206#define HCI_READ_BE_FLUSH_TOUT (0x0069 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 207#define HCI_WRITE_BE_FLUSH_TOUT (0x006A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 208#define HCI_SHORT_RANGE_MODE (0x006B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) /* 802.11 only */ 209 210#define HCI_CONT_BASEBAND_CMDS_FIRST HCI_SET_EVENT_MASK 211#define HCI_CONT_BASEBAND_CMDS_LAST HCI_SHORT_RANGE_MODE 212 213 214/* Commands of HCI_GRP_INFORMATIONAL_PARAMS group */ 215#define HCI_READ_LOCAL_VERSION_INFO (0x0001 | HCI_GRP_INFORMATIONAL_PARAMS) 216#define HCI_READ_LOCAL_SUPPORTED_CMDS (0x0002 | HCI_GRP_INFORMATIONAL_PARAMS) 217#define HCI_READ_LOCAL_FEATURES (0x0003 | HCI_GRP_INFORMATIONAL_PARAMS) 218#define HCI_READ_LOCAL_EXT_FEATURES (0x0004 | HCI_GRP_INFORMATIONAL_PARAMS) 219#define HCI_READ_BUFFER_SIZE (0x0005 | HCI_GRP_INFORMATIONAL_PARAMS) 220#define HCI_READ_COUNTRY_CODE (0x0007 | HCI_GRP_INFORMATIONAL_PARAMS) 221#define HCI_READ_BD_ADDR (0x0009 | HCI_GRP_INFORMATIONAL_PARAMS) 222#define HCI_READ_DATA_BLOCK_SIZE (0x000A | HCI_GRP_INFORMATIONAL_PARAMS) 223 224#define HCI_INFORMATIONAL_CMDS_FIRST HCI_READ_LOCAL_VERSION_INFO 225#define HCI_INFORMATIONAL_CMDS_LAST HCI_READ_BD_ADDR 226 227 228/* Commands of HCI_GRP_STATUS_PARAMS group */ 229#define HCI_READ_FAILED_CONTACT_COUNT (0x0001 | HCI_GRP_STATUS_PARAMS) 230#define HCI_RESET_FAILED_CONTACT_COUNT (0x0002 | HCI_GRP_STATUS_PARAMS) 231#define HCI_GET_LINK_QUALITY (0x0003 | HCI_GRP_STATUS_PARAMS) 232#define HCI_READ_RSSI (0x0005 | HCI_GRP_STATUS_PARAMS) 233#define HCI_READ_AFH_CH_MAP (0x0006 | HCI_GRP_STATUS_PARAMS) 234#define HCI_READ_CLOCK (0x0007 | HCI_GRP_STATUS_PARAMS) 235#define HCI_READ_ENCR_KEY_SIZE (0x0008 | HCI_GRP_STATUS_PARAMS) 236 237/* AMP HCI */ 238#define HCI_READ_LOCAL_AMP_INFO (0x0009 | HCI_GRP_STATUS_PARAMS) 239#define HCI_READ_LOCAL_AMP_ASSOC (0x000A | HCI_GRP_STATUS_PARAMS) 240#define HCI_WRITE_REMOTE_AMP_ASSOC (0x000B | HCI_GRP_STATUS_PARAMS) 241 242#define HCI_STATUS_PARAMS_CMDS_FIRST HCI_READ_FAILED_CONTACT_COUNT 243#define HCI_STATUS_PARAMS_CMDS_LAST HCI_WRITE_REMOTE_AMP_ASSOC 244 245/* Commands of HCI_GRP_TESTING_CMDS group */ 246#define HCI_READ_LOOPBACK_MODE (0x0001 | HCI_GRP_TESTING_CMDS) 247#define HCI_WRITE_LOOPBACK_MODE (0x0002 | HCI_GRP_TESTING_CMDS) 248#define HCI_ENABLE_DEV_UNDER_TEST_MODE (0x0003 | HCI_GRP_TESTING_CMDS) 249#define HCI_WRITE_SIMP_PAIR_DEBUG_MODE (0x0004 | HCI_GRP_TESTING_CMDS) 250 251/* AMP HCI */ 252#define HCI_ENABLE_AMP_RCVR_REPORTS (0x0007 | HCI_GRP_TESTING_CMDS) 253#define HCI_AMP_TEST_END (0x0008 | HCI_GRP_TESTING_CMDS) 254#define HCI_AMP_TEST (0x0009 | HCI_GRP_TESTING_CMDS) 255 256#define HCI_TESTING_CMDS_FIRST HCI_READ_LOOPBACK_MODE 257#define HCI_TESTING_CMDS_LAST HCI_AMP_TEST 258 259#define HCI_VENDOR_CMDS_FIRST 0x0001 260#define HCI_VENDOR_CMDS_LAST 0xFFFF 261#define HCI_VSC_MULTI_AV_HANDLE 0x0AAA 262#define HCI_VSC_BURST_MODE_HANDLE 0x0BBB 263 264/* BLE HCI */ 265#define HCI_GRP_BLE_CMDS (0x08 << 10) 266/* Commands of BLE Controller setup and configuration */ 267#define HCI_BLE_SET_EVENT_MASK (0x0001 | HCI_GRP_BLE_CMDS) 268#define HCI_BLE_READ_BUFFER_SIZE (0x0002 | HCI_GRP_BLE_CMDS) 269#define HCI_BLE_READ_LOCAL_SPT_FEAT (0x0003 | HCI_GRP_BLE_CMDS) 270#define HCI_BLE_WRITE_LOCAL_SPT_FEAT (0x0004 | HCI_GRP_BLE_CMDS) 271#define HCI_BLE_WRITE_RANDOM_ADDR (0x0005 | HCI_GRP_BLE_CMDS) 272#define HCI_BLE_WRITE_ADV_PARAMS (0x0006 | HCI_GRP_BLE_CMDS) 273#define HCI_BLE_READ_ADV_CHNL_TX_POWER (0x0007 | HCI_GRP_BLE_CMDS) 274#define HCI_BLE_WRITE_ADV_DATA (0x0008 | HCI_GRP_BLE_CMDS) 275#define HCI_BLE_WRITE_SCAN_RSP_DATA (0x0009 | HCI_GRP_BLE_CMDS) 276#define HCI_BLE_WRITE_ADV_ENABLE (0x000A | HCI_GRP_BLE_CMDS) 277#define HCI_BLE_WRITE_SCAN_PARAMS (0x000B | HCI_GRP_BLE_CMDS) 278#define HCI_BLE_WRITE_SCAN_ENABLE (0x000C | HCI_GRP_BLE_CMDS) 279#define HCI_BLE_CREATE_LL_CONN (0x000D | HCI_GRP_BLE_CMDS) 280#define HCI_BLE_CREATE_CONN_CANCEL (0x000E | HCI_GRP_BLE_CMDS) 281#define HCI_BLE_READ_WHITE_LIST_SIZE (0x000F | HCI_GRP_BLE_CMDS) 282#define HCI_BLE_CLEAR_WHITE_LIST (0x0010 | HCI_GRP_BLE_CMDS) 283#define HCI_BLE_ADD_WHITE_LIST (0x0011 | HCI_GRP_BLE_CMDS) 284#define HCI_BLE_REMOVE_WHITE_LIST (0x0012 | HCI_GRP_BLE_CMDS) 285#define HCI_BLE_UPD_LL_CONN_PARAMS (0x0013 | HCI_GRP_BLE_CMDS) 286#define HCI_BLE_SET_HOST_CHNL_CLASS (0x0014 | HCI_GRP_BLE_CMDS) 287#define HCI_BLE_READ_CHNL_MAP (0x0015 | HCI_GRP_BLE_CMDS) 288#define HCI_BLE_READ_REMOTE_FEAT (0x0016 | HCI_GRP_BLE_CMDS) 289#define HCI_BLE_ENCRYPT (0x0017 | HCI_GRP_BLE_CMDS) 290#define HCI_BLE_RAND (0x0018 | HCI_GRP_BLE_CMDS) 291#define HCI_BLE_START_ENC (0x0019 | HCI_GRP_BLE_CMDS) 292#define HCI_BLE_LTK_REQ_REPLY (0x001A | HCI_GRP_BLE_CMDS) 293#define HCI_BLE_LTK_REQ_NEG_REPLY (0x001B | HCI_GRP_BLE_CMDS) 294#define HCI_BLE_READ_SUPPORTED_STATES (0x001C | HCI_GRP_BLE_CMDS) 295 296#define HCI_BLE_RESET (0x0020 | HCI_GRP_BLE_CMDS) 297 298/* LE supported states definition */ 299#define HCI_LE_ADV_STATE 0x00000001 300#define HCI_LE_SCAN_STATE 0x00000002 301#define HCI_LE_INIT_STATE 0x00000004 302#define HCI_LE_CONN_SL_STATE 0x00000008 303#define HCI_LE_ADV_SCAN_STATE 0x00000010 304#define HCI_LE_ADV_INIT_STATE 0x00000020 305#define HCI_LE_ADV_MA_STATE 0x00000040 306#define HCI_LE_ADV_SL_STATE 0x00000080 307#define HCI_LE_SCAN_INIT_STATE 0x00000100 308#define HCI_LE_SCAN_MA_STATE 0x00000200 309#define HCI_LE_SCAN_SL_STATE 0x00000400 310#define HCI_LE_INIT_MA_STATE 0x00000800 311 312/* Vendor specific commands for BRCM chipset */ 313#define HCI_BRCM_UPDATE_BAUD_RATE_ENCODED_LENGTH 0x02 314#define HCI_BRCM_UPDATE_BAUD_RATE_UNENCODED_LENGTH 0x06 315#define HCI_BRCM_WRITE_SLEEP_MODE_LENGTH 12 316#define HCI_BRCM_ENABLE_H4IBSS_LENGTH 7 317#define HCI_BRCM_CUSTOMER_EXT (0x0000 | HCI_GRP_VENDOR_SPECIFIC) 318#define HCI_BRCM_FM_OPCODE (0x0015 | HCI_GRP_VENDOR_SPECIFIC) 319#define HCI_BRCM_FMTX_OPCODE (0x0082 | HCI_GRP_VENDOR_SPECIFIC) /* FMTX VSC opcode */ 320#define HCI_BRCM_UPDATE_BAUDRATE_CMD (0x0018 | HCI_GRP_VENDOR_SPECIFIC) /* set baudrate of BCM2035 */ 321#define HCI_BRCM_WRITE_SCO_PCM_INT_PARAM (0x001C | HCI_GRP_VENDOR_SPECIFIC) /* set SCO interface param */ 322#define HCI_BRCM_READ_SCO_PCM_INT_PARAM (0x001D | HCI_GRP_VENDOR_SPECIFIC) /* read SCO interface param */ 323#define HCI_BRCM_WRITE_SLEEP_MODE (0x0027 | HCI_GRP_VENDOR_SPECIFIC) 324#define HCI_BRCM_READ_SLEEP_MODE (0x0028 | HCI_GRP_VENDOR_SPECIFIC) 325#define HCI_BRCM_H4IBSS_CMD (0x0029 | HCI_GRP_VENDOR_SPECIFIC) 326#define HCI_BRCM_DOWNLOAD_MINI_DRV (0x002E | HCI_GRP_VENDOR_SPECIFIC) 327#define HCI_BRCM_READ_USER_DEFINED_NVRAM (0x0033 | HCI_GRP_VENDOR_SPECIFIC) 328#define HCI_BRCM_ENABLE_RADIO (0x0034 | HCI_GRP_VENDOR_SPECIFIC) 329#define HCI_BRCM_READ_DIAGNOSTIC_VALUE (0x0035 | HCI_GRP_VENDOR_SPECIFIC) 330#define HCI_BRCM_GET_HID_DEVICE_LIST (0x0036 | HCI_GRP_VENDOR_SPECIFIC) 331#define HCI_BRCM_ADD_HID_DEVICE (0x0037 | HCI_GRP_VENDOR_SPECIFIC) 332#define HCI_BRCM_WRITE_HID_DEVICE_NVRAM (0x0038 | HCI_GRP_VENDOR_SPECIFIC) 333#define HCI_BRCM_DELETE_HID_DEVICE (0x0039 | HCI_GRP_VENDOR_SPECIFIC) 334#define HCI_BRCM_ENABLE_USB_HID_EMULATION (0x003B | HCI_GRP_VENDOR_SPECIFIC) 335#define HCI_BRCM_WRITE_RAM (0x004C | HCI_GRP_VENDOR_SPECIFIC) 336#define HCI_BRCM_LAUNCH_RAM (0x004E | HCI_GRP_VENDOR_SPECIFIC) 337#define HCI_BRCM_BTW_STARTUP (0x0053 | HCI_GRP_VENDOR_SPECIFIC) 338#define HCI_BRCM_SET_ACL_PRIORITY (0x0057 | HCI_GRP_VENDOR_SPECIFIC) 339#define HCI_BRCM_SET_SEC_MODE (0x0096 | HCI_GRP_VENDOR_SPECIFIC) 340#define HCI_BRCM_ENABLE_H4IBSS (0x00D4 | HCI_GRP_VENDOR_SPECIFIC) 341 342#define HCI_BRCM_SUPER_PEEK_POKE (0x000A | HCI_GRP_VENDOR_SPECIFIC) 343#define HCI_ARM_MEM_PEEK 0x04 344#define HCI_ARM_MEM_POKE 0x05 345#define HCI_BRCM_SUPER_PEEK_POKE_LENGTH 9 346 347#define HCI_BRCM_WRITE_I2SPCM_INTF_PARAM (0x006D | HCI_GRP_VENDOR_SPECIFIC) 348#define HCI_BRCM_READ_CONTROLLER_FEATURES (0x006E | HCI_GRP_VENDOR_SPECIFIC) 349#define HCI_BRCM_FEATURE_NFC_MASK 0x10 350#define HCI_BRCM_FEATURE_NFC_OFF 0 351 352#define HCI_BRCM_READ_VERBOSE_CFG_VER_INFO (0x0079 | HCI_GRP_VENDOR_SPECIFIC) 353 354/* Dual Stack */ 355#define HCI_BRCM_PAUSE_TRANSPORT (0x007A | HCI_GRP_VENDOR_SPECIFIC) 356#define HCI_BRCM_TRANSPORT_RESUME (0x007B | HCI_GRP_VENDOR_SPECIFIC) 357#define HCI_BRCM_TRANSPORT_ERROR_EVT 0x0C 358 359#define HCI_BRCM_TX_POWER_OPCODE (0x007D | HCI_GRP_VENDOR_SPECIFIC) 360#define HCI_BRCM_ENABLE_WBS (0x007E | HCI_GRP_VENDOR_SPECIFIC) 361#define HCI_BRCM_UIPC_OVER_HCI (0x008B | HCI_GRP_VENDOR_SPECIFIC) 362#define HCI_BRCM_READ_AUDIO_ROUTE_INFO (0x00A2 | HCI_GRP_VENDOR_SPECIFIC) 363#define HCI_BRCM_UIPC_OVER_HCI_EVT 0x1A 364#define HCI_BRCM_ENCAPSULATED_HCI (0x00A3 | HCI_GRP_VENDOR_SPECIFIC) 365/* VSE subcode - VSE format FF [len] [subcode] [vse params...] */ 366#define HCI_BRCM_ENCAPSULATED_HCI_EVT 0x1E 367 368/* PCM2 Setup */ 369#define HCI_BRCM_PCM2_SETUP (0x00AE | HCI_GRP_VENDOR_SPECIFIC) 370 371/* BRR */ 372#define HCI_BRCM_SET_BRR (0x00AA | HCI_GRP_VENDOR_SPECIFIC) 373 374/* 3DTV */ 375#define HCI_BRCM_3D_CTRL (0x00B7 | HCI_GRP_VENDOR_SPECIFIC) 376#define HCI_BRCM_3D_OFFSET_DELAY (0x00D6 | HCI_GRP_VENDOR_SPECIFIC) 377 378/* GPS */ 379#define HCI_BRCM_GPS_DATA (0x0089 | HCI_GRP_VENDOR_SPECIFIC) 380#define HCI_BRCM_GPS_SENSOR_OPCODE (0x008F | HCI_GRP_VENDOR_SPECIFIC) /* GPS sensor VSC opcode */ 381 382/* MIP: Multicast Individual Polling */ 383#define HCI_BRCM_INIT_MIP (0x00DC | HCI_GRP_VENDOR_SPECIFIC) 384#define HCI_BRCM_MIP_OPEN_CMD (0x00DD | HCI_GRP_VENDOR_SPECIFIC) 385#define HCI_BRCM_MIP_CLOSE_CMD (0x00DE | HCI_GRP_VENDOR_SPECIFIC) 386#define HCI_BRCM_MIP_ENC_KEY_CMD (0x00DF | HCI_GRP_VENDOR_SPECIFIC) 387 388/* MIP-related definitions */ 389#define BRCM_MIP_ROLE_MASTER 0x00 390#define BRCM_MIP_ROLE_SLAVE 0x01 391 392#define BRCM_MIP_MODE_A2DP 0x00 393#define BRCM_MIP_MODE_3DG 0x01 394#define BRCM_MIP_MODE_CMBO 0x02 /* A2DP + 3DG */ 395 396/* Parameter information for HCI_BRCM_SET_ACL_PRIORITY */ 397#define HCI_BRCM_ACL_PRIORITY_PARAM_SIZE 3 398#define HCI_BRCM_ACL_PRIORITY_LOW 0x00 399#define HCI_BRCM_ACL_PRIORITY_HIGH 0xFF 400 401#define HCI_BRCM_PAUSE_TRANSPORT_LENGTH 6 402 403/* Parameter information for HCI_BRCM_SCO_PCM_INT_PARAM */ 404#define HCI_BRCM_SCO_PCM_PARAM_SIZE 5 405#define HCI_BRCM_SCO_ROUTE_PCM 0 406#define HCI_BRCM_SCO_ROUTE_HCI 1 407 408/* Parameter information for HCI_BRCM_WRITE_I2SPCM_INTF_PARAM */ 409#define HCI_BRCM_I2SPCM_PARAM_SIZE 4 410#define HCI_BRCM_I2SPCM_I2S_DISABLE 0 411#define HCI_BRCM_I2SPCM_I2S_ENABLE 1 412#define HCI_BRCM_I2SPCM_IS_SLAVE 0 413#define HCI_BRCM_I2SPCM_IS_MASTER 1 414#define HCI_BRCM_I2SPCM_IS_DEFAULT_ROLE 2 415#define HCI_BRCM_I2SPCM_SAMPLE_8K 0 416#define HCI_BRCM_I2SPCM_SAMPLE_16K 1 417#define HCI_BRCM_I2SPCM_SAMPLE_4K 2 418#define HCI_BRCM_I2SPCM_SAMPLE_DEFAULT 3 419#define HCI_BRCM_I2SPCM_CLOCK_128K 0 420#define HCI_BRCM_I2SPCM_CLOCK_256K 1 421#define HCI_BRCM_I2SPCM_CLOCK_512K 2 422#define HCI_BRCM_I2SPCM_CLOCK_1024K 3 423#define HCI_BRCM_I2SPCM_CLOCK_2048K 4 424#define HCI_BRCM_I2SPCM_CLOCK_DEFAULT 5 425 426/* 427** Definitions for HCI Events 428*/ 429#define HCI_INQUIRY_COMP_EVT 0x01 430#define HCI_INQUIRY_RESULT_EVT 0x02 431#define HCI_CONNECTION_COMP_EVT 0x03 432#define HCI_CONNECTION_REQUEST_EVT 0x04 433#define HCI_DISCONNECTION_COMP_EVT 0x05 434#define HCI_AUTHENTICATION_COMP_EVT 0x06 435#define HCI_RMT_NAME_REQUEST_COMP_EVT 0x07 436#define HCI_ENCRYPTION_CHANGE_EVT 0x08 437#define HCI_CHANGE_CONN_LINK_KEY_EVT 0x09 438#define HCI_MASTER_LINK_KEY_COMP_EVT 0x0A 439#define HCI_READ_RMT_FEATURES_COMP_EVT 0x0B 440#define HCI_READ_RMT_VERSION_COMP_EVT 0x0C 441#define HCI_QOS_SETUP_COMP_EVT 0x0D 442#define HCI_COMMAND_COMPLETE_EVT 0x0E 443#define HCI_COMMAND_STATUS_EVT 0x0F 444#define HCI_HARDWARE_ERROR_EVT 0x10 445#define HCI_FLUSH_OCCURED_EVT 0x11 446#define HCI_ROLE_CHANGE_EVT 0x12 447#define HCI_NUM_COMPL_DATA_PKTS_EVT 0x13 448#define HCI_MODE_CHANGE_EVT 0x14 449#define HCI_RETURN_LINK_KEYS_EVT 0x15 450#define HCI_PIN_CODE_REQUEST_EVT 0x16 451#define HCI_LINK_KEY_REQUEST_EVT 0x17 452#define HCI_LINK_KEY_NOTIFICATION_EVT 0x18 453#define HCI_LOOPBACK_COMMAND_EVT 0x19 454#define HCI_DATA_BUF_OVERFLOW_EVT 0x1A 455#define HCI_MAX_SLOTS_CHANGED_EVT 0x1B 456#define HCI_READ_CLOCK_OFF_COMP_EVT 0x1C 457#define HCI_CONN_PKT_TYPE_CHANGE_EVT 0x1D 458#define HCI_QOS_VIOLATION_EVT 0x1E 459#define HCI_PAGE_SCAN_MODE_CHANGE_EVT 0x1F 460#define HCI_PAGE_SCAN_REP_MODE_CHNG_EVT 0x20 461#define HCI_FLOW_SPECIFICATION_COMP_EVT 0x21 462#define HCI_INQUIRY_RSSI_RESULT_EVT 0x22 463#define HCI_READ_RMT_EXT_FEATURES_COMP_EVT 0x23 464#define HCI_ESCO_CONNECTION_COMP_EVT 0x2C 465#define HCI_ESCO_CONNECTION_CHANGED_EVT 0x2D 466#define HCI_SNIFF_SUB_RATE_EVT 0x2E 467#define HCI_EXTENDED_INQUIRY_RESULT_EVT 0x2F 468#define HCI_ENCRYPTION_KEY_REFRESH_COMP_EVT 0x30 469#define HCI_IO_CAPABILITY_REQUEST_EVT 0x31 470#define HCI_IO_CAPABILITY_RESPONSE_EVT 0x32 471#define HCI_USER_CONFIRMATION_REQUEST_EVT 0x33 472#define HCI_USER_PASSKEY_REQUEST_EVT 0x34 473#define HCI_REMOTE_OOB_DATA_REQUEST_EVT 0x35 474#define HCI_SIMPLE_PAIRING_COMPLETE_EVT 0x36 475#define HCI_LINK_SUPER_TOUT_CHANGED_EVT 0x38 476#define HCI_ENHANCED_FLUSH_COMPLETE_EVT 0x39 477#define HCI_USER_PASSKEY_NOTIFY_EVT 0x3B 478#define HCI_KEYPRESS_NOTIFY_EVT 0x3C 479#define HCI_RMT_HOST_SUP_FEAT_NOTIFY_EVT 0x3D 480 481/*#define HCI_GENERIC_AMP_LINK_KEY_NOTIF_EVT 0x3E Removed from spec */ 482#define HCI_PHYSICAL_LINK_COMP_EVT 0x40 483#define HCI_CHANNEL_SELECTED_EVT 0x41 484#define HCI_DISC_PHYSICAL_LINK_COMP_EVT 0x42 485#define HCI_PHY_LINK_LOSS_EARLY_WARNING_EVT 0x43 486#define HCI_PHY_LINK_RECOVERY_EVT 0x44 487#define HCI_LOGICAL_LINK_COMP_EVT 0x45 488#define HCI_DISC_LOGICAL_LINK_COMP_EVT 0x46 489#define HCI_FLOW_SPEC_MODIFY_COMP_EVT 0x47 490#define HCI_NUM_COMPL_DATA_BLOCKS_EVT 0x48 491#define HCI_SHORT_RANGE_MODE_COMPLETE_EVT 0x4C 492#define HCI_AMP_STATUS_CHANGE_EVT 0x4D 493 494/* ULP HCI Event */ 495#define HCI_BLE_EVENT 0x03E 496/* ULP Event sub code */ 497#define HCI_BLE_CONN_COMPLETE_EVT 0x01 498#define HCI_BLE_ADV_PKT_RPT_EVT 0x02 499#define HCI_BLE_LL_CONN_PARAM_UPD_EVT 0x03 500#define HCI_BLE_READ_REMOTE_FEAT_CMPL_EVT 0x04 501#define HCI_BLE_LTK_REQ_EVT 0x05 502 503#define HCI_EVENT_RSP_FIRST HCI_INQUIRY_COMP_EVT 504#define HCI_EVENT_RSP_LAST HCI_AMP_STATUS_CHANGE_EVT 505 506#define HCI_BRCM_H4IBSS_EVT 0xEF /* Vendor specific events for H4IBSS */ 507#define HCI_VENDOR_SPECIFIC_EVT 0xFF /* Vendor specific events */ 508#define HCI_NAP_TRACE_EVT 0xFF /* was define 0xFE, 0xFD, change to 0xFF 509 because conflict w/ TCI_EVT and per 510 specification compliant */ 511 512 513 514/* 515** Defentions for HCI Error Codes that are past in the events 516*/ 517#define HCI_SUCCESS 0x00 518#define HCI_PENDING 0x00 519#define HCI_ERR_ILLEGAL_COMMAND 0x01 520#define HCI_ERR_NO_CONNECTION 0x02 521#define HCI_ERR_HW_FAILURE 0x03 522#define HCI_ERR_PAGE_TIMEOUT 0x04 523#define HCI_ERR_AUTH_FAILURE 0x05 524#define HCI_ERR_KEY_MISSING 0x06 525#define HCI_ERR_MEMORY_FULL 0x07 526#define HCI_ERR_CONNECTION_TOUT 0x08 527#define HCI_ERR_MAX_NUM_OF_CONNECTIONS 0x09 528#define HCI_ERR_MAX_NUM_OF_SCOS 0x0A 529#define HCI_ERR_CONNECTION_EXISTS 0x0B 530#define HCI_ERR_COMMAND_DISALLOWED 0x0C 531#define HCI_ERR_HOST_REJECT_RESOURCES 0x0D 532#define HCI_ERR_HOST_REJECT_SECURITY 0x0E 533#define HCI_ERR_HOST_REJECT_DEVICE 0x0F 534#define HCI_ERR_HOST_TIMEOUT 0x10 535#define HCI_ERR_UNSUPPORTED_VALUE 0x11 536#define HCI_ERR_ILLEGAL_PARAMETER_FMT 0x12 537#define HCI_ERR_PEER_USER 0x13 538#define HCI_ERR_PEER_LOW_RESOURCES 0x14 539#define HCI_ERR_PEER_POWER_OFF 0x15 540#define HCI_ERR_CONN_CAUSE_LOCAL_HOST 0x16 541#define HCI_ERR_REPEATED_ATTEMPTS 0x17 542#define HCI_ERR_PAIRING_NOT_ALLOWED 0x18 543#define HCI_ERR_UNKNOWN_LMP_PDU 0x19 544#define HCI_ERR_UNSUPPORTED_REM_FEATURE 0x1A 545#define HCI_ERR_SCO_OFFSET_REJECTED 0x1B 546#define HCI_ERR_SCO_INTERVAL_REJECTED 0x1C 547#define HCI_ERR_SCO_AIR_MODE 0x1D 548#define HCI_ERR_INVALID_LMP_PARAM 0x1E 549#define HCI_ERR_UNSPECIFIED 0x1F 550#define HCI_ERR_UNSUPPORTED_LMP_FEATURE 0x20 551#define HCI_ERR_ROLE_CHANGE_NOT_ALLOWED 0x21 552#define HCI_ERR_LMP_RESPONSE_TIMEOUT 0x22 553#define HCI_ERR_LMP_ERR_TRANS_COLLISION 0x23 554#define HCI_ERR_LMP_PDU_NOT_ALLOWED 0x24 555#define HCI_ERR_ENCRY_MODE_NOT_ACCEPTABLE 0x25 556#define HCI_ERR_UNIT_KEY_USED 0x26 557#define HCI_ERR_QOS_NOT_SUPPORTED 0x27 558#define HCI_ERR_INSTANT_PASSED 0x28 559#define HCI_ERR_PAIRING_WITH_UNIT_KEY_NOT_SUPPORTED 0x29 560#define HCI_ERR_DIFF_TRANSACTION_COLLISION 0x2A 561#define HCI_ERR_UNDEFINED_0x2B 0x2B 562#define HCI_ERR_QOS_UNACCEPTABLE_PARAM 0x2C 563#define HCI_ERR_QOS_REJECTED 0x2D 564#define HCI_ERR_CHAN_CLASSIF_NOT_SUPPORTED 0x2E 565#define HCI_ERR_INSUFFCIENT_SECURITY 0x2F 566#define HCI_ERR_PARAM_OUT_OF_RANGE 0x30 567#define HCI_ERR_UNDEFINED_0x31 0x31 568#define HCI_ERR_ROLE_SWITCH_PENDING 0x32 569#define HCI_ERR_UNDEFINED_0x33 0x33 570#define HCI_ERR_RESERVED_SLOT_VIOLATION 0x34 571#define HCI_ERR_ROLE_SWITCH_FAILED 0x35 572#define HCI_ERR_INQ_RSP_DATA_TOO_LARGE 0x36 573#define HCI_ERR_SIMPLE_PAIRING_NOT_SUPPORTED 0x37 574#define HCI_ERR_HOST_BUSY_PAIRING 0x38 575#define HCI_ERR_REJ_NO_SUITABLE_CHANNEL 0x39 576#define HCI_ERR_CONTROLLER_BUSY 0x3A 577#define HCI_ERR_UNACCEPT_CONN_INTERVAL 0x3B 578#define HCI_ERR_DIRECTED_ADVERTISING_TIMEOUT 0x3C 579#define HCI_ERR_CONN_TOUT_DUE_TO_MIC_FAILURE 0x3D 580#define HCI_ERR_CONN_FAILED_ESTABLISHMENT 0x3E 581#define HCI_ERR_MAC_CONNECTION_FAILED 0x3F 582 583#define HCI_ERR_MAX_ERR 0x40 584 585#define HCI_HINT_TO_RECREATE_AMP_PHYS_LINK 0xFF 586 587/* 588** Definitions for HCI enable event 589*/ 590#define HCI_INQUIRY_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00000001) 591#define HCI_INQUIRY_RESULT_EV(p) (*((UINT32 *)(p)) & 0x00000002) 592#define HCI_CONNECTION_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00000004) 593#define HCI_CONNECTION_REQUEST_EV(p) (*((UINT32 *)(p)) & 0x00000008) 594#define HCI_DISCONNECTION_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00000010) 595#define HCI_AUTHENTICATION_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00000020) 596#define HCI_RMT_NAME_REQUEST_COMPL_EV(p) (*((UINT32 *)(p)) & 0x00000040) 597#define HCI_CHANGE_CONN_ENCRPT_ENABLE_EV(p) (*((UINT32 *)(p)) & 0x00000080) 598#define HCI_CHANGE_CONN_LINK_KEY_EV(p) (*((UINT32 *)(p)) & 0x00000100) 599#define HCI_MASTER_LINK_KEY_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00000200) 600#define HCI_READ_RMT_FEATURES_COMPL_EV(p) (*((UINT32 *)(p)) & 0x00000400) 601#define HCI_READ_RMT_VERSION_COMPL_EV(p) (*((UINT32 *)(p)) & 0x00000800) 602#define HCI_QOS_SETUP_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00001000) 603#define HCI_COMMAND_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00002000) 604#define HCI_COMMAND_STATUS_EV(p) (*((UINT32 *)(p)) & 0x00004000) 605#define HCI_HARDWARE_ERROR_EV(p) (*((UINT32 *)(p)) & 0x00008000) 606#define HCI_FLASH_OCCURED_EV(p) (*((UINT32 *)(p)) & 0x00010000) 607#define HCI_ROLE_CHANGE_EV(p) (*((UINT32 *)(p)) & 0x00020000) 608#define HCI_NUM_COMPLETED_PKTS_EV(p) (*((UINT32 *)(p)) & 0x00040000) 609#define HCI_MODE_CHANGE_EV(p) (*((UINT32 *)(p)) & 0x00080000) 610#define HCI_RETURN_LINK_KEYS_EV(p) (*((UINT32 *)(p)) & 0x00100000) 611#define HCI_PIN_CODE_REQUEST_EV(p) (*((UINT32 *)(p)) & 0x00200000) 612#define HCI_LINK_KEY_REQUEST_EV(p) (*((UINT32 *)(p)) & 0x00400000) 613#define HCI_LINK_KEY_NOTIFICATION_EV(p) (*((UINT32 *)(p)) & 0x00800000) 614#define HCI_LOOPBACK_COMMAND_EV(p) (*((UINT32 *)(p)) & 0x01000000) 615#define HCI_DATA_BUF_OVERFLOW_EV(p) (*((UINT32 *)(p)) & 0x02000000) 616#define HCI_MAX_SLOTS_CHANGE_EV(p) (*((UINT32 *)(p)) & 0x04000000) 617#define HCI_READ_CLOCK_OFFSET_COMP_EV(p) (*((UINT32 *)(p)) & 0x08000000) 618#define HCI_CONN_PKT_TYPE_CHANGED_EV(p) (*((UINT32 *)(p)) & 0x10000000) 619#define HCI_QOS_VIOLATION_EV(p) (*((UINT32 *)(p)) & 0x20000000) 620#define HCI_PAGE_SCAN_MODE_CHANGED_EV(p) (*((UINT32 *)(p)) & 0x40000000) 621#define HCI_PAGE_SCAN_REP_MODE_CHNG_EV(p) (*((UINT32 *)(p)) & 0x80000000) 622 623/* the default event mask for 2.1+EDR (Lisbon) does not include Lisbon events */ 624#define HCI_DEFAULT_EVENT_MASK_0 0xFFFFFFFF 625#define HCI_DEFAULT_EVENT_MASK_1 0x00001FFF 626 627/* the event mask for 2.0 + EDR and later (includes Lisbon events) */ 628#define HCI_LISBON_EVENT_MASK_0 0xFFFFFFFF 629#define HCI_LISBON_EVENT_MASK_1 0x1DBFFFFF 630#define HCI_LISBON_EVENT_MASK "\x0D\xBF\xFF\xFF\xFF\xFF\xFF\xFF" 631#define HCI_LISBON_EVENT_MASK_EXT "\x1D\xBF\xFF\xFF\xFF\xFF\xFF\xFF" 632#define HCI_DUMO_EVENT_MASK_EXT "\x3D\xBF\xFF\xFF\xFF\xFF\xFF\xFF" 633/* 0x00001FFF FFFFFFFF Default - no Lisbon events 634 0x00000800 00000000 Synchronous Connection Complete Event 635 0x00001000 00000000 Synchronous Connection Changed Event 636 0x00002000 00000000 Sniff Subrate Event 637 0x00004000 00000000 Extended Inquiry Result Event 638 0x00008000 00000000 Encryption Key Refresh Complete Event 639 0x00010000 00000000 IO Capability Request Event 640 0x00020000 00000000 IO Capability Response Event 641 0x00040000 00000000 User Confirmation Request Event 642 0x00080000 00000000 User Passkey Request Event 643 0x00100000 00000000 Remote OOB Data Request Event 644 0x00200000 00000000 Simple Pairing Complete Event 645 0x00400000 00000000 Generic AMP Link Key Notification Event 646 0x00800000 00000000 Link Supervision Timeout Changed Event 647 0x01000000 00000000 Enhanced Flush Complete Event 648 0x04000000 00000000 User Passkey Notification Event 649 0x08000000 00000000 Keypress Notification Event 650 0x10000000 00000000 Remote Host Supported Features Notification Event 651 0x20000000 00000000 LE Meta Event 652 */ 653 654 655/* the event mask for AMP controllers */ 656#define HCI_AMP_EVENT_MASK_3_0 "\x00\x00\x00\x00\x00\x00\x3F\xFF" 657 658/* 0x0000000000000000 No events specified (default) 659 0x0000000000000001 Physical Link Complete Event 660 0x0000000000000002 Channel Selected Event 661 0x0000000000000004 Disconnection Physical Link Event 662 0x0000000000000008 Physical Link Loss Early Warning Event 663 0x0000000000000010 Physical Link Recovery Event 664 0x0000000000000020 Logical Link Complete Event 665 0x0000000000000040 Disconnection Logical Link Complete Event 666 0x0000000000000080 Flow Spec Modify Complete Event 667 0x0000000000000100 Number of Completed Data Blocks Event 668 0x0000000000000200 AMP Start Test Event 669 0x0000000000000400 AMP Test End Event 670 0x0000000000000800 AMP Receiver Report Event 671 0x0000000000001000 Short Range Mode Change Complete Event 672 0x0000000000002000 AMP Status Change Event 673*/ 674 675 676/* 677** Definitions for packet type masks (BT1.2 and BT2.0 definitions) 678*/ 679#define HCI_PKT_TYPES_MASK_NO_2_DH1 0x0002 680#define HCI_PKT_TYPES_MASK_NO_3_DH1 0x0004 681#define HCI_PKT_TYPES_MASK_DM1 0x0008 682#define HCI_PKT_TYPES_MASK_DH1 0x0010 683#define HCI_PKT_TYPES_MASK_HV1 0x0020 684#define HCI_PKT_TYPES_MASK_HV2 0x0040 685#define HCI_PKT_TYPES_MASK_HV3 0x0080 686#define HCI_PKT_TYPES_MASK_NO_2_DH3 0x0100 687#define HCI_PKT_TYPES_MASK_NO_3_DH3 0x0200 688#define HCI_PKT_TYPES_MASK_DM3 0x0400 689#define HCI_PKT_TYPES_MASK_DH3 0x0800 690#define HCI_PKT_TYPES_MASK_NO_2_DH5 0x1000 691#define HCI_PKT_TYPES_MASK_NO_3_DH5 0x2000 692#define HCI_PKT_TYPES_MASK_DM5 0x4000 693#define HCI_PKT_TYPES_MASK_DH5 0x8000 694 695/* Packet type should be one of valid but at least one should be specified */ 696#define HCI_VALID_SCO_PKT_TYPE(t) (((((t) & ~(HCI_PKT_TYPES_MASK_HV1 \ 697 | HCI_PKT_TYPES_MASK_HV2 \ 698 | HCI_PKT_TYPES_MASK_HV3)) == 0)) \ 699 && ((t) != 0)) 700 701 702 703 704 705/* Packet type should not be invalid and at least one should be specified */ 706#define HCI_VALID_ACL_PKT_TYPE(t) (((((t) & ~(HCI_PKT_TYPES_MASK_DM1 \ 707 | HCI_PKT_TYPES_MASK_DH1 \ 708 | HCI_PKT_TYPES_MASK_DM3 \ 709 | HCI_PKT_TYPES_MASK_DH3 \ 710 | HCI_PKT_TYPES_MASK_DM5 \ 711 | HCI_PKT_TYPES_MASK_DH5 \ 712 | HCI_PKT_TYPES_MASK_NO_2_DH1 \ 713 | HCI_PKT_TYPES_MASK_NO_3_DH1 \ 714 | HCI_PKT_TYPES_MASK_NO_2_DH3 \ 715 | HCI_PKT_TYPES_MASK_NO_3_DH3 \ 716 | HCI_PKT_TYPES_MASK_NO_2_DH5 \ 717 | HCI_PKT_TYPES_MASK_NO_3_DH5 )) == 0)) \ 718 && (((t) & (HCI_PKT_TYPES_MASK_DM1 \ 719 | HCI_PKT_TYPES_MASK_DH1 \ 720 | HCI_PKT_TYPES_MASK_DM3 \ 721 | HCI_PKT_TYPES_MASK_DH3 \ 722 | HCI_PKT_TYPES_MASK_DM5 \ 723 | HCI_PKT_TYPES_MASK_DH5)) != 0)) 724 725/* 726** Definitions for eSCO packet type masks (BT1.2 and BT2.0 definitions) 727*/ 728#define HCI_ESCO_PKT_TYPES_MASK_HV1 0x0001 729#define HCI_ESCO_PKT_TYPES_MASK_HV2 0x0002 730#define HCI_ESCO_PKT_TYPES_MASK_HV3 0x0004 731#define HCI_ESCO_PKT_TYPES_MASK_EV3 0x0008 732#define HCI_ESCO_PKT_TYPES_MASK_EV4 0x0010 733#define HCI_ESCO_PKT_TYPES_MASK_EV5 0x0020 734#define HCI_ESCO_PKT_TYPES_MASK_NO_2_EV3 0x0040 735#define HCI_ESCO_PKT_TYPES_MASK_NO_3_EV3 0x0080 736#define HCI_ESCO_PKT_TYPES_MASK_NO_2_EV5 0x0100 737#define HCI_ESCO_PKT_TYPES_MASK_NO_3_EV5 0x0200 738 739/* Packet type should be one of valid but at least one should be specified for 1.2 */ 740#define HCI_VALID_ESCO_PKT_TYPE(t) (((((t) & ~(HCI_ESCO_PKT_TYPES_MASK_EV3 \ 741 | HCI_ESCO_PKT_TYPES_MASK_EV4 \ 742 | HCI_ESCO_PKT_TYPES_MASK_EV5)) == 0)) \ 743 && ((t) != 0))/* Packet type should be one of valid but at least one should be specified */ 744 745#define HCI_VALID_ESCO_SCOPKT_TYPE(t) (((((t) & ~(HCI_ESCO_PKT_TYPES_MASK_HV1 \ 746 | HCI_ESCO_PKT_TYPES_MASK_HV2 \ 747 | HCI_ESCO_PKT_TYPES_MASK_HV3)) == 0)) \ 748 && ((t) != 0)) 749 750#define HCI_VALID_SCO_ALL_PKT_TYPE(t) (((((t) & ~(HCI_ESCO_PKT_TYPES_MASK_HV1 \ 751 | HCI_ESCO_PKT_TYPES_MASK_HV2 \ 752 | HCI_ESCO_PKT_TYPES_MASK_HV3 \ 753 | HCI_ESCO_PKT_TYPES_MASK_EV3 \ 754 | HCI_ESCO_PKT_TYPES_MASK_EV4 \ 755 | HCI_ESCO_PKT_TYPES_MASK_EV5)) == 0)) \ 756 && ((t) != 0)) 757 758/* 759** Define parameters to allow role switch during create connection 760*/ 761#define HCI_CR_CONN_NOT_ALLOW_SWITCH 0x00 762#define HCI_CR_CONN_ALLOW_SWITCH 0x01 763 764/* 765** Hold Mode command destination 766*/ 767#define HOLD_MODE_DEST_LOCAL_DEVICE 0x00 768#define HOLD_MODE_DEST_RMT_DEVICE 0x01 769 770/* 771** Definitions for different HCI parameters 772*/ 773#define HCI_PER_INQ_MIN_MAX_PERIOD 0x0003 774#define HCI_PER_INQ_MAX_MAX_PERIOD 0xFFFF 775#define HCI_PER_INQ_MIN_MIN_PERIOD 0x0002 776#define HCI_PER_INQ_MAX_MIN_PERIOD 0xFFFE 777 778#define HCI_MAX_INQUIRY_LENGTH 0x30 779 780#define HCI_MIN_INQ_LAP 0x9E8B00 781#define HCI_MAX_INQ_LAP 0x9E8B3F 782 783/* HCI role defenitions */ 784#define HCI_ROLE_MASTER 0x00 785#define HCI_ROLE_SLAVE 0x01 786#define HCI_ROLE_UNKNOWN 0xff 787 788/* HCI mode defenitions */ 789#define HCI_MODE_ACTIVE 0x00 790#define HCI_MODE_HOLD 0x01 791#define HCI_MODE_SNIFF 0x02 792#define HCI_MODE_PARK 0x03 793 794/* HCI Flow Control Mode defenitions */ 795#define HCI_PACKET_BASED_FC_MODE 0x00 796#define HCI_BLOCK_BASED_FC_MODE 0x01 797 798/* Define Packet types as requested by the Host */ 799#define HCI_ACL_PKT_TYPE_NONE 0x0000 800#define HCI_ACL_PKT_TYPE_DM1 0x0008 801#define HCI_ACL_PKT_TYPE_DH1 0x0010 802#define HCI_ACL_PKT_TYPE_AUX1 0x0200 803#define HCI_ACL_PKT_TYPE_DM3 0x0400 804#define HCI_ACL_PKT_TYPE_DH3 0x0800 805#define HCI_ACL_PKT_TYPE_DM5 0x4000 806#define HCI_ACL_PKT_TYPE_DH5 0x8000 807 808/* Define key type in the Master Link Key command */ 809#define HCI_USE_SEMI_PERMANENT_KEY 0x00 810#define HCI_USE_TEMPORARY_KEY 0x01 811 812/* Page scan period modes */ 813#define HCI_PAGE_SCAN_REP_MODE_R0 0x00 814#define HCI_PAGE_SCAN_REP_MODE_R1 0x01 815#define HCI_PAGE_SCAN_REP_MODE_R2 0x02 816 817/* Define limits for page scan repetition modes */ 818#define HCI_PAGE_SCAN_R1_LIMIT 0x0800 819#define HCI_PAGE_SCAN_R2_LIMIT 0x1000 820 821/* Page scan period modes */ 822#define HCI_PAGE_SCAN_PER_MODE_P0 0x00 823#define HCI_PAGE_SCAN_PER_MODE_P1 0x01 824#define HCI_PAGE_SCAN_PER_MODE_P2 0x02 825 826/* Page scan modes */ 827#define HCI_MANDATARY_PAGE_SCAN_MODE 0x00 828#define HCI_OPTIONAL_PAGE_SCAN_MODE1 0x01 829#define HCI_OPTIONAL_PAGE_SCAN_MODE2 0x02 830#define HCI_OPTIONAL_PAGE_SCAN_MODE3 0x03 831 832/* Page and inquiry scan types */ 833#define HCI_SCAN_TYPE_STANDARD 0x00 834#define HCI_SCAN_TYPE_INTERLACED 0x01 /* 1.2 devices or later */ 835#define HCI_DEF_SCAN_TYPE HCI_SCAN_TYPE_STANDARD 836 837/* Definitions for quality of service service types */ 838#define HCI_SERVICE_NO_TRAFFIC 0x00 839#define HCI_SERVICE_BEST_EFFORT 0x01 840#define HCI_SERVICE_GUARANTEED 0x02 841 842#define HCI_QOS_LATENCY_DO_NOT_CARE 0xFFFFFFFF 843#define HCI_QOS_DELAY_DO_NOT_CARE 0xFFFFFFFF 844 845/* Definitions for Flow Specification */ 846#define HCI_FLOW_SPEC_LATENCY_DO_NOT_CARE 0xFFFFFFFF 847 848/* Definitions for AFH Channel Map */ 849#define HCI_AFH_CHANNEL_MAP_LEN 10 850 851/* Definitions for Extended Inquiry Response */ 852#define HCI_EXT_INQ_RESPONSE_LEN 240 853#define HCI_EIR_FLAGS_TYPE BT_EIR_FLAGS_TYPE 854#define HCI_EIR_MORE_16BITS_UUID_TYPE BT_EIR_MORE_16BITS_UUID_TYPE 855#define HCI_EIR_COMPLETE_16BITS_UUID_TYPE BT_EIR_COMPLETE_16BITS_UUID_TYPE 856#define HCI_EIR_MORE_32BITS_UUID_TYPE BT_EIR_MORE_32BITS_UUID_TYPE 857#define HCI_EIR_COMPLETE_32BITS_UUID_TYPE BT_EIR_COMPLETE_32BITS_UUID_TYPE 858#define HCI_EIR_MORE_128BITS_UUID_TYPE BT_EIR_MORE_128BITS_UUID_TYPE 859#define HCI_EIR_COMPLETE_128BITS_UUID_TYPE BT_EIR_COMPLETE_128BITS_UUID_TYPE 860#define HCI_EIR_SHORTENED_LOCAL_NAME_TYPE BT_EIR_SHORTENED_LOCAL_NAME_TYPE 861#define HCI_EIR_COMPLETE_LOCAL_NAME_TYPE BT_EIR_COMPLETE_LOCAL_NAME_TYPE 862#define HCI_EIR_TX_POWER_LEVEL_TYPE BT_EIR_TX_POWER_LEVEL_TYPE 863#define HCI_EIR_MANUFACTURER_SPECIFIC_TYPE BT_EIR_MANUFACTURER_SPECIFIC_TYPE 864#define HCI_EIR_OOB_BD_ADDR_TYPE BT_EIR_OOB_BD_ADDR_TYPE 865#define HCI_EIR_OOB_COD_TYPE BT_EIR_OOB_COD_TYPE 866#define HCI_EIR_OOB_SSP_HASH_C_TYPE BT_EIR_OOB_SSP_HASH_C_TYPE 867#define HCI_EIR_OOB_SSP_RAND_R_TYPE BT_EIR_OOB_SSP_RAND_R_TYPE 868 869/* Definitions for Write Simple Pairing Mode */ 870#define HCI_SP_MODE_UNDEFINED 0x00 871#define HCI_SP_MODE_ENABLED 0x01 872 873/* Definitions for Write Simple Pairing Debug Mode */ 874#define HCI_SPD_MODE_DISABLED 0x00 875#define HCI_SPD_MODE_ENABLED 0x01 876 877/* Definitions for IO Capability Response/Command */ 878#define HCI_IO_CAP_DISPLAY_ONLY 0x00 879#define HCI_IO_CAP_DISPLAY_YESNO 0x01 880#define HCI_IO_CAP_KEYBOARD_ONLY 0x02 881#define HCI_IO_CAP_NO_IO 0x03 882 883#define HCI_OOB_AUTH_DATA_NOT_PRESENT 0x00 884#define HCI_OOB_REM_AUTH_DATA_PRESENT 0x01 885 886#define HCI_MITM_PROTECT_NOT_REQUIRED 0x00 887#define HCI_MITM_PROTECT_REQUIRED 0x01 888 889 890/* Policy settings status */ 891#define HCI_DISABLE_ALL_LM_MODES 0x0000 892#define HCI_ENABLE_MASTER_SLAVE_SWITCH 0x0001 893#define HCI_ENABLE_HOLD_MODE 0x0002 894#define HCI_ENABLE_SNIFF_MODE 0x0004 895#define HCI_ENABLE_PARK_MODE 0x0008 896 897/* By default allow switch, because host can not allow that */ 898/* that until he created the connection */ 899#define HCI_DEFAULT_POLICY_SETTINGS HCI_DISABLE_ALL_LM_MODES 900 901/* Filters that are sent in set filter command */ 902#define HCI_FILTER_TYPE_CLEAR_ALL 0x00 903#define HCI_FILTER_INQUIRY_RESULT 0x01 904#define HCI_FILTER_CONNECTION_SETUP 0x02 905 906#define HCI_FILTER_COND_NEW_DEVICE 0x00 907#define HCI_FILTER_COND_DEVICE_CLASS 0x01 908#define HCI_FILTER_COND_BD_ADDR 0x02 909 910#define HCI_DO_NOT_AUTO_ACCEPT_CONNECT 1 911#define HCI_DO_AUTO_ACCEPT_CONNECT 2 /* role switch disabled */ 912#define HCI_DO_AUTO_ACCEPT_CONNECT_RS 3 /* role switch enabled (1.1 errata 1115) */ 913 914/* Auto accept flags */ 915#define HCI_AUTO_ACCEPT_OFF 0x00 916#define HCI_AUTO_ACCEPT_ACL_CONNECTIONS 0x01 917#define HCI_AUTO_ACCEPT_SCO_CONNECTIONS 0x02 918 919/* PIN type */ 920#define HCI_PIN_TYPE_VARIABLE 0 921#define HCI_PIN_TYPE_FIXED 1 922 923/* Loopback Modes */ 924#define HCI_LOOPBACK_MODE_DISABLED 0 925#define HCI_LOOPBACK_MODE_LOCAL 1 926#define HCI_LOOPBACK_MODE_REMOTE 2 927 928#define SLOTS_PER_10MS 16 /* 0.625 ms slots in a 10 ms tick */ 929 930/* Maximum connection accept timeout in 0.625msec */ 931#define HCI_MAX_CONN_ACCEPT_TOUT 0xB540 /* 29 sec */ 932#define HCI_DEF_CONN_ACCEPT_TOUT 0x1F40 /* 5 sec */ 933 934/* Page timeout is used in LC only and LC is counting down slots not using OS */ 935#define HCI_DEFAULT_PAGE_TOUT 0x2000 /* 5.12 sec (in slots) */ 936 937/* Scan enable flags */ 938#define HCI_NO_SCAN_ENABLED 0x00 939#define HCI_INQUIRY_SCAN_ENABLED 0x01 940#define HCI_PAGE_SCAN_ENABLED 0x02 941 942/* Pagescan timer definitions in 0.625 ms */ 943#define HCI_MIN_PAGESCAN_INTERVAL 0x12 /* 11.25 ms */ 944#define HCI_MAX_PAGESCAN_INTERVAL 0x1000 /* 2.56 sec */ 945#define HCI_DEF_PAGESCAN_INTERVAL 0x0800 /* 1.28 sec */ 946 947/* Parameter for pagescan window is passed to LC and is kept in slots */ 948#define HCI_MIN_PAGESCAN_WINDOW 0x11 /* 10.625 ms */ 949#define HCI_MAX_PAGESCAN_WINDOW 0x1000 /* 2.56 sec */ 950#define HCI_DEF_PAGESCAN_WINDOW 0x12 /* 11.25 ms */ 951 952/* Inquiryscan timer definitions in 0.625 ms */ 953#define HCI_MIN_INQUIRYSCAN_INTERVAL 0x12 /* 11.25 ms */ 954#define HCI_MAX_INQUIRYSCAN_INTERVAL 0x1000 /* 2.56 sec */ 955#define HCI_DEF_INQUIRYSCAN_INTERVAL 0x1000 /* 2.56 sec */ 956 957/* Parameter for inquiryscan window is passed to LC and is kept in slots */ 958#define HCI_MIN_INQUIRYSCAN_WINDOW 0x11 /* 10.625 ms */ 959#define HCI_MAX_INQUIRYSCAN_WINDOW 0x1000 /* 2.56 sec */ 960#define HCI_DEF_INQUIRYSCAN_WINDOW 0x12 /* 11.25 ms */ 961 962/* Encryption modes */ 963#define HCI_ENCRYPT_MODE_DISABLED 0x00 964#define HCI_ENCRYPT_MODE_POINT_TO_POINT 0x01 965#define HCI_ENCRYPT_MODE_ALL 0x02 966 967/* Voice settings */ 968#define HCI_INP_CODING_LINEAR 0x0000 /* 0000000000 */ 969#define HCI_INP_CODING_U_LAW 0x0100 /* 0100000000 */ 970#define HCI_INP_CODING_A_LAW 0x0200 /* 1000000000 */ 971#define HCI_INP_CODING_MASK 0x0300 /* 1100000000 */ 972 973#define HCI_INP_DATA_FMT_1S_COMPLEMENT 0x0000 /* 0000000000 */ 974#define HCI_INP_DATA_FMT_2S_COMPLEMENT 0x0040 /* 0001000000 */ 975#define HCI_INP_DATA_FMT_SIGN_MAGNITUDE 0x0080 /* 0010000000 */ 976#define HCI_INP_DATA_FMT_UNSIGNED 0x00c0 /* 0011000000 */ 977#define HCI_INP_DATA_FMT_MASK 0x00c0 /* 0011000000 */ 978 979#define HCI_INP_SAMPLE_SIZE_8BIT 0x0000 /* 0000000000 */ 980#define HCI_INP_SAMPLE_SIZE_16BIT 0x0020 /* 0000100000 */ 981#define HCI_INP_SAMPLE_SIZE_MASK 0x0020 /* 0000100000 */ 982 983#define HCI_INP_LINEAR_PCM_BIT_POS_MASK 0x001c /* 0000011100 */ 984#define HCI_INP_LINEAR_PCM_BIT_POS_OFFS 2 985 986#define HCI_AIR_CODING_FORMAT_CVSD 0x0000 /* 0000000000 */ 987#define HCI_AIR_CODING_FORMAT_U_LAW 0x0001 /* 0000000001 */ 988#define HCI_AIR_CODING_FORMAT_A_LAW 0x0002 /* 0000000010 */ 989#define HCI_AIR_CODING_FORMAT_TRANSPNT 0x0003 /* 0000000011 */ 990#define HCI_AIR_CODING_FORMAT_MASK 0x0003 /* 0000000011 */ 991 992/* default 0001100000 */ 993#define HCI_DEFAULT_VOICE_SETTINGS (HCI_INP_CODING_LINEAR \ 994 | HCI_INP_DATA_FMT_2S_COMPLEMENT \ 995 | HCI_INP_SAMPLE_SIZE_16BIT \ 996 | HCI_AIR_CODING_FORMAT_CVSD) 997 998#define HCI_CVSD_SUPPORTED(x) (((x) & HCI_AIR_CODING_FORMAT_MASK) == HCI_AIR_CODING_FORMAT_CVSD) 999#define HCI_U_LAW_SUPPORTED(x) (((x) & HCI_AIR_CODING_FORMAT_MASK) == HCI_AIR_CODING_FORMAT_U_LAW) 1000#define HCI_A_LAW_SUPPORTED(x) (((x) & HCI_AIR_CODING_FORMAT_MASK) == HCI_AIR_CODING_FORMAT_A_LAW) 1001#define HCI_TRANSPNT_SUPPORTED(x) (((x) & HCI_AIR_CODING_FORMAT_MASK) == HCI_AIR_CODING_FORMAT_TRANSPNT) 1002 1003/* Retransmit timer definitions in 0.625 */ 1004#define HCI_MAX_AUTO_FLUSH_TOUT 0x07FF 1005#define HCI_DEFAULT_AUTO_FLUSH_TOUT 0 /* No auto flush */ 1006 1007/* Broadcast retransmitions */ 1008#define HCI_DEFAULT_NUM_BCAST_RETRAN 1 1009 1010/* Define broadcast data types as passed in the hci data packet */ 1011#define HCI_DATA_POINT_TO_POINT 0x00 1012#define HCI_DATA_ACTIVE_BCAST 0x01 1013#define HCI_DATA_PICONET_BCAST 0x02 1014 1015/* Hold mode activity */ 1016#define HCI_MAINTAIN_CUR_POWER_STATE 0x00 1017#define HCI_SUSPEND_PAGE_SCAN 0x01 1018#define HCI_SUSPEND_INQUIRY_SCAN 0x02 1019#define HCI_SUSPEND_PERIODIC_INQUIRIES 0x04 1020 1021/* Default Link Supervision timeoout */ 1022#define HCI_DEFAULT_INACT_TOUT 0x7D00 /* BR/EDR (20 seconds) */ 1023#define HCI_DEFAULT_AMP_INACT_TOUT 0x3E80 /* AMP (10 seconds) */ 1024 1025/* Read transmit power level parameter */ 1026#define HCI_READ_CURRENT 0x00 1027#define HCI_READ_MAXIMUM 0x01 1028 1029/* Link types for connection complete event */ 1030#define HCI_LINK_TYPE_SCO 0x00 1031#define HCI_LINK_TYPE_ACL 0x01 1032#define HCI_LINK_TYPE_ESCO 0x02 1033 1034/* Link Key Notification Event (Key Type) definitions */ 1035#define HCI_LKEY_TYPE_COMBINATION 0x00 1036#define HCI_LKEY_TYPE_LOCAL_UNIT 0x01 1037#define HCI_LKEY_TYPE_REMOTE_UNIT 0x02 1038#define HCI_LKEY_TYPE_DEBUG_COMB 0x03 1039#define HCI_LKEY_TYPE_UNAUTH_COMB 0x04 1040#define HCI_LKEY_TYPE_AUTH_COMB 0x05 1041#define HCI_LKEY_TYPE_CHANGED_COMB 0x06 1042 1043/* Internal definitions - not used over HCI */ 1044#define HCI_LKEY_TYPE_AMP_WIFI 0x80 1045#define HCI_LKEY_TYPE_AMP_UWB 0x81 1046#define HCI_LKEY_TYPE_UNKNOWN 0xff 1047 1048/* Read Local Version HCI Version return values (Command Complete Event) */ 1049#define HCI_VERSION_1_0B 0x00 1050#define HCI_VERSION_1_1 0x01 1051 1052/* Define an invalid value for a handle */ 1053#define HCI_INVALID_HANDLE 0xFFFF 1054 1055/* Define max ammount of data in the HCI command */ 1056#define HCI_COMMAND_SIZE 255 1057 1058/* Define the preamble length for all HCI Commands. 1059** This is 2-bytes for opcode and 1 byte for length 1060*/ 1061#define HCIC_PREAMBLE_SIZE 3 1062 1063/* Define the preamble length for all HCI Events 1064** This is 1-byte for opcode and 1 byte for length 1065*/ 1066#define HCIE_PREAMBLE_SIZE 2 1067#define HCI_SCO_PREAMBLE_SIZE 3 1068#define HCI_DATA_PREAMBLE_SIZE 4 1069 1070/* local Bluetooth controller id for AMP HCI */ 1071#define LOCAL_BR_EDR_CONTROLLER_ID 0 1072 1073/* controller id types for AMP HCI */ 1074#define HCI_CONTROLLER_TYPE_BR_EDR 0 1075#define HCI_CONTROLLER_TYPE_802_11 1 1076#define HCI_CONTROLLER_TYPE_ECMA 2 1077#define HCI_MAX_CONTROLLER_TYPES 3 1078 1079 1080 1081 1082/* AMP Controller Status codes 1083*/ 1084#define HCI_AMP_CTRLR_PHYSICALLY_DOWN 0 1085#define HCI_AMP_CTRLR_USABLE_BY_BT 1 1086#define HCI_AMP_CTRLR_UNUSABLE_FOR_BT 2 1087#define HCI_AMP_CTRLR_LOW_CAP_FOR_BT 3 1088#define HCI_AMP_CTRLR_MED_CAP_FOR_BT 4 1089#define HCI_AMP_CTRLR_HIGH_CAP_FOR_BT 5 1090#define HCI_AMP_CTRLR_FULL_CAP_FOR_BT 6 1091 1092#define HCI_MAX_AMP_STATUS_TYPES 7 1093 1094 1095/* Define the extended flow specification fields used by AMP */ 1096typedef struct 1097{ 1098 UINT8 id; 1099 UINT8 stype; 1100 UINT16 max_sdu_size; 1101 UINT32 sdu_inter_time; 1102 UINT32 access_latency; 1103 UINT32 flush_timeout; 1104} tHCI_EXT_FLOW_SPEC; 1105 1106 1107/* HCI message type definitions (for H4 messages) */ 1108#define HCIT_TYPE_COMMAND 1 1109#define HCIT_TYPE_ACL_DATA 2 1110#define HCIT_TYPE_SCO_DATA 3 1111#define HCIT_TYPE_EVENT 4 1112#define HCIT_TYPE_LM_DIAG 7 1113#define HCIT_TYPE_NFC 16 1114 1115#define HCIT_LM_DIAG_LENGTH 63 1116 1117/* Define values for LMP Test Control parameters 1118** Test Scenario, Hopping Mode, Power Control Mode 1119*/ 1120#define LMP_TESTCTL_TESTSC_PAUSE 0 1121#define LMP_TESTCTL_TESTSC_TXTEST_0 1 1122#define LMP_TESTCTL_TESTSC_TXTEST_1 2 1123#define LMP_TESTCTL_TESTSC_TXTEST_1010 3 1124#define LMP_TESTCTL_TESTSC_PSRND_BITSEQ 4 1125#define LMP_TESTCTL_TESTSC_CLOSEDLB_ACL 5 1126#define LMP_TESTCTL_TESTSC_CLOSEDLB_SCO 6 1127#define LMP_TESTCTL_TESTSC_ACL_NOWHIT 7 1128#define LMP_TESTCTL_TESTSC_SCO_NOWHIT 8 1129#define LMP_TESTCTL_TESTSC_TXTEST_11110000 9 1130#define LMP_TESTCTL_TESTSC_EXITTESTMODE 255 1131 1132#define LMP_TESTCTL_HOPMOD_RXTX1FREQ 0 1133#define LMP_TESTCTL_HOPMOD_HOP_EURUSA 1 1134#define LMP_TESTCTL_HOPMOD_HOP_JAPAN 2 1135#define LMP_TESTCTL_HOPMOD_HOP_FRANCE 3 1136#define LMP_TESTCTL_HOPMOD_HOP_SPAIN 4 1137#define LMP_TESTCTL_HOPMOD_REDUCED_HOP 5 1138 1139#define LMP_TESTCTL_POWCTL_FIXEDTX_OP 0 1140#define LMP_TESTCTL_POWCTL_ADAPTIVE 1 1141 1142 1143/* 1144** Define company IDs (from Bluetooth Assigned Numbers v1.1, section 2.2) 1145*/ 1146#define LMP_COMPID_ERICSSON 0 1147#define LMP_COMPID_NOKIA 1 1148#define LMP_COMPID_INTEL 2 1149#define LMP_COMPID_IBM 3 1150#define LMP_COMPID_TOSHIBA 4 1151#define LMP_COMPID_3COM 5 1152#define LMP_COMPID_MICROSOFT 6 1153#define LMP_COMPID_LUCENT 7 1154#define LMP_COMPID_MOTOROLA 8 1155#define LMP_COMPID_INFINEON 9 1156#define LMP_COMPID_CSR 10 1157#define LMP_COMPID_SILICON_WAVE 11 1158#define LMP_COMPID_DIGIANSWER 12 1159#define LMP_COMPID_TEXAS_INSTRUMENTS 13 1160#define LMP_COMPID_PARTHUS 14 1161#define LMP_COMPID_BROADCOM 15 1162#define LMP_COMPID_MITEL_SEMI 16 1163#define LMP_COMPID_WIDCOMM 17 1164#define LMP_COMPID_ZEEVO 18 1165#define LMP_COMPID_ATMEL 19 1166#define LMP_COMPID_MITSUBISHI 20 1167#define LMP_COMPID_RTX_TELECOM 21 1168#define LMP_COMPID_KC_TECH 22 1169#define LMP_COMPID_NEWLOGIC 23 1170#define LMP_COMPID_TRANSILICA 24 1171#define LMP_COMPID_ROHDE_SCHWARZ 25 1172#define LMP_COMPID_TTPCOM 26 1173#define LMP_COMPID_SIGNIA 27 1174#define LMP_COMPID_CONEXANT 28 1175#define LMP_COMPID_QUALCOMM 29 1176#define LMP_COMPID_INVENTEL 30 1177#define LMP_COMPID_AVM 31 1178#define LMP_COMPID_BANDSPEED 32 1179#define LMP_COMPID_MANSELLA 33 1180#define LMP_COMPID_NEC_CORP 34 1181#define LMP_COMPID_WAVEPLUS 35 1182#define LMP_COMPID_ALCATEL 36 1183#define LMP_COMPID_PHILIPS 37 1184#define LMP_COMPID_C_TECHNOLOGIES 38 1185#define LMP_COMPID_OPEN_INTERFACE 39 1186#define LMP_COMPID_RF_MICRO 40 1187#define LMP_COMPID_HITACHI 41 1188#define LMP_COMPID_SYMBOL_TECH 42 1189#define LMP_COMPID_TENOVIS 43 1190#define LMP_COMPID_MACRONIX 44 1191#define LMP_COMPID_GCT_SEMI 45 1192#define LMP_COMPID_NORWOOD_SYSTEMS 46 1193#define LMP_COMPID_MEWTEL_TECH 47 1194#define LMP_COMPID_STM 48 1195#define LMP_COMPID_SYNOPSYS 49 1196#define LMP_COMPID_RED_M_LTD 50 1197#define LMP_COMPID_COMMIL_LTD 51 1198#define LMP_COMPID_CATC 52 1199#define LMP_COMPID_ECLIPSE 53 1200#define LMP_COMPID_RENESAS_TECH 54 1201#define LMP_COMPID_MOBILIAN_CORP 55 1202#define LMP_COMPID_TERAX 56 1203#define LMP_COMPID_ISSC 57 1204#define LMP_COMPID_MATSUSHITA 58 1205#define LMP_COMPID_GENNUM_CORP 59 1206#define LMP_COMPID_RESEARCH_IN_MOTION 60 1207#define LMP_COMPID_IPEXTREME 61 1208#define LMP_COMPID_SYSTEMS_AND_CHIPS 62 1209#define LMP_COMPID_BLUETOOTH_SIG 63 1210#define LMP_COMPID_SEIKO_EPSON_CORP 64 1211#define LMP_COMPID_ISS_TAIWAN 65 1212#define LMP_COMPID_CONWISE_TECHNOLOGIES 66 1213#define LMP_COMPID_PARROT_SA 67 1214#define LMP_COMPID_SOCKET_COMM 68 1215#define LMP_COMPID_ALTHEROS 69 1216#define LMP_COMPID_MEDIATEK 70 1217#define LMP_COMPID_BLUEGIGA 71 1218#define LMP_COMPID_MARVELL 72 1219#define LMP_COMPID_3DSP_CORP 73 1220#define LMP_COMPID_ACCEL_SEMICONDUCTOR 74 1221#define LMP_COMPID_CONTINENTAL_AUTO 75 1222#define LMP_COMPID_APPLE 76 1223#define LMP_COMPID_STACCATO 77 1224#define LMP_COMPID_AVAGO_TECHNOLOGIES 78 1225#define LMP_COMPID_APT_LTD 79 1226#define LMP_COMPID_SIRF_TECHNOLOGY 80 1227#define LMP_COMPID_TZERO_TECHNOLOGY 81 1228#define LMP_COMPID_J_AND_M_CORP 82 1229#define LMP_COMPID_FREE_2_MOVE 83 1230#define LMP_COMPID_3DIJOY_CORP 84 1231#define LMP_COMPID_PLANTRONICS 85 1232#define LMP_COMPID_SONY_ERICSSON_MOBILE 86 1233#define LMP_COMPID_HARMON_INTL_IND 87 1234#define LMP_COMPID_VIZIO 88 1235#define LMP_COMPID_NORDIC SEMI 89 1236#define LMP_COMPID_EM MICRO 90 1237#define LMP_COMPID_RALINK TECH 91 1238#define LMP_COMPID_BELKIN INC 92 1239#define LMP_COMPID_REALTEK SEMI 93 1240#define LMP_COMPID_STONESTREET ONE 94 1241#define LMP_COMPID_WICENTRIC 95 1242#define LMP_COMPID_RIVIERAWAVES 96 1243#define LMP_COMPID_RDA MICRO 97 1244#define LMP_COMPID_GIBSON GUITARS 98 1245#define LMP_COMPID_MICOMMAND INC 99 1246#define LMP_COMPID_BAND XI 100 1247#define LMP_COMPID_HP COMPANY 101 1248#define LMP_COMPID_9SOLUTIONS OY 102 1249#define LMP_COMPID_GN NETCOM 103 1250#define LMP_COMPID_GENERAL MOTORS 104 1251#define LMP_COMPID_AD ENGINEERING 105 1252#define LMP_COMPID_MINDTREE LTD 106 1253#define LMP_COMPID_POLAR ELECTRO 107 1254#define LMP_COMPID_BEAUTIFUL ENTERPRISE 108 1255#define LMP_COMPID_BRIARTEK 109 1256#define LMP_COMPID_SUMMIT DATA COMM 110 1257#define LMP_COMPID_SOUND ID 111 1258#define LMP_COMPID_MONSTER LLC 112 1259#define LMP_COMPID_CONNECTBLU 113 1260#define LMP_COMPID_MAX_ID 114 /* this is a place holder */ 1261#define LMP_COMPID_INTERNAL 65535 1262 1263#define MAX_LMP_COMPID (LMP_COMPID_MAX_ID) 1264/* 1265** Define the packet types in the packet header, and a couple extra 1266*/ 1267#define PKT_TYPE_NULL 0x00 1268#define PKT_TYPE_POLL 0x01 1269#define PKT_TYPE_FHS 0x02 1270#define PKT_TYPE_DM1 0x03 1271 1272#define PKT_TYPE_DH1 0x04 1273#define PKT_TYPE_HV1 0x05 1274#define PKT_TYPE_HV2 0x06 1275#define PKT_TYPE_HV3 0x07 1276#define PKT_TYPE_DV 0x08 1277#define PKT_TYPE_AUX1 0x09 1278 1279#define PKT_TYPE_DM3 0x0a 1280#define PKT_TYPE_DH3 0x0b 1281 1282#define PKT_TYPE_DM5 0x0e 1283#define PKT_TYPE_DH5 0x0f 1284 1285 1286#define PKT_TYPE_ID 0x10 /* Internally used packet types */ 1287#define PKT_TYPE_BAD 0x11 1288#define PKT_TYPE_NONE 0x12 1289 1290/* 1291** Define packet size 1292*/ 1293#define HCI_DM1_PACKET_SIZE 17 1294#define HCI_DH1_PACKET_SIZE 27 1295#define HCI_DM3_PACKET_SIZE 121 1296#define HCI_DH3_PACKET_SIZE 183 1297#define HCI_DM5_PACKET_SIZE 224 1298#define HCI_DH5_PACKET_SIZE 339 1299#define HCI_AUX1_PACKET_SIZE 29 1300#define HCI_HV1_PACKET_SIZE 10 1301#define HCI_HV2_PACKET_SIZE 20 1302#define HCI_HV3_PACKET_SIZE 30 1303#define HCI_DV_PACKET_SIZE 9 1304#define HCI_EDR2_DH1_PACKET_SIZE 54 1305#define HCI_EDR2_DH3_PACKET_SIZE 367 1306#define HCI_EDR2_DH5_PACKET_SIZE 679 1307#define HCI_EDR3_DH1_PACKET_SIZE 83 1308#define HCI_EDR3_DH3_PACKET_SIZE 552 1309#define HCI_EDR3_DH5_PACKET_SIZE 1021 1310 1311/* 1312** Features encoding - page 0 1313*/ 1314#define HCI_NUM_FEATURE_BYTES 8 1315#define HCI_FEATURES_KNOWN(x) ((x[0] | x[1] | x[2] | x[3] | x[4] | x[5] | x[6] | x[7]) != 0) 1316 1317#define HCI_FEATURE_3_SLOT_PACKETS_MASK 0x01 1318#define HCI_FEATURE_3_SLOT_PACKETS_OFF 0 1319#define HCI_3_SLOT_PACKETS_SUPPORTED(x) ((x)[HCI_FEATURE_3_SLOT_PACKETS_OFF] & HCI_FEATURE_3_SLOT_PACKETS_MASK) 1320 1321#define HCI_FEATURE_5_SLOT_PACKETS_MASK 0x02 1322#define HCI_FEATURE_5_SLOT_PACKETS_OFF 0 1323#define HCI_5_SLOT_PACKETS_SUPPORTED(x) ((x)[HCI_FEATURE_5_SLOT_PACKETS_OFF] & HCI_FEATURE_5_SLOT_PACKETS_MASK) 1324 1325#define HCI_FEATURE_ENCRYPTION_MASK 0x04 1326#define HCI_FEATURE_ENCRYPTION_OFF 0 1327#define HCI_ENCRYPTION_SUPPORTED(x) ((x)[HCI_FEATURE_ENCRYPTION_OFF] & HCI_FEATURE_ENCRYPTION_MASK) 1328 1329#define HCI_FEATURE_SLOT_OFFSET_MASK 0x08 1330#define HCI_FEATURE_SLOT_OFFSET_OFF 0 1331#define HCI_SLOT_OFFSET_SUPPORTED(x) ((x)[HCI_FEATURE_SLOT_OFFSET_OFF] & HCI_FEATURE_SLOT_OFFSET_MASK) 1332 1333#define HCI_FEATURE_TIMING_ACC_MASK 0x10 1334#define HCI_FEATURE_TIMING_ACC_OFF 0 1335#define HCI_TIMING_ACC_SUPPORTED(x) ((x)[HCI_FEATURE_TIMING_ACC_OFF] & HCI_FEATURE_TIMING_ACC_MASK) 1336 1337#define HCI_FEATURE_SWITCH_MASK 0x20 1338#define HCI_FEATURE_SWITCH_OFF 0 1339#define HCI_SWITCH_SUPPORTED(x) ((x)[HCI_FEATURE_SWITCH_OFF] & HCI_FEATURE_SWITCH_MASK) 1340 1341#define HCI_FEATURE_HOLD_MODE_MASK 0x40 1342#define HCI_FEATURE_HOLD_MODE_OFF 0 1343#define HCI_HOLD_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_HOLD_MODE_OFF] & HCI_FEATURE_HOLD_MODE_MASK) 1344 1345#define HCI_FEATURE_SNIFF_MODE_MASK 0x80 1346#define HCI_FEATURE_SNIFF_MODE_OFF 0 1347#define HCI_SNIFF_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_SNIFF_MODE_OFF] & HCI_FEATURE_SNIFF_MODE_MASK) 1348 1349#define HCI_FEATURE_PARK_MODE_MASK 0x01 1350#define HCI_FEATURE_PARK_MODE_OFF 1 1351#define HCI_PARK_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_PARK_MODE_OFF] & HCI_FEATURE_PARK_MODE_MASK) 1352 1353#define HCI_FEATURE_RSSI_MASK 0x02 1354#define HCI_FEATURE_RSSI_OFF 1 1355#define HCI_RSSI_SUPPORTED(x) ((x)[HCI_FEATURE_RSSI_OFF] & HCI_FEATURE_RSSI_MASK) 1356 1357#define HCI_FEATURE_CQM_DATA_RATE_MASK 0x04 1358#define HCI_FEATURE_CQM_DATA_RATE_OFF 1 1359#define HCI_CQM_DATA_RATE_SUPPORTED(x) ((x)[HCI_FEATURE_CQM_DATA_RATE_OFF] & HCI_FEATURE_CQM_DATA_RATE_MASK) 1360 1361#define HCI_FEATURE_SCO_LINK_MASK 0x08 1362#define HCI_FEATURE_SCO_LINK_OFF 1 1363#define HCI_SCO_LINK_SUPPORTED(x) ((x)[HCI_FEATURE_SCO_LINK_OFF] & HCI_FEATURE_SCO_LINK_MASK) 1364 1365#define HCI_FEATURE_HV2_PACKETS_MASK 0x10 1366#define HCI_FEATURE_HV2_PACKETS_OFF 1 1367#define HCI_HV2_PACKETS_SUPPORTED(x) ((x)[HCI_FEATURE_HV2_PACKETS_OFF] & HCI_FEATURE_HV2_PACKETS_MASK) 1368 1369#define HCI_FEATURE_HV3_PACKETS_MASK 0x20 1370#define HCI_FEATURE_HV3_PACKETS_OFF 1 1371#define HCI_HV3_PACKETS_SUPPORTED(x) ((x)[HCI_FEATURE_HV3_PACKETS_OFF] & HCI_FEATURE_HV3_PACKETS_MASK) 1372 1373#define HCI_FEATURE_U_LAW_MASK 0x40 1374#define HCI_FEATURE_U_LAW_OFF 1 1375#define HCI_LMP_U_LAW_SUPPORTED(x) ((x)[HCI_FEATURE_U_LAW_OFF] & HCI_FEATURE_U_LAW_MASK) 1376 1377#define HCI_FEATURE_A_LAW_MASK 0x80 1378#define HCI_FEATURE_A_LAW_OFF 1 1379#define HCI_LMP_A_LAW_SUPPORTED(x) ((x)[HCI_FEATURE_A_LAW_OFF] & HCI_FEATURE_A_LAW_MASK) 1380 1381#define HCI_FEATURE_CVSD_MASK 0x01 1382#define HCI_FEATURE_CVSD_OFF 2 1383#define HCI_LMP_CVSD_SUPPORTED(x) ((x)[HCI_FEATURE_CVSD_OFF] & HCI_FEATURE_CVSD_MASK) 1384 1385#define HCI_FEATURE_PAGING_SCHEME_MASK 0x02 1386#define HCI_FEATURE_PAGING_SCHEME_OFF 2 1387#define HCI_PAGING_SCHEME_SUPPORTED(x) ((x)[HCI_FEATURE_PAGING_SCHEME_OFF] & HCI_FEATURE_PAGING_SCHEME_MASK) 1388 1389#define HCI_FEATURE_POWER_CTRL_MASK 0x04 1390#define HCI_FEATURE_POWER_CTRL_OFF 2 1391#define HCI_POWER_CTRL_SUPPORTED(x) ((x)[HCI_FEATURE_POWER_CTRL_OFF] & HCI_FEATURE_POWER_CTRL_MASK) 1392 1393#define HCI_FEATURE_TRANSPNT_MASK 0x08 1394#define HCI_FEATURE_TRANSPNT_OFF 2 1395#define HCI_LMP_TRANSPNT_SUPPORTED(x) ((x)[HCI_FEATURE_TRANSPNT_OFF] & HCI_FEATURE_TRANSPNT_MASK) 1396 1397#define HCI_FEATURE_FLOW_CTRL_LAG_MASK 0x70 1398#define HCI_FEATURE_FLOW_CTRL_LAG_OFF 2 1399#define HCI_FLOW_CTRL_LAG_VALUE(x) (((x)[HCI_FEATURE_FLOW_CTRL_LAG_OFF] & HCI_FEATURE_FLOW_CTRL_LAG_MASK) >> 4) 1400 1401#define HCI_FEATURE_BROADCAST_ENC_MASK 0x80 1402#define HCI_FEATURE_BROADCAST_ENC_OFF 2 1403#define HCI_LMP_BCAST_ENC_SUPPORTED(x) ((x)[HCI_FEATURE_BROADCAST_ENC_OFF] & HCI_FEATURE_BROADCAST_ENC_MASK) 1404 1405#define HCI_FEATURE_SCATTER_MODE_MASK 0x01 1406#define HCI_FEATURE_SCATTER_MODE_OFF 3 1407#define HCI_LMP_SCATTER_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_SCATTER_MODE_OFF] & HCI_FEATURE_SCATTER_MODE_MASK) 1408 1409#define HCI_FEATURE_EDR_ACL_2MPS_MASK 0x02 1410#define HCI_FEATURE_EDR_ACL_2MPS_OFF 3 1411#define HCI_EDR_ACL_2MPS_SUPPORTED(x) ((x)[HCI_FEATURE_EDR_ACL_2MPS_OFF] & HCI_FEATURE_EDR_ACL_2MPS_MASK) 1412 1413#define HCI_FEATURE_EDR_ACL_3MPS_MASK 0x04 1414#define HCI_FEATURE_EDR_ACL_3MPS_OFF 3 1415#define HCI_EDR_ACL_3MPS_SUPPORTED(x) ((x)[HCI_FEATURE_EDR_ACL_3MPS_OFF] & HCI_FEATURE_EDR_ACL_3MPS_MASK) 1416 1417#define HCI_FEATURE_ENHANCED_INQ_MASK 0x08 1418#define HCI_FEATURE_ENHANCED_INQ_OFF 3 1419#define HCI_ENHANCED_INQ_SUPPORTED(x) ((x)[HCI_FEATURE_ENHANCED_INQ_OFF] & HCI_FEATURE_ENHANCED_INQ_MASK) 1420 1421#define HCI_FEATURE_INTERLACED_INQ_SCAN_MASK 0x10 1422#define HCI_FEATURE_INTERLACED_INQ_SCAN_OFF 3 1423#define HCI_LMP_INTERLACED_INQ_SCAN_SUPPORTED(x) ((x)[HCI_FEATURE_INTERLACED_INQ_SCAN_OFF] & HCI_FEATURE_INTERLACED_INQ_SCAN_MASK) 1424 1425#define HCI_FEATURE_INTERLACED_PAGE_SCAN_MASK 0x20 1426#define HCI_FEATURE_INTERLACED_PAGE_SCAN_OFF 3 1427#define HCI_LMP_INTERLACED_PAGE_SCAN_SUPPORTED(x) ((x)[HCI_FEATURE_INTERLACED_PAGE_SCAN_OFF] & HCI_FEATURE_INTERLACED_PAGE_SCAN_MASK) 1428 1429#define HCI_FEATURE_INQ_RSSI_MASK 0x40 1430#define HCI_FEATURE_INQ_RSSI_OFF 3 1431#define HCI_LMP_INQ_RSSI_SUPPORTED(x) ((x)[HCI_FEATURE_INQ_RSSI_OFF] & HCI_FEATURE_INQ_RSSI_MASK) 1432 1433#define HCI_FEATURE_ESCO_EV3_MASK 0x80 1434#define HCI_FEATURE_ESCO_EV3_OFF 3 1435#define HCI_ESCO_EV3_SUPPORTED(x) ((x)[HCI_FEATURE_ESCO_EV3_OFF] & HCI_FEATURE_ESCO_EV3_MASK) 1436 1437#define HCI_FEATURE_ESCO_EV4_MASK 0x01 1438#define HCI_FEATURE_ESCO_EV4_OFF 4 1439#define HCI_ESCO_EV4_SUPPORTED(x) ((x)[HCI_FEATURE_ESCO_EV4_OFF] & HCI_FEATURE_ESCO_EV4_MASK) 1440 1441#define HCI_FEATURE_ESCO_EV5_MASK 0x02 1442#define HCI_FEATURE_ESCO_EV5_OFF 4 1443#define HCI_ESCO_EV5_SUPPORTED(x) ((x)[HCI_FEATURE_ESCO_EV5_OFF] & HCI_FEATURE_ESCO_EV5_MASK) 1444 1445#define HCI_FEATURE_ABSENCE_MASKS_MASK 0x04 1446#define HCI_FEATURE_ABSENCE_MASKS_OFF 4 1447#define HCI_LMP_ABSENCE_MASKS_SUPPORTED(x) ((x)[HCI_FEATURE_ABSENCE_MASKS_OFF] & HCI_FEATURE_ABSENCE_MASKS_MASK) 1448 1449#define HCI_FEATURE_AFH_CAP_SLAVE_MASK 0x08 1450#define HCI_FEATURE_AFH_CAP_SLAVE_OFF 4 1451#define HCI_LMP_AFH_CAP_SLAVE_SUPPORTED(x) ((x)[HCI_FEATURE_AFH_CAP_SLAVE_OFF] & HCI_FEATURE_AFH_CAP_SLAVE_MASK) 1452 1453#define HCI_FEATURE_AFH_CLASS_SLAVE_MASK 0x10 1454#define HCI_FEATURE_AFH_CLASS_SLAVE_OFF 4 1455#define HCI_LMP_AFH_CLASS_SLAVE_SUPPORTED(x) ((x)[HCI_FEATURE_AFH_CLASS_SLAVE_OFF] & HCI_FEATURE_AFH_CLASS_SLAVE_MASK) 1456 1457#define HCI_FEATURE_ALIAS_AUTH_MASK 0x20 1458#define HCI_FEATURE_ALIAS_AUTH_OFF 4 1459#define HCI_LMP_ALIAS_AUTH_SUPPORTED(x) ((x)[HCI_FEATURE_ALIAS_AUTH_OFF] & HCI_FEATURE_ALIAS_AUTH_MASK) 1460 1461#define HCI_FEATURE_ANON_MODE_MASK 0x40 1462#define HCI_FEATURE_ANON_MODE_OFF 4 1463#define HCI_LMP_ANON_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_ANON_MODE_OFF] & HCI_FEATURE_ANON_MODE_MASK) 1464 1465#define HCI_FEATURE_3_SLOT_EDR_ACL_MASK 0x80 1466#define HCI_FEATURE_3_SLOT_EDR_ACL_OFF 4 1467#define HCI_3_SLOT_EDR_ACL_SUPPORTED(x) ((x)[HCI_FEATURE_3_SLOT_EDR_ACL_OFF] & HCI_FEATURE_3_SLOT_EDR_ACL_MASK) 1468 1469#define HCI_FEATURE_5_SLOT_EDR_ACL_MASK 0x01 1470#define HCI_FEATURE_5_SLOT_EDR_ACL_OFF 5 1471#define HCI_5_SLOT_EDR_ACL_SUPPORTED(x) ((x)[HCI_FEATURE_5_SLOT_EDR_ACL_OFF] & HCI_FEATURE_5_SLOT_EDR_ACL_MASK) 1472 1473#define HCI_FEATURE_SNIFF_SUB_RATE_MASK 0x02 1474#define HCI_FEATURE_SNIFF_SUB_RATE_OFF 5 1475#define HCI_SNIFF_SUB_RATE_SUPPORTED(x) ((x)[HCI_FEATURE_SNIFF_SUB_RATE_OFF] & HCI_FEATURE_SNIFF_SUB_RATE_MASK) 1476 1477#define HCI_FEATURE_ATOMIC_ENCRYPT_MASK 0x04 1478#define HCI_FEATURE_ATOMIC_ENCRYPT_OFF 5 1479#define HCI_ATOMIC_ENCRYPT_SUPPORTED(x) ((x)[HCI_FEATURE_ATOMIC_ENCRYPT_OFF] & HCI_FEATURE_ATOMIC_ENCRYPT_MASK) 1480 1481#define HCI_FEATURE_AFH_CAP_MASTR_MASK 0x08 1482#define HCI_FEATURE_AFH_CAP_MASTR_OFF 5 1483#define HCI_LMP_AFH_CAP_MASTR_SUPPORTED(x) ((x)[HCI_FEATURE_AFH_CAP_MASTR_OFF] & HCI_FEATURE_AFH_CAP_MASTR_MASK) 1484 1485#define HCI_FEATURE_AFH_CLASS_MASTR_MASK 0x10 1486#define HCI_FEATURE_AFH_CLASS_MASTR_OFF 5 1487#define HCI_LMP_AFH_CLASS_MASTR_SUPPORTED(x) ((x)[HCI_FEATURE_AFH_CLASS_MASTR_OFF] & HCI_FEATURE_AFH_CLASS_MASTR_MASK) 1488 1489#define HCI_FEATURE_EDR_ESCO_2MPS_MASK 0x20 1490#define HCI_FEATURE_EDR_ESCO_2MPS_OFF 5 1491#define HCI_EDR_ESCO_2MPS_SUPPORTED(x) ((x)[HCI_FEATURE_EDR_ESCO_2MPS_OFF] & HCI_FEATURE_EDR_ESCO_2MPS_MASK) 1492 1493#define HCI_FEATURE_EDR_ESCO_3MPS_MASK 0x40 1494#define HCI_FEATURE_EDR_ESCO_3MPS_OFF 5 1495#define HCI_EDR_ESCO_3MPS_SUPPORTED(x) ((x)[HCI_FEATURE_EDR_ESCO_3MPS_OFF] & HCI_FEATURE_EDR_ESCO_3MPS_MASK) 1496 1497#define HCI_FEATURE_3_SLOT_EDR_ESCO_MASK 0x80 1498#define HCI_FEATURE_3_SLOT_EDR_ESCO_OFF 5 1499#define HCI_3_SLOT_EDR_ESCO_SUPPORTED(x) ((x)[HCI_FEATURE_3_SLOT_EDR_ESCO_OFF] & HCI_FEATURE_3_SLOT_EDR_ESCO_MASK) 1500 1501#define HCI_FEATURE_EXT_INQ_RSP_MASK 0x01 1502#define HCI_FEATURE_EXT_INQ_RSP_OFF 6 1503#define HCI_EXT_INQ_RSP_SUPPORTED(x) ((x)[HCI_FEATURE_EXT_INQ_RSP_OFF] & HCI_FEATURE_EXT_INQ_RSP_MASK) 1504 1505#define HCI_FEATURE_ANUM_PIN_AWARE_MASK 0x02 1506#define HCI_FEATURE_ANUM_PIN_AWARE_OFF 6 1507#define HCI_ANUM_PIN_AWARE_SUPPORTED(x) ((x)[HCI_FEATURE_ANUM_PIN_AWARE_OFF] & HCI_FEATURE_ANUM_PIN_AWARE_MASK) 1508 1509#define HCI_FEATURE_ANUM_PIN_CAP_MASK 0x04 1510#define HCI_FEATURE_ANUM_PIN_CAP_OFF 6 1511#define HCI_ANUM_PIN_CAP_SUPPORTED(x) ((x)[HCI_FEATURE_ANUM_PIN_CAP_OFF] & HCI_FEATURE_ANUM_PIN_CAP_MASK) 1512 1513#define HCI_FEATURE_SIMPLE_PAIRING_MASK 0x08 1514#define HCI_FEATURE_SIMPLE_PAIRING_OFF 6 1515#define HCI_SIMPLE_PAIRING_SUPPORTED(x) ((x)[HCI_FEATURE_SIMPLE_PAIRING_OFF] & HCI_FEATURE_SIMPLE_PAIRING_MASK) 1516 1517#define HCI_FEATURE_ENCAP_PDU_MASK 0x10 1518#define HCI_FEATURE_ENCAP_PDU_OFF 6 1519#define HCI_ENCAP_PDU_SUPPORTED(x) ((x)[HCI_FEATURE_ENCAP_PDU_OFF] & HCI_FEATURE_ENCAP_PDU_MASK) 1520 1521#define HCI_FEATURE_ERROR_DATA_MASK 0x20 1522#define HCI_FEATURE_ERROR_DATA_OFF 6 1523#define HCI_ERROR_DATA_SUPPORTED(x) ((x)[HCI_FEATURE_ERROR_DATA_OFF] & HCI_FEATURE_ERROR_DATA_MASK) 1524 1525#define HCI_FEATURE_NON_FLUSHABLE_PB_MASK 0x40 1526#define HCI_FEATURE_NON_FLUSHABLE_PB_OFF 6 1527#define HCI_NON_FLUSHABLE_PB_SUPPORTED(x) ((x)[HCI_FEATURE_NON_FLUSHABLE_PB_OFF] & HCI_FEATURE_NON_FLUSHABLE_PB_MASK) 1528 1529#define HCI_FEATURE_LINK_SUP_TO_EVT_MASK 0x01 1530#define HCI_FEATURE_LINK_SUP_TO_EVT_OFF 7 1531#define HCI_LINK_SUP_TO_EVT_SUPPORTED(x) ((x)[HCI_FEATURE_LINK_SUP_TO_EVT_OFF] & HCI_FEATURE_LINK_SUP_TO_EVT_MASK) 1532 1533#define HCI_FEATURE_INQ_RESP_TX_MASK 0x02 1534#define HCI_FEATURE_INQ_RESP_TX_OFF 7 1535#define HCI_INQ_RESP_TX_SUPPORTED(x) ((x)[HCI_FEATURE_INQ_RESP_TX_OFF] & HCI_FEATURE_INQ_RESP_TX_MASK) 1536 1537#define HCI_FEATURE_EXTENDED_MASK 0x80 1538#define HCI_FEATURE_EXTENDED_OFF 7 1539#define HCI_LMP_EXTENDED_SUPPORTED(x) ((x)[HCI_FEATURE_EXTENDED_OFF] & HCI_FEATURE_EXTENDED_MASK) 1540 1541/* 1542** Features encoding - page 1 1543*/ 1544#define HCI_EXT_FEATURE_SSP_HOST_MASK 0x01 1545#define HCI_EXT_FEATURE_SSP_HOST_OFF 0 1546#define HCI_SSP_HOST_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SSP_HOST_OFF] & HCI_EXT_FEATURE_SSP_HOST_MASK) 1547 1548/* 1549** Local Supported Commands encoding 1550*/ 1551#define HCI_NUM_SUPP_COMMANDS_BYTES 64 1552 1553#define HCI_SUPP_COMMANDS_INQUIRY_MASK 0x01 1554#define HCI_SUPP_COMMANDS_INQUIRY_OFF 0 1555#define HCI_INQUIRY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_INQUIRY_OFF] & HCI_SUPP_COMMANDS_INQUIRY_MASK) 1556 1557#define HCI_SUPP_COMMANDS_INQUIRY_CANCEL_MASK 0x02 1558#define HCI_SUPP_COMMANDS_INQUIRY_CANCEL_OFF 0 1559#define HCI_INQUIRY_CANCEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_INQUIRY_CANCEL_OFF] & HCI_SUPP_COMMANDS_INQUIRY_CANCEL_MASK) 1560 1561#define HCI_SUPP_COMMANDS_PERIODIC_INQUIRY_MASK 0x04 1562#define HCI_SUPP_COMMANDS_PERIODIC_INQUIRY_OFF 0 1563#define HCI_PERIODIC_INQUIRY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_PERIODIC_INQUIRY_OFF] & HCI_SUPP_COMMANDS_PERIODIC_INQUIRY_MASK) 1564 1565#define HCI_SUPP_COMMANDS_EXIT_PERIODIC_INQUIRY_MASK 0x08 1566#define HCI_SUPP_COMMANDS_EXIT_PERIODIC_INQUIRY_OFF 0 1567#define HCI_EXIT_PERIODIC_INQUIRY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_EXIT_PERIODIC_INQUIRY_OFF] & HCI_SUPP_COMMANDS_EXIT_PERIODIC_INQUIRY_MASK) 1568 1569#define HCI_SUPP_COMMANDS_CREATE_CONN_MASK 0x10 1570#define HCI_SUPP_COMMANDS_CREATE_CONN_OFF 0 1571#define HCI_CREATE_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CREATE_CONN_OFF] & HCI_SUPP_COMMANDS_CREATE_CONN_MASK) 1572 1573#define HCI_SUPP_COMMANDS_DISCONNECT_MASK 0x20 1574#define HCI_SUPP_COMMANDS_DISCONNECT_OFF 0 1575#define HCI_DISCONNECT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DISCONNECT_OFF] & HCI_SUPP_COMMANDS_DISCONNECT_MASK) 1576 1577#define HCI_SUPP_COMMANDS_ADD_SCO_CONN_MASK 0x40 1578#define HCI_SUPP_COMMANDS_ADD_SCO_CONN_OFF 0 1579#define HCI_ADD_SCO_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ADD_SCO_CONN_OFF] & HCI_SUPP_COMMANDS_ADD_SCO_CONN_MASK) 1580 1581#define HCI_SUPP_COMMANDS_CANCEL_CREATE_CONN_MASK 0x80 1582#define HCI_SUPP_COMMANDS_CANCEL_CREATE_CONN_OFF 0 1583#define HCI_CANCEL_CREATE_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CANCEL_CREATE_CONN_OFF] & HCI_SUPP_COMMANDS_CANCEL_CREATE_CONN_MASK) 1584 1585#define HCI_SUPP_COMMANDS_ACCEPT_CONN_REQUEST_MASK 0x01 1586#define HCI_SUPP_COMMANDS_ACCEPT_CONN_REQUEST_OFF 1 1587#define HCI_ACCEPT_CONN_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ACCEPT_CONN_REQUEST_OFF] & HCI_SUPP_COMMANDS_ACCEPT_CONN_REQUEST_MASK) 1588 1589#define HCI_SUPP_COMMANDS_REJECT_CONN_REQUEST_MASK 0x02 1590#define HCI_SUPP_COMMANDS_REJECT_CONN_REQUEST_OFF 1 1591#define HCI_REJECT_CONN_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REJECT_CONN_REQUEST_OFF] & HCI_SUPP_COMMANDS_REJECT_CONN_REQUEST_MASK) 1592 1593#define HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_REPLY_MASK 0x04 1594#define HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_REPLY_OFF 1 1595#define HCI_LINK_KEY_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_REPLY_MASK) 1596 1597#define HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_NEG_REPLY_MASK 0x08 1598#define HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_NEG_REPLY_OFF 1 1599#define HCI_LINK_KEY_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_NEG_REPLY_MASK) 1600 1601#define HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_REPLY_MASK 0x10 1602#define HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_REPLY_OFF 1 1603#define HCI_PIN_CODE_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_REPLY_MASK) 1604 1605#define HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_NEG_REPLY_MASK 0x20 1606#define HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_NEG_REPLY_OFF 1 1607#define HCI_PIN_CODE_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_NEG_REPLY_MASK) 1608 1609#define HCI_SUPP_COMMANDS_CHANGE_CONN_PKT_TYPE_MASK 0x40 1610#define HCI_SUPP_COMMANDS_CHANGE_CONN_PKT_TYPE_OFF 1 1611#define HCI_CHANGE_CONN_PKT_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CHANGE_CONN_PKT_TYPE_OFF] & HCI_SUPP_COMMANDS_CHANGE_CONN_PKT_TYPE_MASK) 1612 1613#define HCI_SUPP_COMMANDS_AUTH_REQUEST_MASK 0x80 1614#define HCI_SUPP_COMMANDS_AUTH_REQUEST_OFF 1 1615#define HCI_AUTH_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_AUTH_REQUEST_OFF] & HCI_SUPP_COMMANDS_AUTH_REQUEST_MASK) 1616 1617#define HCI_SUPP_COMMANDS_SET_CONN_ENCRYPTION_MASK 0x01 1618#define HCI_SUPP_COMMANDS_SET_CONN_ENCRYPTION_OFF 2 1619#define HCI_SET_CONN_ENCRYPTION_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_CONN_ENCRYPTION_OFF] & HCI_SUPP_COMMANDS_SET_CONN_ENCRYPTION_MASK) 1620 1621#define HCI_SUPP_COMMANDS_CHANGE_CONN_LINK_KEY_MASK 0x02 1622#define HCI_SUPP_COMMANDS_CHANGE_CONN_LINK_KEY_OFF 2 1623#define HCI_CHANGE_CONN_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CHANGE_CONN_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_CHANGE_CONN_LINK_KEY_MASK) 1624 1625#define HCI_SUPP_COMMANDS_MASTER_LINK_KEY_MASK 0x04 1626#define HCI_SUPP_COMMANDS_MASTER_LINK_KEY_OFF 2 1627#define HCI_MASTER_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_MASTER_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_MASTER_LINK_KEY_MASK) 1628 1629#define HCI_SUPP_COMMANDS_REMOTE_NAME_REQUEST_MASK 0x08 1630#define HCI_SUPP_COMMANDS_REMOTE_NAME_REQUEST_OFF 2 1631#define HCI_REMOTE_NAME_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REMOTE_NAME_REQUEST_OFF] & HCI_SUPP_COMMANDS_REMOTE_NAME_REQUEST_MASK) 1632 1633#define HCI_SUPP_COMMANDS_CANCEL_REMOTE_NAME_REQUEST_MASK 0x10 1634#define HCI_SUPP_COMMANDS_CANCEL_REMOTE_NAME_REQUEST_OFF 2 1635#define HCI_CANCEL_REMOTE_NAME_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CANCEL_REMOTE_NAME_REQUEST_OFF] & HCI_SUPP_COMMANDS_CANCEL_REMOTE_NAME_REQUEST_MASK) 1636 1637#define HCI_SUPP_COMMANDS_READ_REMOTE_SUPP_FEATURES_MASK 0x20 1638#define HCI_SUPP_COMMANDS_READ_REMOTE_SUPP_FEATURES_OFF 2 1639#define HCI_READ_REMOTE_SUPP_FEATURES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_REMOTE_SUPP_FEATURES_OFF] & HCI_SUPP_COMMANDS_READ_REMOTE_SUPP_FEATURES_MASK) 1640 1641#define HCI_SUPP_COMMANDS_READ_REMOTE_EXT_FEATURES_MASK 0x40 1642#define HCI_SUPP_COMMANDS_READ_REMOTE_EXT_FEATURES_OFF 2 1643#define HCI_READ_REMOTE_EXT_FEATURES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_REMOTE_EXT_FEATURES_OFF] & HCI_SUPP_COMMANDS_READ_REMOTE_EXT_FEATURES_MASK) 1644 1645#define HCI_SUPP_COMMANDS_READ_REMOTE_VER_INFO_MASK 0x80 1646#define HCI_SUPP_COMMANDS_READ_REMOTE_VER_INFO_OFF 2 1647#define HCI_READ_REMOTE_VER_INFO_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_REMOTE_VER_INFO_OFF] & HCI_SUPP_COMMANDS_READ_REMOTE_VER_INFO_MASK) 1648 1649#define HCI_SUPP_COMMANDS_READ_CLOCK_OFFSET_MASK 0x01 1650#define HCI_SUPP_COMMANDS_READ_CLOCK_OFFSET_OFF 3 1651#define HCI_READ_CLOCK_OFFSET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_CLOCK_OFFSET_OFF] & HCI_SUPP_COMMANDS_READ_CLOCK_OFFSET_MASK) 1652 1653#define HCI_SUPP_COMMANDS_READ_LMP_HANDLE_MASK 0x02 1654#define HCI_SUPP_COMMANDS_READ_LMP_HANDLE_OFF 3 1655#define HCI_READ_LMP_HANDLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LMP_HANDLE_OFF] & HCI_SUPP_COMMANDS_READ_LMP_HANDLE_MASK) 1656 1657#define HCI_SUPP_COMMANDS_HOLD_MODE_CMD_MASK 0x02 1658#define HCI_SUPP_COMMANDS_HOLD_MODE_CMD_OFF 4 1659#define HCI_HOLD_MODE_CMD_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_HOLD_MODE_CMD_OFF] & HCI_SUPP_COMMANDS_HOLD_MODE_CMD_MASK) 1660 1661#define HCI_SUPP_COMMANDS_SNIFF_MODE_CMD_MASK 0x04 1662#define HCI_SUPP_COMMANDS_SNIFF_MODE_CMD_OFF 4 1663#define HCI_SNIFF_MODE_CMD_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SNIFF_MODE_CMD_OFF] & HCI_SUPP_COMMANDS_SNIFF_MODE_CMD_MASK) 1664 1665#define HCI_SUPP_COMMANDS_EXIT_SNIFF_MODE_MASK 0x08 1666#define HCI_SUPP_COMMANDS_EXIT_SNIFF_MODE_OFF 4 1667#define HCI_EXIT_SNIFF_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_EXIT_SNIFF_MODE_OFF] & HCI_SUPP_COMMANDS_EXIT_SNIFF_MODE_MASK) 1668 1669#define HCI_SUPP_COMMANDS_PARK_STATE_MASK 0x10 1670#define HCI_SUPP_COMMANDS_PARK_STATE_OFF 4 1671#define HCI_PARK_STATE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_PARK_STATE_OFF] & HCI_SUPP_COMMANDS_PARK_STATE_MASK) 1672 1673#define HCI_SUPP_COMMANDS_EXIT_PARK_STATE_MASK 0x20 1674#define HCI_SUPP_COMMANDS_EXIT_PARK_STATE_OFF 4 1675#define HCI_EXIT_PARK_STATE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_EXIT_PARK_STATE_OFF] & HCI_SUPP_COMMANDS_EXIT_PARK_STATE_MASK) 1676 1677#define HCI_SUPP_COMMANDS_QOS_SETUP_MASK 0x40 1678#define HCI_SUPP_COMMANDS_QOS_SETUP_OFF 4 1679#define HCI_QOS_SETUP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_QOS_SETUP_OFF] & HCI_SUPP_COMMANDS_QOS_SETUP_MASK) 1680 1681#define HCI_SUPP_COMMANDS_ROLE_DISCOVERY_MASK 0x80 1682#define HCI_SUPP_COMMANDS_ROLE_DISCOVERY_OFF 4 1683#define HCI_ROLE_DISCOVERY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ROLE_DISCOVERY_OFF] & HCI_SUPP_COMMANDS_ROLE_DISCOVERY_MASK) 1684 1685#define HCI_SUPP_COMMANDS_SWITCH_ROLE_MASK 0x01 1686#define HCI_SUPP_COMMANDS_SWITCH_ROLE_OFF 5 1687#define HCI_SWITCH_ROLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SWITCH_ROLE_OFF] & HCI_SUPP_COMMANDS_SWITCH_ROLE_MASK) 1688 1689#define HCI_SUPP_COMMANDS_READ_LINK_POLICY_SET_MASK 0x02 1690#define HCI_SUPP_COMMANDS_READ_LINK_POLICY_SET_OFF 5 1691#define HCI_READ_LINK_POLICY_SET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LINK_POLICY_SET_OFF] & HCI_SUPP_COMMANDS_READ_LINK_POLICY_SET_MASK) 1692 1693#define HCI_SUPP_COMMANDS_WRITE_LINK_POLICY_SET_MASK 0x04 1694#define HCI_SUPP_COMMANDS_WRITE_LINK_POLICY_SET_OFF 5 1695#define HCI_WRITE_LINK_POLICY_SET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LINK_POLICY_SET_OFF] & HCI_SUPP_COMMANDS_WRITE_LINK_POLICY_SET_MASK) 1696 1697#define HCI_SUPP_COMMANDS_READ_DEF_LINK_POLICY_SET_MASK 0x08 1698#define HCI_SUPP_COMMANDS_READ_DEF_LINK_POLICY_SET_OFF 5 1699#define HCI_READ_DEF_LINK_POLICY_SET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_DEF_LINK_POLICY_SET_OFF] & HCI_SUPP_COMMANDS_READ_DEF_LINK_POLICY_SET_MASK) 1700 1701#define HCI_SUPP_COMMANDS_WRITE_DEF_LINK_POLICY_SET_MASK 0x10 1702#define HCI_SUPP_COMMANDS_WRITE_DEF_LINK_POLICY_SET_OFF 5 1703#define HCI_WRITE_DEF_LINK_POLICY_SET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_DEF_LINK_POLICY_SET_OFF] & HCI_SUPP_COMMANDS_WRITE_DEF_LINK_POLICY_SET_MASK) 1704 1705#define HCI_SUPP_COMMANDS_FLOW_SPECIFICATION_MASK 0x20 1706#define HCI_SUPP_COMMANDS_FLOW_SPECIFICATION_OFF 5 1707#define HCI_FLOW_SPECIFICATION_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_FLOW_SPECIFICATION_OFF] & HCI_SUPP_COMMANDS_FLOW_SPECIFICATION_MASK) 1708 1709#define HCI_SUPP_COMMANDS_SET_EVENT_MASK_MASK 0x40 1710#define HCI_SUPP_COMMANDS_SET_EVENT_MASK_OFF 5 1711#define HCI_SET_EVENT_MASK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_EVENT_MASK_OFF] & HCI_SUPP_COMMANDS_SET_EVENT_MASK_MASK) 1712 1713#define HCI_SUPP_COMMANDS_RESET_MASK 0x80 1714#define HCI_SUPP_COMMANDS_RESET_OFF 5 1715#define HCI_RESET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_RESET_OFF] & HCI_SUPP_COMMANDS_RESET_MASK) 1716 1717#define HCI_SUPP_COMMANDS_SET_EVENT_FILTER_MASK 0x01 1718#define HCI_SUPP_COMMANDS_SET_EVENT_FILTER_OFF 6 1719#define HCI_SET_EVENT_FILTER_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_EVENT_FILTER_OFF] & HCI_SUPP_COMMANDS_SET_EVENT_FILTER_MASK) 1720 1721#define HCI_SUPP_COMMANDS_FLUSH_MASK 0x02 1722#define HCI_SUPP_COMMANDS_FLUSH_OFF 6 1723#define HCI_FLUSH_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_FLUSH_OFF] & HCI_SUPP_COMMANDS_FLUSH_MASK) 1724 1725#define HCI_SUPP_COMMANDS_READ_PIN_TYPE_MASK 0x04 1726#define HCI_SUPP_COMMANDS_READ_PIN_TYPE_OFF 6 1727#define HCI_READ_PIN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PIN_TYPE_OFF] & HCI_SUPP_COMMANDS_READ_PIN_TYPE_MASK) 1728 1729#define HCI_SUPP_COMMANDS_WRITE_PIN_TYPE_MASK 0x08 1730#define HCI_SUPP_COMMANDS_WRITE_PIN_TYPE_OFF 6 1731#define HCI_WRITE_PIN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PIN_TYPE_OFF] & HCI_SUPP_COMMANDS_WRITE_PIN_TYPE_MASK) 1732 1733#define HCI_SUPP_COMMANDS_CREATE_NEW_UNIT_KEY_MASK 0x10 1734#define HCI_SUPP_COMMANDS_CREATE_NEW_UNIT_KEY_OFF 6 1735#define HCI_CREATE_NEW_UNIT_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CREATE_NEW_UNIT_KEY_OFF] & HCI_SUPP_COMMANDS_CREATE_NEW_UNIT_KEY_MASK) 1736 1737#define HCI_SUPP_COMMANDS_READ_STORED_LINK_KEY_MASK 0x20 1738#define HCI_SUPP_COMMANDS_READ_STORED_LINK_KEY_OFF 6 1739#define HCI_READ_STORED_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_STORED_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_READ_STORED_LINK_KEY_MASK) 1740 1741#define HCI_SUPP_COMMANDS_WRITE_STORED_LINK_KEY_MASK 0x40 1742#define HCI_SUPP_COMMANDS_WRITE_STORED_LINK_KEY_OFF 6 1743#define HCI_WRITE_STORED_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_STORED_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_WRITE_STORED_LINK_KEY_MASK) 1744 1745#define HCI_SUPP_COMMANDS_DELETE_STORED_LINK_KEY_MASK 0x80 1746#define HCI_SUPP_COMMANDS_DELETE_STORED_LINK_KEY_OFF 6 1747#define HCI_DELETE_STORED_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DELETE_STORED_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_DELETE_STORED_LINK_KEY_MASK) 1748 1749#define HCI_SUPP_COMMANDS_WRITE_LOCAL_NAME_MASK 0x01 1750#define HCI_SUPP_COMMANDS_WRITE_LOCAL_NAME_OFF 7 1751#define HCI_WRITE_LOCAL_NAME_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LOCAL_NAME_OFF] & HCI_SUPP_COMMANDS_WRITE_LOCAL_NAME_MASK) 1752 1753#define HCI_SUPP_COMMANDS_READ_LOCAL_NAME_MASK 0x02 1754#define HCI_SUPP_COMMANDS_READ_LOCAL_NAME_OFF 7 1755#define HCI_READ_LOCAL_NAME_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_NAME_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_NAME_MASK) 1756 1757#define HCI_SUPP_COMMANDS_READ_CONN_ACCEPT_TOUT_MASK 0x04 1758#define HCI_SUPP_COMMANDS_READ_CONN_ACCEPT_TOUT_OFF 7 1759#define HCI_READ_CONN_ACCEPT_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_CONN_ACCEPT_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_CONN_ACCEPT_TOUT_MASK) 1760 1761#define HCI_SUPP_COMMANDS_WRITE_CONN_ACCEPT_TOUT_MASK 0x08 1762#define HCI_SUPP_COMMANDS_WRITE_CONN_ACCEPT_TOUT_OFF 7 1763#define HCI_WRITE_CONN_ACCEPT_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_CONN_ACCEPT_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_CONN_ACCEPT_TOUT_MASK) 1764 1765#define HCI_SUPP_COMMANDS_READ_PAGE_TOUT_MASK 0x10 1766#define HCI_SUPP_COMMANDS_READ_PAGE_TOUT_OFF 7 1767#define HCI_READ_PAGE_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_TOUT_MASK) 1768 1769#define HCI_SUPP_COMMANDS_WRITE_PAGE_TOUT_MASK 0x20 1770#define HCI_SUPP_COMMANDS_WRITE_PAGE_TOUT_OFF 7 1771#define HCI_WRITE_PAGE_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_TOUT_MASK) 1772 1773#define HCI_SUPP_COMMANDS_READ_SCAN_ENABLE_MASK 0x40 1774#define HCI_SUPP_COMMANDS_READ_SCAN_ENABLE_OFF 7 1775#define HCI_READ_SCAN_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_SCAN_ENABLE_OFF] & HCI_SUPP_COMMANDS_READ_SCAN_ENABLE_MASK) 1776 1777#define HCI_SUPP_COMMANDS_WRITE_SCAN_ENABLE_MASK 0x80 1778#define HCI_SUPP_COMMANDS_WRITE_SCAN_ENABLE_OFF 7 1779#define HCI_WRITE_SCAN_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SCAN_ENABLE_OFF] & HCI_SUPP_COMMANDS_WRITE_SCAN_ENABLE_MASK) 1780 1781#define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_ACTIVITY_MASK 0x01 1782#define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_ACTIVITY_OFF 8 1783#define HCI_READ_PAGE_SCAN_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_SCAN_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_SCAN_ACTIVITY_MASK) 1784 1785#define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_ACTIVITY_MASK 0x02 1786#define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_ACTIVITY_OFF 8 1787#define HCI_WRITE_PAGE_SCAN_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_ACTIVITY_MASK) 1788 1789#define HCI_SUPP_COMMANDS_READ_INQURIY_SCAN_ACTIVITY_MASK 0x04 1790#define HCI_SUPP_COMMANDS_READ_INQURIY_SCAN_ACTIVITY_OFF 8 1791#define HCI_READ_INQURIY_SCAN_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_INQURIY_SCAN_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_READ_INQURIY_SCAN_ACTIVITY_MASK) 1792 1793#define HCI_SUPP_COMMANDS_WRITE_INQURIY_SCAN_ACTIVITY_MASK 0x08 1794#define HCI_SUPP_COMMANDS_WRITE_INQURIY_SCAN_ACTIVITY_OFF 8 1795#define HCI_WRITE_INQURIY_SCAN_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_INQURIY_SCAN_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_WRITE_INQURIY_SCAN_ACTIVITY_MASK) 1796 1797#define HCI_SUPP_COMMANDS_READ_AUTH_ENABLE_MASK 0x10 1798#define HCI_SUPP_COMMANDS_READ_AUTH_ENABLE_OFF 8 1799#define HCI_READ_AUTH_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_AUTH_ENABLE_OFF] & HCI_SUPP_COMMANDS_READ_AUTH_ENABLE_MASK) 1800 1801#define HCI_SUPP_COMMANDS_WRITE_AUTH_ENABLE_MASK 0x20 1802#define HCI_SUPP_COMMANDS_WRITE_AUTH_ENABLE_OFF 8 1803#define HCI_WRITE_AUTH_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_AUTH_ENABLE_OFF] & HCI_SUPP_COMMANDS_WRITE_AUTH_ENABLE_MASK) 1804 1805#define HCI_SUPP_COMMANDS_READ_ENCRYPT_ENABLE_MASK 0x40 1806#define HCI_SUPP_COMMANDS_READ_ENCRYPT_ENABLE_OFF 8 1807#define HCI_READ_ENCRYPT_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_ENCRYPT_ENABLE_OFF] & HCI_SUPP_COMMANDS_READ_ENCRYPT_ENABLE_MASK) 1808 1809#define HCI_SUPP_COMMANDS_WRITE_ENCRYPT_ENABLE_MASK 0x80 1810#define HCI_SUPP_COMMANDS_WRITE_ENCRYPT_ENABLE_OFF 8 1811#define HCI_WRITE_ENCRYPT_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_ENCRYPT_ENABLE_OFF] & HCI_SUPP_COMMANDS_WRITE_ENCRYPT_ENABLE_MASK) 1812 1813#define HCI_SUPP_COMMANDS_READ_CLASS_DEVICE_MASK 0x01 1814#define HCI_SUPP_COMMANDS_READ_CLASS_DEVICE_OFF 9 1815#define HCI_READ_CLASS_DEVICE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_CLASS_DEVICE_OFF] & HCI_SUPP_COMMANDS_READ_CLASS_DEVICE_MASK) 1816 1817#define HCI_SUPP_COMMANDS_WRITE_CLASS_DEVICE_MASK 0x02 1818#define HCI_SUPP_COMMANDS_WRITE_CLASS_DEVICE_OFF 9 1819#define HCI_WRITE_CLASS_DEVICE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_CLASS_DEVICE_OFF] & HCI_SUPP_COMMANDS_WRITE_CLASS_DEVICE_MASK) 1820 1821#define HCI_SUPP_COMMANDS_READ_VOICE_SETTING_MASK 0x04 1822#define HCI_SUPP_COMMANDS_READ_VOICE_SETTING_OFF 9 1823#define HCI_READ_VOICE_SETTING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_VOICE_SETTING_OFF] & HCI_SUPP_COMMANDS_READ_VOICE_SETTING_MASK) 1824 1825#define HCI_SUPP_COMMANDS_WRITE_VOICE_SETTING_MASK 0x08 1826#define HCI_SUPP_COMMANDS_WRITE_VOICE_SETTING_OFF 9 1827#define HCI_WRITE_VOICE_SETTING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_VOICE_SETTING_OFF] & HCI_SUPP_COMMANDS_WRITE_VOICE_SETTING_MASK) 1828 1829#define HCI_SUPP_COMMANDS_READ_AUTO_FLUSH_TOUT_MASK 0x10 1830#define HCI_SUPP_COMMANDS_READ_AUTO_FLUSH_TOUT_OFF 9 1831#define HCI_READ_AUTO_FLUSH_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_AUTO_FLUSH_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_AUTO_FLUSH_TOUT_MASK) 1832 1833#define HCI_SUPP_COMMANDS_WRITE_AUTO_FLUSH_TOUT_MASK 0x20 1834#define HCI_SUPP_COMMANDS_WRITE_AUTO_FLUSH_TOUT_OFF 9 1835#define HCI_WRITE_AUTO_FLUSH_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_AUTO_FLUSH_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_AUTO_FLUSH_TOUT_MASK) 1836 1837#define HCI_SUPP_COMMANDS_READ_NUM_BROAD_RETRANS_MASK 0x40 1838#define HCI_SUPP_COMMANDS_READ_NUM_BROAD_RETRANS_OFF 9 1839#define HCI_READ_NUM_BROAD_RETRANS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_NUM_BROAD_RETRANS_OFF] & HCI_SUPP_COMMANDS_READ_NUM_BROAD_RETRANS_MASK) 1840 1841#define HCI_SUPP_COMMANDS_WRITE_NUM_BROAD_RETRANS_MASK 0x80 1842#define HCI_SUPP_COMMANDS_WRITE_NUM_BROAD_RETRANS_OFF 9 1843#define HCI_WRITE_NUM_BROAD_RETRANS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_NUM_BROAD_RETRANS_OFF] & HCI_SUPP_COMMANDS_WRITE_NUM_BROAD_RETRANS_MASK) 1844 1845#define HCI_SUPP_COMMANDS_READ_HOLD_MODE_ACTIVITY_MASK 0x01 1846#define HCI_SUPP_COMMANDS_READ_HOLD_MODE_ACTIVITY_OFF 10 1847#define HCI_READ_HOLD_MODE_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_HOLD_MODE_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_READ_HOLD_MODE_ACTIVITY_MASK) 1848 1849#define HCI_SUPP_COMMANDS_WRITE_HOLD_MODE_ACTIVITY_MASK 0x02 1850#define HCI_SUPP_COMMANDS_WRITE_HOLD_MODE_ACTIVITY_OFF 10 1851#define HCI_WRITE_HOLD_MODE_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_HOLD_MODE_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_WRITE_HOLD_MODE_ACTIVITY_MASK) 1852 1853#define HCI_SUPP_COMMANDS_READ_TRANS_PWR_LEVEL_MASK 0x04 1854#define HCI_SUPP_COMMANDS_READ_TRANS_PWR_LEVEL_OFF 10 1855#define HCI_READ_TRANS_PWR_LEVEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_TRANS_PWR_LEVEL_OFF] & HCI_SUPP_COMMANDS_READ_TRANS_PWR_LEVEL_MASK) 1856 1857#define HCI_SUPP_COMMANDS_READ_SYNCH_FLOW_CTRL_ENABLE_MASK 0x08 1858#define HCI_SUPP_COMMANDS_READ_SYNCH_FLOW_CTRL_ENABLE_OFF 10 1859#define HCI_READ_SYNCH_FLOW_CTRL_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_SYNCH_FLOW_CTRL_ENABLE_OFF] & HCI_SUPP_COMMANDS_READ_SYNCH_FLOW_CTRL_ENABLE_MASK) 1860 1861#define HCI_SUPP_COMMANDS_WRITE_SYNCH_FLOW_CTRL_ENABLE_MASK 0x10 1862#define HCI_SUPP_COMMANDS_WRITE_SYNCH_FLOW_CTRL_ENABLE_OFF 10 1863#define HCI_WRITE_SYNCH_FLOW_CTRL_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SYNCH_FLOW_CTRL_ENABLE_OFF] & HCI_SUPP_COMMANDS_WRITE_SYNCH_FLOW_CTRL_ENABLE_MASK) 1864 1865#define HCI_SUPP_COMMANDS_SET_HOST_CTRLR_TO_HOST_FC_MASK 0x20 1866#define HCI_SUPP_COMMANDS_SET_HOST_CTRLR_TO_HOST_FC_OFF 10 1867#define HCI_SET_HOST_CTRLR_TO_HOST_FC_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_HOST_CTRLR_TO_HOST_FC_OFF] & HCI_SUPP_COMMANDS_SET_HOST_CTRLR_TO_HOST_FC_MASK) 1868 1869#define HCI_SUPP_COMMANDS_HOST_BUFFER_SIZE_MASK 0x40 1870#define HCI_SUPP_COMMANDS_HOST_BUFFER_SIZE_OFF 10 1871#define HCI_HOST_BUFFER_SIZE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_HOST_BUFFER_SIZE_OFF] & HCI_SUPP_COMMANDS_HOST_BUFFER_SIZE_MASK) 1872 1873#define HCI_SUPP_COMMANDS_HOST_NUM_COMPLETED_PKTS_MASK 0x80 1874#define HCI_SUPP_COMMANDS_HOST_NUM_COMPLETED_PKTS_OFF 10 1875#define HCI_HOST_NUM_COMPLETED_PKTS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_HOST_NUM_COMPLETED_PKTS_OFF] & HCI_SUPP_COMMANDS_HOST_NUM_COMPLETED_PKTS_MASK) 1876 1877#define HCI_SUPP_COMMANDS_READ_LINK_SUP_TOUT_MASK 0x01 1878#define HCI_SUPP_COMMANDS_READ_LINK_SUP_TOUT_OFF 11 1879#define HCI_READ_LINK_SUP_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LINK_SUP_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_LINK_SUP_TOUT_MASK) 1880 1881#define HCI_SUPP_COMMANDS_WRITE_LINK_SUP_TOUT_MASK 0x02 1882#define HCI_SUPP_COMMANDS_WRITE_LINK_SUP_TOUT_OFF 11 1883#define HCI_WRITE_LINK_SUP_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LINK_SUP_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_LINK_SUP_TOUT_MASK) 1884 1885#define HCI_SUPP_COMMANDS_READ_NUM_SUPP_IAC_MASK 0x04 1886#define HCI_SUPP_COMMANDS_READ_NUM_SUPP_IAC_OFF 11 1887#define HCI_READ_NUM_SUPP_IAC_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_NUM_SUPP_IAC_OFF] & HCI_SUPP_COMMANDS_READ_NUM_SUPP_IAC_MASK) 1888 1889#define HCI_SUPP_COMMANDS_READ_CURRENT_IAC_LAP_MASK 0x08 1890#define HCI_SUPP_COMMANDS_READ_CURRENT_IAC_LAP_OFF 11 1891#define HCI_READ_CURRENT_IAC_LAP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_CURRENT_IAC_LAP_OFF] & HCI_SUPP_COMMANDS_READ_CURRENT_IAC_LAP_MASK) 1892 1893#define HCI_SUPP_COMMANDS_WRITE_CURRENT_IAC_LAP_MASK 0x10 1894#define HCI_SUPP_COMMANDS_WRITE_CURRENT_IAC_LAP_OFF 11 1895#define HCI_WRITE_CURRENT_IAC_LAP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_CURRENT_IAC_LAP_OFF] & HCI_SUPP_COMMANDS_WRITE_CURRENT_IAC_LAP_MASK) 1896 1897#define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_PER_MODE_MASK 0x20 1898#define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_PER_MODE_OFF 11 1899#define HCI_READ_PAGE_SCAN_PER_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_SCAN_PER_MODE_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_SCAN_PER_MODE_MASK) 1900 1901#define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_PER_MODE_MASK 0x40 1902#define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_PER_MODE_OFF 11 1903#define HCI_WRITE_PAGE_SCAN_PER_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_PER_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_PER_MODE_MASK) 1904 1905#define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_MODE_MASK 0x80 1906#define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_MODE_OFF 11 1907#define HCI_READ_PAGE_SCAN_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_SCAN_MODE_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_SCAN_MODE_MASK) 1908 1909#define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_MODE_MASK 0x01 1910#define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_MODE_OFF 12 1911#define HCI_WRITE_PAGE_SCAN_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_MODE_MASK) 1912 1913#define HCI_SUPP_COMMANDS_SET_AFH_CHNL_CLASS_MASK 0x02 1914#define HCI_SUPP_COMMANDS_SET_AFH_CHNL_CLASS_OFF 12 1915#define HCI_SET_AFH_CHNL_CLASS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_AFH_CHNL_CLASS_OFF] & HCI_SUPP_COMMANDS_SET_AFH_CHNL_CLASS_MASK) 1916 1917#define HCI_SUPP_COMMANDS_READ_INQUIRY_SCAN_TYPE_MASK 0x10 1918#define HCI_SUPP_COMMANDS_READ_INQUIRY_SCAN_TYPE_OFF 12 1919#define HCI_READ_INQUIRY_SCAN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_INQUIRY_SCAN_TYPE_OFF] & HCI_SUPP_COMMANDS_READ_INQUIRY_SCAN_TYPE_MASK) 1920 1921#define HCI_SUPP_COMMANDS_WRITE_INQUIRY_SCAN_TYPE_MASK 0x20 1922#define HCI_SUPP_COMMANDS_WRITE_INQUIRY_SCAN_TYPE_OFF 12 1923#define HCI_WRITE_INQUIRY_SCAN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_INQUIRY_SCAN_TYPE_OFF] & HCI_SUPP_COMMANDS_WRITE_INQUIRY_SCAN_TYPE_MASK) 1924 1925#define HCI_SUPP_COMMANDS_READ_INQUIRY_MODE_MASK 0x40 1926#define HCI_SUPP_COMMANDS_READ_INQUIRY_MODE_OFF 12 1927#define HCI_READ_INQUIRY_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_INQUIRY_MODE_OFF] & HCI_SUPP_COMMANDS_READ_INQUIRY_MODE_MASK) 1928 1929#define HCI_SUPP_COMMANDS_WRITE_INQUIRY_MODE_MASK 0x80 1930#define HCI_SUPP_COMMANDS_WRITE_INQUIRY_MODE_OFF 12 1931#define HCI_WRITE_INQUIRY_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_INQUIRY_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_INQUIRY_MODE_MASK) 1932 1933#define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_TYPE_MASK 0x01 1934#define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_TYPE_OFF 13 1935#define HCI_READ_PAGE_SCAN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_SCAN_TYPE_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_SCAN_TYPE_MASK) 1936 1937#define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_TYPE_MASK 0x02 1938#define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_TYPE_OFF 13 1939#define HCI_WRITE_PAGE_SCAN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_TYPE_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_TYPE_MASK) 1940 1941#define HCI_SUPP_COMMANDS_READ_AFH_CHNL_ASSESS_MODE_MASK 0x04 1942#define HCI_SUPP_COMMANDS_READ_AFH_CHNL_ASSESS_MODE_OFF 13 1943#define HCI_READ_AFH_CHNL_ASSESS_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_AFH_CHNL_ASSESS_MODE_OFF] & HCI_SUPP_COMMANDS_READ_AFH_CHNL_ASSESS_MODE_MASK) 1944 1945#define HCI_SUPP_COMMANDS_WRITE_AFH_CHNL_ASSESS_MODE_MASK 0x08 1946#define HCI_SUPP_COMMANDS_WRITE_AFH_CHNL_ASSESS_MODE_OFF 13 1947#define HCI_WRITE_AFH_CHNL_ASSESS_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_AFH_CHNL_ASSESS_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_AFH_CHNL_ASSESS_MODE_MASK) 1948 1949#define HCI_SUPP_COMMANDS_READ_LOCAL_VER_INFO_MASK 0x08 1950#define HCI_SUPP_COMMANDS_READ_LOCAL_VER_INFO_OFF 14 1951#define HCI_READ_LOCAL_VER_INFO_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_VER_INFO_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_VER_INFO_MASK) 1952 1953#define HCI_SUPP_COMMANDS_READ_LOCAL_SUP_CMDS_MASK 0x10 1954#define HCI_SUPP_COMMANDS_READ_LOCAL_SUP_CMDS_OFF 14 1955#define HCI_READ_LOCAL_SUP_CMDS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_SUP_CMDS_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_SUP_CMDS_MASK) 1956 1957#define HCI_SUPP_COMMANDS_READ_LOCAL_SUPP_FEATURES_MASK 0x20 1958#define HCI_SUPP_COMMANDS_READ_LOCAL_SUPP_FEATURES_OFF 14 1959#define HCI_READ_LOCAL_SUPP_FEATURES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_SUPP_FEATURES_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_SUPP_FEATURES_MASK) 1960 1961#define HCI_SUPP_COMMANDS_READ_LOCAL_EXT_FEATURES_MASK 0x40 1962#define HCI_SUPP_COMMANDS_READ_LOCAL_EXT_FEATURES_OFF 14 1963#define HCI_READ_LOCAL_EXT_FEATURES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_EXT_FEATURES_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_EXT_FEATURES_MASK) 1964 1965#define HCI_SUPP_COMMANDS_READ_BUFFER_SIZE_MASK 0x80 1966#define HCI_SUPP_COMMANDS_READ_BUFFER_SIZE_OFF 14 1967#define HCI_READ_BUFFER_SIZE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_BUFFER_SIZE_OFF] & HCI_SUPP_COMMANDS_READ_BUFFER_SIZE_MASK) 1968 1969#define HCI_SUPP_COMMANDS_READ_COUNTRY_CODE_MASK 0x01 1970#define HCI_SUPP_COMMANDS_READ_COUNTRY_CODE_OFF 15 1971#define HCI_READ_COUNTRY_CODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_COUNTRY_CODE_OFF] & HCI_SUPP_COMMANDS_READ_COUNTRY_CODE_MASK) 1972 1973#define HCI_SUPP_COMMANDS_READ_BD_ADDR_MASK 0x02 1974#define HCI_SUPP_COMMANDS_READ_BD_ADDR_OFF 15 1975#define HCI_READ_BD_ADDR_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_BD_ADDR_OFF] & HCI_SUPP_COMMANDS_READ_BD_ADDR_MASK) 1976 1977#define HCI_SUPP_COMMANDS_READ_FAIL_CONTACT_CNTR_MASK 0x04 1978#define HCI_SUPP_COMMANDS_READ_FAIL_CONTACT_CNTR_OFF 15 1979#define HCI_READ_FAIL_CONTACT_CNTR_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_FAIL_CONTACT_CNTR_OFF] & HCI_SUPP_COMMANDS_READ_FAIL_CONTACT_CNTR_MASK) 1980 1981#define HCI_SUPP_COMMANDS_RESET_FAIL_CONTACT_CNTR_MASK 0x08 1982#define HCI_SUPP_COMMANDS_RESET_FAIL_CONTACT_CNTR_OFF 15 1983#define HCI_RESET_FAIL_CONTACT_CNTR_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_RESET_FAIL_CONTACT_CNTR_OFF] & HCI_SUPP_COMMANDS_RESET_FAIL_CONTACT_CNTR_MASK) 1984 1985#define HCI_SUPP_COMMANDS_GET_LINK_QUALITY_MASK 0x10 1986#define HCI_SUPP_COMMANDS_GET_LINK_QUALITY_OFF 15 1987#define HCI_GET_LINK_QUALITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_GET_LINK_QUALITY_OFF] & HCI_SUPP_COMMANDS_GET_LINK_QUALITY_MASK) 1988 1989#define HCI_SUPP_COMMANDS_READ_RSSI_MASK 0x20 1990#define HCI_SUPP_COMMANDS_READ_RSSI_OFF 15 1991#define HCI_READ_RSSI_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_RSSI_OFF] & HCI_SUPP_COMMANDS_READ_RSSI_MASK) 1992 1993#define HCI_SUPP_COMMANDS_READ_AFH_CH_MAP_MASK 0x40 1994#define HCI_SUPP_COMMANDS_READ_AFH_CH_MAP_OFF 15 1995#define HCI_READ_AFH_CH_MAP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_AFH_CH_MAP_OFF] & HCI_SUPP_COMMANDS_READ_AFH_CH_MAP_MASK) 1996 1997#define HCI_SUPP_COMMANDS_READ_BD_CLOCK_MASK 0x80 1998#define HCI_SUPP_COMMANDS_READ_BD_CLOCK_OFF 15 1999#define HCI_READ_BD_CLOCK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_BD_CLOCK_OFF] & HCI_SUPP_COMMANDS_READ_BD_CLOCK_MASK) 2000 2001#define HCI_SUPP_COMMANDS_READ_LOOPBACK_MODE_MASK 0x01 2002#define HCI_SUPP_COMMANDS_READ_LOOPBACK_MODE_OFF 16 2003#define HCI_READ_LOOPBACK_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOOPBACK_MODE_OFF] & HCI_SUPP_COMMANDS_READ_LOOPBACK_MODE_MASK) 2004 2005#define HCI_SUPP_COMMANDS_WRITE_LOOPBACK_MODE_MASK 0x02 2006#define HCI_SUPP_COMMANDS_WRITE_LOOPBACK_MODE_OFF 16 2007#define HCI_WRITE_LOOPBACK_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LOOPBACK_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_LOOPBACK_MODE_MASK) 2008 2009#define HCI_SUPP_COMMANDS_ENABLE_DEV_UNDER_TEST_MASK 0x04 2010#define HCI_SUPP_COMMANDS_ENABLE_DEV_UNDER_TEST_OFF 16 2011#define HCI_ENABLE_DEV_UNDER_TEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ENABLE_DEV_UNDER_TEST_OFF] & HCI_SUPP_COMMANDS_ENABLE_DEV_UNDER_TEST_MASK) 2012 2013#define HCI_SUPP_COMMANDS_SETUP_SYNCH_CONN_MASK 0x08 2014#define HCI_SUPP_COMMANDS_SETUP_SYNCH_CONN_OFF 16 2015#define HCI_SETUP_SYNCH_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SETUP_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_SETUP_SYNCH_CONN_MASK) 2016 2017#define HCI_SUPP_COMMANDS_ACCEPT_SYNCH_CONN_MASK 0x10 2018#define HCI_SUPP_COMMANDS_ACCEPT_SYNCH_CONN_OFF 16 2019#define HCI_ACCEPT_SYNCH_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ACCEPT_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_ACCEPT_SYNCH_CONN_MASK) 2020 2021#define HCI_SUPP_COMMANDS_REJECT_SYNCH_CONN_MASK 0x20 2022#define HCI_SUPP_COMMANDS_REJECT_SYNCH_CONN_OFF 16 2023#define HCI_REJECT_SYNCH_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REJECT_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_REJECT_SYNCH_CONN_MASK) 2024 2025#define HCI_SUPP_COMMANDS_READ_EXT_INQUIRY_RESP_MASK 0x01 2026#define HCI_SUPP_COMMANDS_READ_EXT_INQUIRY_RESP_OFF 17 2027#define HCI_READ_EXT_INQUIRY_RESP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_EXT_INQUIRY_RESP_OFF] & HCI_SUPP_COMMANDS_READ_EXT_INQUIRY_RESP_MASK) 2028 2029#define HCI_SUPP_COMMANDS_WRITE_EXT_INQUIRY_RESP_MASK 0x02 2030#define HCI_SUPP_COMMANDS_WRITE_EXT_INQUIRY_RESP_OFF 17 2031#define HCI_WRITE_EXT_INQUIRY_RESP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_EXT_INQUIRY_RESP_OFF] & HCI_SUPP_COMMANDS_WRITE_EXT_INQUIRY_RESP_MASK) 2032 2033#define HCI_SUPP_COMMANDS_REFRESH_ENCRYPTION_KEY_MASK 0x04 2034#define HCI_SUPP_COMMANDS_REFRESH_ENCRYPTION_KEY_OFF 17 2035#define HCI_REFRESH_ENCRYPTION_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REFRESH_ENCRYPTION_KEY_OFF] & HCI_SUPP_COMMANDS_REFRESH_ENCRYPTION_KEY_MASK) 2036 2037/* Octet 17, bit 3 is reserved */ 2038 2039#define HCI_SUPP_COMMANDS_SNIFF_SUB_RATE_MASK 0x10 2040#define HCI_SUPP_COMMANDS_SNIFF_SUB_RATE_OFF 17 2041#define HCI_SNIFF_SUB_RATE_CMD_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SNIFF_SUB_RATE_OFF] & HCI_SUPP_COMMANDS_SNIFF_SUB_RATE_MASK) 2042 2043#define HCI_SUPP_COMMANDS_READ_SIMPLE_PAIRING_MODE_MASK 0x20 2044#define HCI_SUPP_COMMANDS_READ_SIMPLE_PAIRING_MODE_OFF 17 2045#define HCI_READ_SIMPLE_PAIRING_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_SIMPLE_PAIRING_MODE_OFF] & HCI_SUPP_COMMANDS_READ_SIMPLE_PAIRING_MODE_MASK) 2046 2047#define HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_MODE_MASK 0x40 2048#define HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_MODE_OFF 17 2049#define HCI_WRITE_SIMPLE_PAIRING_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_MODE_MASK) 2050 2051#define HCI_SUPP_COMMANDS_READ_LOCAL_OOB_DATA_MASK 0x80 2052#define HCI_SUPP_COMMANDS_READ_LOCAL_OOB_DATA_OFF 17 2053#define HCI_READ_LOCAL_OOB_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_OOB_DATA_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_OOB_DATA_MASK) 2054 2055#define HCI_SUPP_COMMANDS_READ_INQUIRY_RESPONSE_TX_POWER_MASK 0x01 2056#define HCI_SUPP_COMMANDS_READ_INQUIRY_RESPONSE_TX_POWER_OFF 18 2057#define HCI_READ_INQUIRY_RESPONSE_TX_POWER_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_INQUIRY_RESPONSE_TX_POWER_OFF] & HCI_SUPP_COMMANDS_READ_INQUIRY_RESPONSE_TX_POWER_MASK) 2058 2059#define HCI_SUPP_COMMANDS_WRITE_INQUIRY_RESPONSE_TX_POWER_MASK 0x02 2060#define HCI_SUPP_COMMANDS_WRITE_INQUIRY_RESPONSE_TX_POWER_OFF 18 2061#define HCI_WRITE_INQUIRY_RESPONSE_TX_POWER_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_INQUIRY_RESPONSE_TX_POWER_OFF] & HCI_SUPP_COMMANDS_WRITE_INQUIRY_RESPONSE_TX_POWER_MASK) 2062 2063#define HCI_SUPP_COMMANDS_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_MASK 0x04 2064#define HCI_SUPP_COMMANDS_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_OFF 18 2065#define HCI_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_OFF] & HCI_SUPP_COMMANDS_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_MASK) 2066 2067#define HCI_SUPP_COMMANDS_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_MASK 0x08 2068#define HCI_SUPP_COMMANDS_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_OFF 18 2069#define HCI_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_OFF] & HCI_SUPP_COMMANDS_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_MASK) 2070 2071#define HCI_SUPP_COMMANDS_IO_CAPABILITY_RESPONSE_MASK 0x80 2072#define HCI_SUPP_COMMANDS_IO_CAPABILITY_RESPONSE_OFF 18 2073#define HCI_IO_CAPABILITY_RESPONSE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_IO_CAPABILITY_RESPONSE_OFF] & HCI_SUPP_COMMANDS_IO_CAPABILITY_RESPONSE_MASK) 2074 2075#define HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_REPLY_MASK 0x01 2076#define HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_REPLY_OFF 19 2077#define HCI_USER_CONFIRMATION_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_REPLY_MASK) 2078 2079#define HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_NEG_REPLY_MASK 0x02 2080#define HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_NEG_REPLY_OFF 19 2081#define HCI_USER_CONFIRMATION_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_NEG_REPLY_MASK) 2082 2083#define HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_REPLY_MASK 0x04 2084#define HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_REPLY_OFF 19 2085#define HCI_USER_PASSKEY_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_REPLY_MASK) 2086 2087#define HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_NEG_REPLY_MASK 0x08 2088#define HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_NEG_REPLY_OFF 19 2089#define HCI_USER_PASSKEY_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_NEG_REPLY_MASK) 2090 2091#define HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_REPLY_MASK 0x10 2092#define HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_REPLY_OFF 19 2093#define HCI_REMOTE_OOB_DATA_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_REPLY_MASK) 2094 2095#define HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_DBG_MODE_MASK 0x20 2096#define HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_DBG_MODE_OFF 19 2097#define HCI_WRITE_SIMPLE_PAIRING_DBG_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_DBG_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_DBG_MODE_MASK) 2098 2099#define HCI_SUPP_COMMANDS_ENHANCED_FLUSH_MASK 0x40 2100#define HCI_SUPP_COMMANDS_ENHANCED_FLUSH_OFF 19 2101#define HCI_ENHANCED_FLUSH_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ENHANCED_FLUSH_OFF] & HCI_SUPP_COMMANDS_ENHANCED_FLUSH_MASK) 2102 2103#define HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_MASK 0x80 2104#define HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_OFF 19 2105#define HCI_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_MASK) 2106 2107/* Supported Commands (Byte 20) */ 2108#define HCI_SUPP_COMMANDS_SEND_KEYPRESS_NOTIF_MASK 0x04 2109#define HCI_SUPP_COMMANDS_SEND_KEYPRESS_NOTIF_OFF 20 2110#define HCI_SEND_NOTIF_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SEND_KEYPRESS_NOTIF_OFF] & HCI_SUPP_COMMANDS_SEND_KEYPRESS_NOTIF_MASK) 2111 2112#define HCI_SUPP_COMMANDS_IO_CAP_REQ_NEG_REPLY_MASK 0x08 2113#define HCI_SUPP_COMMANDS_IO_CAP_REQ_NEG_REPLY_OFF 20 2114#define HCI_IO_CAP_REQ_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_IO_CAP_REQ_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_IO_CAP_REQ_NEG_REPLY_MASK) 2115 2116#define HCI_SUPP_COMMANDS_READ_ENCR_KEY_SIZE_MASK 0x10 2117#define HCI_SUPP_COMMANDS_READ_ENCR_KEY_SIZE_OFF 20 2118#define HCI_READ_ENCR_KEY_SIZE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_ENCR_KEY_SIZE_OFF] & HCI_SUPP_COMMANDS_READ_ENCR_KEY_SIZE_MASK) 2119 2120/* Supported Commands (Byte 21) */ 2121#define HCI_SUPP_COMMANDS_CREATE_PHYSICAL_LINK_MASK 0x01 2122#define HCI_SUPP_COMMANDS_CREATE_PHYSICAL_LINK_OFF 21 2123#define HCI_CREATE_PHYSICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CREATE_PHYSICAL_LINK_OFF] & HCI_SUPP_COMMANDS_CREATE_PHYSICAL_LINK_MASK) 2124 2125#define HCI_SUPP_COMMANDS_ACCEPT_PHYSICAL_LINK_MASK 0x02 2126#define HCI_SUPP_COMMANDS_ACCEPT_PHYSICAL_LINK_OFF 21 2127#define HCI_ACCEPT_PHYSICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ACCEPT_PHYSICAL_LINK_OFF] & HCI_SUPP_COMMANDS_ACCEPT_PHYSICAL_LINK_MASK) 2128 2129#define HCI_SUPP_COMMANDS_DISCONNECT_PHYSICAL_LINK_MASK 0x04 2130#define HCI_SUPP_COMMANDS_DISCONNECT_PHYSICAL_LINK_OFF 21 2131#define HCI_DISCONNECT_PHYSICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DISCONNECT_PHYSICAL_LINK_OFF] & HCI_SUPP_COMMANDS_DISCONNECT_PHYSICAL_LINK_MASK) 2132 2133#define HCI_SUPP_COMMANDS_CREATE_LOGICAL_LINK_MASK 0x08 2134#define HCI_SUPP_COMMANDS_CREATE_LOGICAL_LINK_OFF 21 2135#define HCI_CREATE_LOGICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CREATE_LOGICAL_LINK_OFF] & HCI_SUPP_COMMANDS_CREATE_LOGICAL_LINK_MASK) 2136 2137#define HCI_SUPP_COMMANDS_ACCEPT_LOGICAL_LINK_MASK 0x10 2138#define HCI_SUPP_COMMANDS_ACCEPT_LOGICAL_LINK_OFF 21 2139#define HCI_ACCEPT_LOGICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ACCEPT_LOGICAL_LINK_OFF] & HCI_SUPP_COMMANDS_ACCEPT_LOGICAL_LINK_MASK) 2140 2141#define HCI_SUPP_COMMANDS_DISCONNECT_LOGICAL_LINK_MASK 0x20 2142#define HCI_SUPP_COMMANDS_DISCONNECT_LOGICAL_LINK_OFF 21 2143#define HCI_DISCONNECT_LOGICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DISCONNECT_LOGICAL_LINK_OFF] & HCI_SUPP_COMMANDS_DISCONNECT_LOGICAL_LINK_MASK) 2144 2145#define HCI_SUPP_COMMANDS_LOGICAL_LINK_CANCEL_MASK 0x40 2146#define HCI_SUPP_COMMANDS_LOGICAL_LINK_CANCEL_OFF 21 2147#define HCI_LOGICAL_LINK_CANCEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LOGICAL_LINK_CANCEL_OFF] & HCI_SUPP_COMMANDS_LOGICAL_LINK_CANCEL_MASK) 2148 2149#define HCI_SUPP_COMMANDS_FLOW_SPEC_MODIFY_MASK 0x80 2150#define HCI_SUPP_COMMANDS_FLOW_SPEC_MODIFY_OFF 21 2151#define HCI_FLOW_SPEC_MODIFY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_FLOW_SPEC_MODIFY_OFF] & HCI_SUPP_COMMANDS_FLOW_SPEC_MODIFY_MASK) 2152 2153/* Supported Commands (Byte 22) */ 2154#define HCI_SUPP_COMMANDS_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_MASK 0x01 2155#define HCI_SUPP_COMMANDS_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_OFF 22 2156#define HCI_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_OFF] & HCI_SUPP_COMMANDS_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_MASK) 2157 2158#define HCI_SUPP_COMMANDS_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_MASK 0x02 2159#define HCI_SUPP_COMMANDS_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_OFF 22 2160#define HCI_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_MASK) 2161 2162#define HCI_SUPP_COMMANDS_SET_EVENT_MASK_PAGE_2_MASK 0x04 2163#define HCI_SUPP_COMMANDS_SET_EVENT_MASK_PAGE_2_OFF 22 2164#define HCI_SET_EVENT_MASK_PAGE_2_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_EVENT_MASK_PAGE_2_OFF] & HCI_SUPP_COMMANDS_SET_EVENT_MASK_PAGE_2_MASK) 2165 2166#define HCI_SUPP_COMMANDS_READ_LOCATION_DATA_MASK 0x08 2167#define HCI_SUPP_COMMANDS_READ_LOCATION_DATA_OFF 22 2168#define HCI_READ_LOCATION_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCATION_DATA_OFF] & HCI_SUPP_COMMANDS_READ_LOCATION_DATA_MASK) 2169 2170#define HCI_SUPP_COMMANDS_WRITE_LOCATION_DATA_MASK 0x10 2171#define HCI_SUPP_COMMANDS_WRITE_LOCATION_DATA_OFF 22 2172#define HCI_WRITE_LOCATION_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LOCATION_DATA_OFF] & HCI_SUPP_COMMANDS_WRITE_LOCATION_DATA_MASK) 2173 2174#define HCI_SUPP_COMMANDS_READ_LOCAL_AMP_INFO_MASK 0x20 2175#define HCI_SUPP_COMMANDS_READ_LOCAL_AMP_INFO_OFF 22 2176#define HCI_READ_LOCAL_AMP_INFO_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_AMP_INFO_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_AMP_INFO_MASK) 2177 2178#define HCI_SUPP_COMMANDS_READ_LOCAL_AMP_ASSOC_MASK 0x40 2179#define HCI_SUPP_COMMANDS_READ_LOCAL_AMP_ASSOC_OFF 22 2180#define HCI_READ_LOCAL_AMP_ASSOC_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_AMP_ASSOC_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_AMP_ASSOC_MASK) 2181 2182#define HCI_SUPP_COMMANDS_WRITE_REMOTE_AMP_ASSOC_MASK 0x80 2183#define HCI_SUPP_COMMANDS_WRITE_REMOTE_AMP_ASSOC_OFF 22 2184#define HCI_WRITE_REMOTE_AMP_ASSOC_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_REMOTE_AMP_ASSOC_OFF] & HCI_SUPP_COMMANDS_WRITE_REMOTE_AMP_ASSOC_MASK) 2185 2186/* Supported Commands (Byte 23) */ 2187#define HCI_SUPP_COMMANDS_READ_FLOW_CONTROL_MODE_MASK 0x01 2188#define HCI_SUPP_COMMANDS_READ_FLOW_CONTROL_MODE_OFF 23 2189#define HCI_READ_FLOW_CONTROL_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_FLOW_CONTROL_MODE_OFF] & HCI_SUPP_COMMANDS_READ_FLOW_CONTROL_MODE_MASK) 2190 2191#define HCI_SUPP_COMMANDS_WRITE_FLOW_CONTROL_MODE_MASK 0x02 2192#define HCI_SUPP_COMMANDS_WRITE_FLOW_CONTROL_MODE_OFF 23 2193#define HCI_WRITE_FLOW_CONTROL_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_FLOW_CONTROL_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_FLOW_CONTROL_MODE_MASK) 2194 2195#define HCI_SUPP_COMMANDS_READ_DATA_BLOCK_SIZE_MASK 0x04 2196#define HCI_SUPP_COMMANDS_READ_DATA_BLOCK_SIZE_OFF 23 2197#define HCI_READ_DATA_BLOCK_SIZE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_DATA_BLOCK_SIZE_OFF] & HCI_SUPP_COMMANDS_READ_DATA_BLOCK_SIZE_MASK) 2198 2199#define HCI_SUPP_COMMANDS_ENABLE_AMP_RCVR_REPORTS_MASK 0x20 2200#define HCI_SUPP_COMMANDS_ENABLE_AMP_RCVR_REPORTS_OFF 23 2201#define HCI_ENABLE_AMP_RCVR_REPORTS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ENABLE_AMP_RCVR_REPORTS_OFF] & HCI_SUPP_COMMANDS_ENABLE_AMP_RCVR_REPORTS_MASK) 2202 2203#define HCI_SUPP_COMMANDS_AMP_TEST_END_MASK 0x40 2204#define HCI_SUPP_COMMANDS_AMP_TEST_END_OFF 23 2205#define HCI_AMP_TEST_END_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_AMP_TEST_END_OFF] & HCI_SUPP_COMMANDS_AMP_TEST_END_MASK) 2206 2207#define HCI_SUPP_COMMANDS_AMP_TEST_MASK 0x80 2208#define HCI_SUPP_COMMANDS_AMP_TEST_OFF 23 2209#define HCI_AMP_TEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_AMP_TEST_OFF] & HCI_SUPP_COMMANDS_AMP_TEST_MASK) 2210 2211/* Supported Commands (Byte 24) */ 2212#define HCI_SUPP_COMMANDS_READ_TRANSMIT_POWER_LEVEL_MASK 0x01 2213#define HCI_SUPP_COMMANDS_READ_TRANSMIT_POWER_LEVEL_OFF 24 2214#define HCI_READ_TRANSMIT_POWER_LEVEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_TRANSMIT_POWER_LEVEL_OFF] & HCI_SUPP_COMMANDS_READ_TRANSMIT_POWER_LEVEL_MASK) 2215 2216#define HCI_SUPP_COMMANDS_READ_BE_FLUSH_TOUT_MASK 0x04 2217#define HCI_SUPP_COMMANDS_READ_BE_FLUSH_TOUT_OFF 24 2218#define HCI_READ_BE_FLUSH_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_BE_FLUSH_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_BE_FLUSH_TOUT_MASK) 2219 2220#define HCI_SUPP_COMMANDS_WRITE_BE_FLUSH_TOUT_MASK 0x08 2221#define HCI_SUPP_COMMANDS_WRITE_BE_FLUSH_TOUT_OFF 24 2222#define HCI_WRITE_BE_FLUSH_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_BE_FLUSH_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_BE_FLUSH_TOUT_MASK) 2223 2224#define HCI_SUPP_COMMANDS_SHORT_RANGE_MODE_MASK 0x10 2225#define HCI_SUPP_COMMANDS_SHORT_RANGE_MODE_OFF 24 2226#define HCI_SHORT_RANGE_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SHORT_RANGE_MODE_OFF] & HCI_SUPP_COMMANDS_SHORT_RANGE_MODE_MASK) 2227 2228/* LE commands TBD 2229** Supported Commands (Byte 24 continued) 2230** Supported Commands (Byte 25) 2231** Supported Commands (Byte 26) 2232** Supported Commands (Byte 27) 2233** Supported Commands (Byte 28) 2234*/ 2235 2236/* 2237Commands of HCI_GRP_VENDOR_SPECIFIC group for WIDCOMM SW LM Simulator 2238*/ 2239#ifdef _WIDCOMM 2240 2241#define HCI_SET_HCI_TRACE (0x0001 | HCI_GRP_VENDOR_SPECIFIC) 2242#define HCI_SET_LM_TRACE (0x0002 | HCI_GRP_VENDOR_SPECIFIC) 2243#define HCI_WRITE_COUNTRY_CODE (0x0004 | HCI_GRP_VENDOR_SPECIFIC) 2244#define HCI_READ_LM_HISTORY (0x0005 | HCI_GRP_VENDOR_SPECIFIC) 2245#define HCI_WRITE_BD_ADDR (0x0006 | HCI_GRP_VENDOR_SPECIFIC) 2246#define HCI_DISABLE_ENCRYPTION (0x0007 | HCI_GRP_VENDOR_SPECIFIC) 2247#define HCI_DISABLE_AUTHENTICATION (0x0008 | HCI_GRP_VENDOR_SPECIFIC) 2248#define HCI_GENERIC_LC_CMD (0x000A | HCI_GRP_VENDOR_SPECIFIC) 2249#define HCI_INCR_POWER (0x000B | HCI_GRP_VENDOR_SPECIFIC) 2250#define HCI_DECR_POWER (0x000C | HCI_GRP_VENDOR_SPECIFIC) 2251 2252/* Definitions for the local transactions */ 2253#define LM_DISCONNECT (0x00D0 | HCI_GRP_VENDOR_SPECIFIC) 2254#define LM_AUTHENTICATION_REQUESTED (0x00D1 | HCI_GRP_VENDOR_SPECIFIC) 2255#define LM_SET_CONN_ENCRYPTION (0x00D2 | HCI_GRP_VENDOR_SPECIFIC) 2256#define LM_START_ENCRYPT_KEY_SIZE (0x00D3 | HCI_GRP_VENDOR_SPECIFIC) 2257#define LM_START_ENCRYPTION (0x00D4 | HCI_GRP_VENDOR_SPECIFIC) 2258#define LM_STOP_ENCRYPTION (0x00D5 | HCI_GRP_VENDOR_SPECIFIC) 2259#define LM_CHANGE_CONN_PACKET_TYPE (0x00D6 | HCI_GRP_VENDOR_SPECIFIC) 2260#define LM_RMT_NAME_REQUEST (0x00D7 | HCI_GRP_VENDOR_SPECIFIC) 2261#define LM_READ_RMT_FEATURES (0x00D8 | HCI_GRP_VENDOR_SPECIFIC) 2262#define LM_READ_RMT_VERSION_INFO (0x00D9 | HCI_GRP_VENDOR_SPECIFIC) 2263#define LM_READ_RMT_TIMING_INFO (0x00DA | HCI_GRP_VENDOR_SPECIFIC) 2264#define LM_READ_RMT_CLOCK_OFFSET (0x00DB | HCI_GRP_VENDOR_SPECIFIC) 2265#define LM_HOLD_MODE (0x00DC | HCI_GRP_VENDOR_SPECIFIC) 2266#define LM_EXIT_PARK_MODE (0x00DD | HCI_GRP_VENDOR_SPECIFIC) 2267 2268#define LM_SCO_LINK_REQUEST (0x00E0 | HCI_GRP_VENDOR_SPECIFIC) 2269#define LM_SCO_CHANGE (0x00E4 | HCI_GRP_VENDOR_SPECIFIC) 2270#define LM_SCO_REMOVE (0x00E8 | HCI_GRP_VENDOR_SPECIFIC) 2271#define LM_MAX_SLOTS (0x00F1 | HCI_GRP_VENDOR_SPECIFIC) 2272#define LM_MAX_SLOTS_REQUEST (0x00F2 | HCI_GRP_VENDOR_SPECIFIC) 2273 2274#ifdef INCLUDE_OPTIONAL_PAGING_SCHEME 2275#define LM_OPTIONAL_PAGE_REQUEST (0x00F3 | HCI_GRP_VENDOR_SPECIFIC) 2276#define LM_OPTIONAL_PAGESCAN_REQUEST (0x00F4 | HCI_GRP_VENDOR_SPECIFIC) 2277#endif 2278 2279#define LM_SETUP_COMPLETE (0x00FF | HCI_GRP_VENDOR_SPECIFIC) 2280 2281#define LM_HIST_SEND_LMP_FRAME (0x0100 | HCI_GRP_VENDOR_SPECIFIC) 2282#define LM_HIST_RECV_LMP_FRAME (0x0101 | HCI_GRP_VENDOR_SPECIFIC) 2283#define LM_HIST_HCIT_ERROR (0x0102 | HCI_GRP_VENDOR_SPECIFIC) 2284#define LM_HIST_PER_INQ_TOUT (0x0103 | HCI_GRP_VENDOR_SPECIFIC) 2285#define LM_HIST_INQ_SCAN_TOUT (0x0104 | HCI_GRP_VENDOR_SPECIFIC) 2286#define LM_HIST_PAGE_SCAN_TOUT (0x0105 | HCI_GRP_VENDOR_SPECIFIC) 2287#define LM_HIST_RESET_TOUT (0x0106 | HCI_GRP_VENDOR_SPECIFIC) 2288#define LM_HIST_MANDAT_PSCAN_TOUT (0x0107 | HCI_GRP_VENDOR_SPECIFIC) 2289#define LM_HIST_ACL_START_TRANS (0x0108 | HCI_GRP_VENDOR_SPECIFIC) 2290#define LM_HIST_ACL_HOST_REPLY (0x0109 | HCI_GRP_VENDOR_SPECIFIC) 2291#define LM_HIST_ACL_TIMEOUT (0x010A | HCI_GRP_VENDOR_SPECIFIC) 2292#define LM_HIST_ACL_TX_COMP (0x010B | HCI_GRP_VENDOR_SPECIFIC) 2293#define LM_HIST_ACL_HCID_SUSPENDED (0x010C | HCI_GRP_VENDOR_SPECIFIC) 2294#define LM_HIST_ACL_FAILED (0x010D | HCI_GRP_VENDOR_SPECIFIC) 2295#define LM_HIST_HCI_COMMAND (0x010E | HCI_GRP_VENDOR_SPECIFIC) 2296 2297#define LM_HIST_HCI_EVENT (0x010F | HCI_GRP_VENDOR_SPECIFIC) 2298#define LM_HIST_HCI_UPDATA (0x0110 | HCI_GRP_VENDOR_SPECIFIC) 2299#define LM_HIST_HCI_DNDATA (0x0111 | HCI_GRP_VENDOR_SPECIFIC) 2300 2301#define HCI_ENTER_TEST_MODE (0x0300 | HCI_GRP_VENDOR_SPECIFIC) 2302#define HCI_LMP_TEST_CNTRL (0x0301 | HCI_GRP_VENDOR_SPECIFIC) 2303#define HCI_DEBUG_LC_CMD_MIN (0x0300 | HCI_GRP_VENDOR_SPECIFIC) 2304#define HCI_DEBUG_LC_CMD_MAX (0x03FF | HCI_GRP_VENDOR_SPECIFIC) 2305#define HCI_DEBUG_LC_COMMAND HCI_DEBUG_LC_CMD_MAX 2306 2307#endif 2308 2309 2310/* Broadcom Vendor Specific Event sub-codes */ 2311#define HCI_BRCM_VSE_SUBCODE_AUTOMATIC_PAIRING_REQUEST 0x01 2312#define HCI_BRCM_VSE_SUBCODE_RX_COMPLETE 0x02 2313#define HCI_BRCM_VSE_SUBCODE_LINK_QUALITY_REPORT 0x03 2314#define HCI_BRCM_VSE_SUBCODE_IOP_TEST_RX_1_PACKET_REPORT 0x04 2315#define HCI_BRCM_VSE_SUBCODE_IOP_TEST_RX_N_PACKETS_REPORT_SUMMARY 0x05 2316#define HCI_BRCM_VSE_SUBCODE_MODULE_XRAM_TEST_REPORT_SUMMARY 0x06 2317#define HCI_BRCM_VSE_SUBCODE_CONNECTIONLESS_RX_TEST_STATISTICS 0x07 2318#define HCI_BRCM_VSE_SUBCODE_FM_INTERRUPT 0x08 2319#define HCI_BRCM_VSE_SUBCODE_TCA_DEBUG_REPORT 0x0B 2320#define HCI_BRCM_VSE_SUBCODE_RAM_ROM_CLOCK_TEST_STATUS 0x0C 2321#define HCI_BRCM_VSE_SUBCODE_DEBUG_OUTPUT_STRING 0x0D 2322#define HCI_BRCM_VSE_SUBCODE_PCM_DATA_DUMP 0x0E 2323#define HCI_BRCM_VSE_SUBCODE_PROTOCOL_MESSAGE_DUMP 0x0F 2324#define HCI_BRCM_VSE_SUBCODE_GPS_DATA 0x10 2325#define HCI_BRCM_VSE_SUBCODE_RESERVED_11 0x11 2326#define HCI_BRCM_VSE_SUBCODE_GPS_SENSOR_EVENT 0x12 2327#define HCI_BRCM_VSE_SUBCODE_GPS_SENSOR_SETUP_EVENT 0x13 2328#define HCI_BRCM_VSE_SUBCODE_MEIF_RX_EVENT 0x14 2329#define HCI_BRCM_VSE_SUBCODE_UNDETECTED_CRC_ERROR_EVENT 0x15 2330#define HCI_BRCM_VSE_SUBCODE_BFC_DISCONNECT_EVENT 0x16 2331#define HCI_BRCM_VSE_SUBCODE_CUSTOMER_SPECIFIC_CS_ENERGY_DETECTED_EVENTS 0x17 2332#define HCI_BRCM_VSE_SUBCODE_BFC_POLLING_INFO_EVENT 0x18 2333#define HCI_BRCM_VSE_SUBCODE_EEPROM_CHIP_ERASE_BY_MINIDRIVER_STATUS_REPORT 0xCE 2334 2335/* MIP related Vendor Specific Event */ 2336#define HCI_BRCM_VSE_SUBCODE_MIP_MODE_CHANGE 0x27 2337#define HCI_BRCM_VSE_SUBCODE_MIP_DISCONNECT 0x28 2338#define HCI_BRCM_VSE_SUBCODE_MIP_EIR_CMPLT 0x29 2339#define HCI_BRCM_VSE_SUBCODE_MIP_ENC_KEY 0x2A 2340#define HCI_BRCM_VSE_SUBCODE_MIP_DATA_RECEIVED 0x2E 2341 2342/* AMP VSE events 2343*/ 2344#define AMP_VSE_CHANSPEC_CHAN_MASK 0x00ff 2345 2346#define AMP_VSE_CHANSPEC_CTL_SB_MASK 0x0300 2347#define AMP_VSE_CHANSPEC_CTL_SB_LOWER 0x0100 2348#define AMP_VSE_CHANSPEC_CTL_SB_UPPER 0x0200 2349#define AMP_VSE_CHANSPEC_CTL_SB_NONE 0x0300 2350 2351#define AMP_VSE_CHANSPEC_BW_MASK 0x0C00 2352#define AMP_VSE_CHANSPEC_BW_10 0x0400 2353#define AMP_VSE_CHANSPEC_BW_20 0x0800 2354#define AMP_VSE_CHANSPEC_BW_40 0x0C00 2355 2356#define AMP_VSE_CHANSPEC_BAND_MASK 0xf000 2357#define AMP_VSE_CHANSPEC_BAND_5G 0x1000 2358#define AMP_VSE_CHANSPEC_BAND_2G 0x2000 2359 2360/* PCM2 related */ 2361#define HCI_BRCM_CUSTOMER_EXT_ARC_LEN 4 2362#define LOC_AUDIO_ROUTING_CONTROL 0x88 2363#define LOC_ARC_CHANNEL_ID 0xF3 2364 2365#define ARC_INTERFACE_PCMI2S 0x01 2366#define ARC_INTERFACE_FM_I2S 0x02 2367#define ARC_INTERFACE_SLB 0x03 2368 2369#define ARC_MODE_NOT_USED 0x00 2370#define ARC_MODE_BT_AUDIO 0x01 2371#define ARC_MODE_FMRX 0x02 2372#define ARC_MODE_FMTX 0x03 2373#define ARC_MODE_SHARED_BT_FMRX 0x04 2374#define ARC_MODE_SHARED_BT_FMTX 0x05 2375 2376#define BRCM_PCM2_SETUP_READ_SIZE 0x01 2377#define BRCM_PCM2_SETUP_WRITE_SIZE 0x1A 2378 2379#endif 2380 2381