1/* 2 * Kernel-based Virtual Machine driver for Linux 3 * 4 * This header defines architecture specific interfaces, x86 version 5 * 6 * This work is licensed under the terms of the GNU GPL, version 2. See 7 * the COPYING file in the top-level directory. 8 * 9 */ 10 11#ifndef _ASM_X86_KVM_HOST_H 12#define _ASM_X86_KVM_HOST_H 13 14#include <linux/types.h> 15#include <linux/mm.h> 16#include <linux/mmu_notifier.h> 17#include <linux/tracepoint.h> 18#include <linux/cpumask.h> 19#include <linux/irq_work.h> 20 21#include <linux/kvm.h> 22#include <linux/kvm_para.h> 23#include <linux/kvm_types.h> 24#include <linux/perf_event.h> 25#include <linux/pvclock_gtod.h> 26#include <linux/clocksource.h> 27 28#include <asm/pvclock-abi.h> 29#include <asm/desc.h> 30#include <asm/mtrr.h> 31#include <asm/msr-index.h> 32#include <asm/asm.h> 33 34#define KVM_MAX_VCPUS 255 35#define KVM_SOFT_MAX_VCPUS 160 36#define KVM_USER_MEM_SLOTS 125 37/* memory slots that are not exposed to userspace */ 38#define KVM_PRIVATE_MEM_SLOTS 3 39#define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS) 40 41#define KVM_MMIO_SIZE 16 42 43#define KVM_PIO_PAGE_OFFSET 1 44#define KVM_COALESCED_MMIO_PAGE_OFFSET 2 45 46#define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS 47 48#define CR0_RESERVED_BITS \ 49 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 50 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 51 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 52 53#define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1) 54#define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD)) 55#define CR3_PCID_ENABLED_RESERVED_BITS 0xFFFFFF0000000000ULL 56#define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \ 57 0xFFFFFF0000000000ULL) 58#define CR4_RESERVED_BITS \ 59 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 60 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 61 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 62 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ 63 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE)) 64 65#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 66 67 68 69#define INVALID_PAGE (~(hpa_t)0) 70#define VALID_PAGE(x) ((x) != INVALID_PAGE) 71 72#define UNMAPPED_GVA (~(gpa_t)0) 73 74/* KVM Hugepage definitions for x86 */ 75#define KVM_NR_PAGE_SIZES 3 76#define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) 77#define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) 78#define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) 79#define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 80#define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 81 82#define SELECTOR_TI_MASK (1 << 2) 83#define SELECTOR_RPL_MASK 0x03 84 85#define IOPL_SHIFT 12 86 87#define KVM_PERMILLE_MMU_PAGES 20 88#define KVM_MIN_ALLOC_MMU_PAGES 64 89#define KVM_MMU_HASH_SHIFT 10 90#define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 91#define KVM_MIN_FREE_MMU_PAGES 5 92#define KVM_REFILL_PAGES 25 93#define KVM_MAX_CPUID_ENTRIES 80 94#define KVM_NR_FIXED_MTRR_REGION 88 95#define KVM_NR_VAR_MTRR 8 96 97#define ASYNC_PF_PER_VCPU 64 98 99struct kvm_vcpu; 100struct kvm; 101struct kvm_async_pf; 102 103enum kvm_reg { 104 VCPU_REGS_RAX = 0, 105 VCPU_REGS_RCX = 1, 106 VCPU_REGS_RDX = 2, 107 VCPU_REGS_RBX = 3, 108 VCPU_REGS_RSP = 4, 109 VCPU_REGS_RBP = 5, 110 VCPU_REGS_RSI = 6, 111 VCPU_REGS_RDI = 7, 112#ifdef CONFIG_X86_64 113 VCPU_REGS_R8 = 8, 114 VCPU_REGS_R9 = 9, 115 VCPU_REGS_R10 = 10, 116 VCPU_REGS_R11 = 11, 117 VCPU_REGS_R12 = 12, 118 VCPU_REGS_R13 = 13, 119 VCPU_REGS_R14 = 14, 120 VCPU_REGS_R15 = 15, 121#endif 122 VCPU_REGS_RIP, 123 NR_VCPU_REGS 124}; 125 126enum kvm_reg_ex { 127 VCPU_EXREG_PDPTR = NR_VCPU_REGS, 128 VCPU_EXREG_CR3, 129 VCPU_EXREG_RFLAGS, 130 VCPU_EXREG_CPL, 131 VCPU_EXREG_SEGMENTS, 132}; 133 134enum { 135 VCPU_SREG_ES, 136 VCPU_SREG_CS, 137 VCPU_SREG_SS, 138 VCPU_SREG_DS, 139 VCPU_SREG_FS, 140 VCPU_SREG_GS, 141 VCPU_SREG_TR, 142 VCPU_SREG_LDTR, 143}; 144 145#include <asm/kvm_emulate.h> 146 147#define KVM_NR_MEM_OBJS 40 148 149#define KVM_NR_DB_REGS 4 150 151#define DR6_BD (1 << 13) 152#define DR6_BS (1 << 14) 153#define DR6_FIXED_1 0xffff0ff0 154#define DR6_VOLATILE 0x0000e00f 155 156#define DR7_BP_EN_MASK 0x000000ff 157#define DR7_GE (1 << 9) 158#define DR7_GD (1 << 13) 159#define DR7_FIXED_1 0x00000400 160#define DR7_VOLATILE 0xffff23ff 161 162/* apic attention bits */ 163#define KVM_APIC_CHECK_VAPIC 0 164/* 165 * The following bit is set with PV-EOI, unset on EOI. 166 * We detect PV-EOI changes by guest by comparing 167 * this bit with PV-EOI in guest memory. 168 * See the implementation in apic_update_pv_eoi. 169 */ 170#define KVM_APIC_PV_EOI_PENDING 1 171 172/* 173 * We don't want allocation failures within the mmu code, so we preallocate 174 * enough memory for a single page fault in a cache. 175 */ 176struct kvm_mmu_memory_cache { 177 int nobjs; 178 void *objects[KVM_NR_MEM_OBJS]; 179}; 180 181/* 182 * kvm_mmu_page_role, below, is defined as: 183 * 184 * bits 0:3 - total guest paging levels (2-4, or zero for real mode) 185 * bits 4:7 - page table level for this shadow (1-4) 186 * bits 8:9 - page table quadrant for 2-level guests 187 * bit 16 - direct mapping of virtual to physical mapping at gfn 188 * used for real mode and two-dimensional paging 189 * bits 17:19 - common access permissions for all ptes in this shadow page 190 */ 191union kvm_mmu_page_role { 192 unsigned word; 193 struct { 194 unsigned level:4; 195 unsigned cr4_pae:1; 196 unsigned quadrant:2; 197 unsigned pad_for_nice_hex_output:6; 198 unsigned direct:1; 199 unsigned access:3; 200 unsigned invalid:1; 201 unsigned nxe:1; 202 unsigned cr0_wp:1; 203 unsigned smep_andnot_wp:1; 204 }; 205}; 206 207struct kvm_mmu_page { 208 struct list_head link; 209 struct hlist_node hash_link; 210 211 /* 212 * The following two entries are used to key the shadow page in the 213 * hash table. 214 */ 215 gfn_t gfn; 216 union kvm_mmu_page_role role; 217 218 u64 *spt; 219 /* hold the gfn of each spte inside spt */ 220 gfn_t *gfns; 221 bool unsync; 222 int root_count; /* Currently serving as active root */ 223 unsigned int unsync_children; 224 unsigned long parent_ptes; /* Reverse mapping for parent_pte */ 225 226 /* The page is obsolete if mmu_valid_gen != kvm->arch.mmu_valid_gen. */ 227 unsigned long mmu_valid_gen; 228 229 DECLARE_BITMAP(unsync_child_bitmap, 512); 230 231#ifdef CONFIG_X86_32 232 /* 233 * Used out of the mmu-lock to avoid reading spte values while an 234 * update is in progress; see the comments in __get_spte_lockless(). 235 */ 236 int clear_spte_count; 237#endif 238 239 /* Number of writes since the last time traversal visited this page. */ 240 int write_flooding_count; 241}; 242 243struct kvm_pio_request { 244 unsigned long count; 245 int in; 246 int port; 247 int size; 248}; 249 250/* 251 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level 252 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu 253 * mode. 254 */ 255struct kvm_mmu { 256 void (*new_cr3)(struct kvm_vcpu *vcpu); 257 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root); 258 unsigned long (*get_cr3)(struct kvm_vcpu *vcpu); 259 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); 260 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err, 261 bool prefault); 262 void (*inject_page_fault)(struct kvm_vcpu *vcpu, 263 struct x86_exception *fault); 264 void (*free)(struct kvm_vcpu *vcpu); 265 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access, 266 struct x86_exception *exception); 267 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access); 268 int (*sync_page)(struct kvm_vcpu *vcpu, 269 struct kvm_mmu_page *sp); 270 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva); 271 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 272 u64 *spte, const void *pte); 273 hpa_t root_hpa; 274 int root_level; 275 int shadow_root_level; 276 union kvm_mmu_page_role base_role; 277 bool direct_map; 278 279 /* 280 * Bitmap; bit set = permission fault 281 * Byte index: page fault error code [4:1] 282 * Bit index: pte permissions in ACC_* format 283 */ 284 u8 permissions[16]; 285 286 u64 *pae_root; 287 u64 *lm_root; 288 u64 rsvd_bits_mask[2][4]; 289 u64 bad_mt_xwr; 290 291 /* 292 * Bitmap: bit set = last pte in walk 293 * index[0:1]: level (zero-based) 294 * index[2]: pte.ps 295 */ 296 u8 last_pte_bitmap; 297 298 bool nx; 299 300 u64 pdptrs[4]; /* pae */ 301}; 302 303enum pmc_type { 304 KVM_PMC_GP = 0, 305 KVM_PMC_FIXED, 306}; 307 308struct kvm_pmc { 309 enum pmc_type type; 310 u8 idx; 311 u64 counter; 312 u64 eventsel; 313 struct perf_event *perf_event; 314 struct kvm_vcpu *vcpu; 315}; 316 317struct kvm_pmu { 318 unsigned nr_arch_gp_counters; 319 unsigned nr_arch_fixed_counters; 320 unsigned available_event_types; 321 u64 fixed_ctr_ctrl; 322 u64 global_ctrl; 323 u64 global_status; 324 u64 global_ovf_ctrl; 325 u64 counter_bitmask[2]; 326 u64 global_ctrl_mask; 327 u64 reserved_bits; 328 u8 version; 329 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC]; 330 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED]; 331 struct irq_work irq_work; 332 u64 reprogram_pmi; 333}; 334 335struct kvm_vcpu_arch { 336 /* 337 * rip and regs accesses must go through 338 * kvm_{register,rip}_{read,write} functions. 339 */ 340 unsigned long regs[NR_VCPU_REGS]; 341 u32 regs_avail; 342 u32 regs_dirty; 343 344 unsigned long cr0; 345 unsigned long cr0_guest_owned_bits; 346 unsigned long cr2; 347 unsigned long cr3; 348 unsigned long cr4; 349 unsigned long cr4_guest_owned_bits; 350 unsigned long cr8; 351 u32 hflags; 352 u64 efer; 353 u64 apic_base; 354 struct kvm_lapic *apic; /* kernel irqchip context */ 355 unsigned long apic_attention; 356 int32_t apic_arb_prio; 357 int mp_state; 358 u64 ia32_misc_enable_msr; 359 bool tpr_access_reporting; 360 361 /* 362 * Paging state of the vcpu 363 * 364 * If the vcpu runs in guest mode with two level paging this still saves 365 * the paging mode of the l1 guest. This context is always used to 366 * handle faults. 367 */ 368 struct kvm_mmu mmu; 369 370 /* 371 * Paging state of an L2 guest (used for nested npt) 372 * 373 * This context will save all necessary information to walk page tables 374 * of the an L2 guest. This context is only initialized for page table 375 * walking and not for faulting since we never handle l2 page faults on 376 * the host. 377 */ 378 struct kvm_mmu nested_mmu; 379 380 /* 381 * Pointer to the mmu context currently used for 382 * gva_to_gpa translations. 383 */ 384 struct kvm_mmu *walk_mmu; 385 386 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; 387 struct kvm_mmu_memory_cache mmu_page_cache; 388 struct kvm_mmu_memory_cache mmu_page_header_cache; 389 390 struct fpu guest_fpu; 391 u64 xcr0; 392 393 struct kvm_pio_request pio; 394 void *pio_data; 395 396 u8 event_exit_inst_len; 397 398 struct kvm_queued_exception { 399 bool pending; 400 bool has_error_code; 401 bool reinject; 402 u8 nr; 403 u32 error_code; 404 } exception; 405 406 struct kvm_queued_interrupt { 407 bool pending; 408 bool soft; 409 u8 nr; 410 } interrupt; 411 412 int halt_request; /* real mode on Intel only */ 413 414 int cpuid_nent; 415 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES]; 416 /* emulate context */ 417 418 struct x86_emulate_ctxt emulate_ctxt; 419 bool emulate_regs_need_sync_to_vcpu; 420 bool emulate_regs_need_sync_from_vcpu; 421 int (*complete_userspace_io)(struct kvm_vcpu *vcpu); 422 423 gpa_t time; 424 struct pvclock_vcpu_time_info hv_clock; 425 unsigned int hw_tsc_khz; 426 struct gfn_to_hva_cache pv_time; 427 bool pv_time_enabled; 428 /* set guest stopped flag in pvclock flags field */ 429 bool pvclock_set_guest_stopped_request; 430 431 struct { 432 u64 msr_val; 433 u64 last_steal; 434 u64 accum_steal; 435 struct gfn_to_hva_cache stime; 436 struct kvm_steal_time steal; 437 } st; 438 439 u64 last_guest_tsc; 440 u64 last_kernel_ns; 441 u64 last_host_tsc; 442 u64 tsc_offset_adjustment; 443 u64 this_tsc_nsec; 444 u64 this_tsc_write; 445 u8 this_tsc_generation; 446 bool tsc_catchup; 447 bool tsc_always_catchup; 448 s8 virtual_tsc_shift; 449 u32 virtual_tsc_mult; 450 u32 virtual_tsc_khz; 451 s64 ia32_tsc_adjust_msr; 452 453 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ 454 unsigned nmi_pending; /* NMI queued after currently running handler */ 455 bool nmi_injected; /* Trying to inject an NMI this entry */ 456 457 struct mtrr_state_type mtrr_state; 458 u32 pat; 459 460 int switch_db_regs; 461 unsigned long db[KVM_NR_DB_REGS]; 462 unsigned long dr6; 463 unsigned long dr7; 464 unsigned long eff_db[KVM_NR_DB_REGS]; 465 unsigned long guest_debug_dr7; 466 467 u64 mcg_cap; 468 u64 mcg_status; 469 u64 mcg_ctl; 470 u64 *mce_banks; 471 472 /* Cache MMIO info */ 473 u64 mmio_gva; 474 unsigned access; 475 gfn_t mmio_gfn; 476 477 struct kvm_pmu pmu; 478 479 /* used for guest single stepping over the given code position */ 480 unsigned long singlestep_rip; 481 482 /* fields used by HYPER-V emulation */ 483 u64 hv_vapic; 484 485 cpumask_var_t wbinvd_dirty_mask; 486 487 unsigned long last_retry_eip; 488 unsigned long last_retry_addr; 489 490 struct { 491 bool halted; 492 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)]; 493 struct gfn_to_hva_cache data; 494 u64 msr_val; 495 u32 id; 496 bool send_user_only; 497 } apf; 498 499 /* OSVW MSRs (AMD only) */ 500 struct { 501 u64 length; 502 u64 status; 503 } osvw; 504 505 struct { 506 u64 msr_val; 507 struct gfn_to_hva_cache data; 508 } pv_eoi; 509 510 /* 511 * Indicate whether the access faults on its page table in guest 512 * which is set when fix page fault and used to detect unhandeable 513 * instruction. 514 */ 515 bool write_fault_to_shadow_pgtable; 516 517 /* set at EPT violation at this point */ 518 unsigned long exit_qualification; 519 520 /* pv related host specific info */ 521 struct { 522 bool pv_unhalted; 523 } pv; 524}; 525 526struct kvm_lpage_info { 527 int write_count; 528}; 529 530struct kvm_arch_memory_slot { 531 unsigned long *rmap[KVM_NR_PAGE_SIZES]; 532 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1]; 533}; 534 535struct kvm_apic_map { 536 struct rcu_head rcu; 537 u8 ldr_bits; 538 /* fields bellow are used to decode ldr values in different modes */ 539 u32 cid_shift, cid_mask, lid_mask; 540 struct kvm_lapic *phys_map[256]; 541 /* first index is cluster id second is cpu id in a cluster */ 542 struct kvm_lapic *logical_map[16][16]; 543}; 544 545struct kvm_arch { 546 unsigned int n_used_mmu_pages; 547 unsigned int n_requested_mmu_pages; 548 unsigned int n_max_mmu_pages; 549 unsigned int indirect_shadow_pages; 550 unsigned long mmu_valid_gen; 551 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; 552 /* 553 * Hash table of struct kvm_mmu_page. 554 */ 555 struct list_head active_mmu_pages; 556 struct list_head zapped_obsolete_pages; 557 558 struct list_head assigned_dev_head; 559 struct iommu_domain *iommu_domain; 560 int iommu_flags; 561 struct kvm_pic *vpic; 562 struct kvm_ioapic *vioapic; 563 struct kvm_pit *vpit; 564 int vapics_in_nmi_mode; 565 struct mutex apic_map_lock; 566 struct kvm_apic_map *apic_map; 567 568 unsigned int tss_addr; 569 struct page *apic_access_page; 570 571 gpa_t wall_clock; 572 573 struct page *ept_identity_pagetable; 574 bool ept_identity_pagetable_done; 575 gpa_t ept_identity_map_addr; 576 577 unsigned long irq_sources_bitmap; 578 s64 kvmclock_offset; 579 raw_spinlock_t tsc_write_lock; 580 u64 last_tsc_nsec; 581 u64 last_tsc_write; 582 u32 last_tsc_khz; 583 u64 cur_tsc_nsec; 584 u64 cur_tsc_write; 585 u64 cur_tsc_offset; 586 u8 cur_tsc_generation; 587 int nr_vcpus_matched_tsc; 588 589 spinlock_t pvclock_gtod_sync_lock; 590 bool use_master_clock; 591 u64 master_kernel_ns; 592 cycle_t master_cycle_now; 593 594 struct kvm_xen_hvm_config xen_hvm_config; 595 596 /* fields used by HYPER-V emulation */ 597 u64 hv_guest_os_id; 598 u64 hv_hypercall; 599 600 #ifdef CONFIG_KVM_MMU_AUDIT 601 int audit_point; 602 #endif 603}; 604 605struct kvm_vm_stat { 606 u32 mmu_shadow_zapped; 607 u32 mmu_pte_write; 608 u32 mmu_pte_updated; 609 u32 mmu_pde_zapped; 610 u32 mmu_flooded; 611 u32 mmu_recycled; 612 u32 mmu_cache_miss; 613 u32 mmu_unsync; 614 u32 remote_tlb_flush; 615 u32 lpages; 616}; 617 618struct kvm_vcpu_stat { 619 u32 pf_fixed; 620 u32 pf_guest; 621 u32 tlb_flush; 622 u32 invlpg; 623 624 u32 exits; 625 u32 io_exits; 626 u32 mmio_exits; 627 u32 signal_exits; 628 u32 irq_window_exits; 629 u32 nmi_window_exits; 630 u32 halt_exits; 631 u32 halt_wakeup; 632 u32 request_irq_exits; 633 u32 irq_exits; 634 u32 host_state_reload; 635 u32 efer_reload; 636 u32 fpu_reload; 637 u32 insn_emulation; 638 u32 insn_emulation_fail; 639 u32 hypercalls; 640 u32 irq_injections; 641 u32 nmi_injections; 642}; 643 644struct x86_instruction_info; 645 646struct msr_data { 647 bool host_initiated; 648 u32 index; 649 u64 data; 650}; 651 652struct kvm_x86_ops { 653 int (*cpu_has_kvm_support)(void); /* __init */ 654 int (*disabled_by_bios)(void); /* __init */ 655 int (*hardware_enable)(void *dummy); 656 void (*hardware_disable)(void *dummy); 657 void (*check_processor_compatibility)(void *rtn); 658 int (*hardware_setup)(void); /* __init */ 659 void (*hardware_unsetup)(void); /* __exit */ 660 bool (*cpu_has_accelerated_tpr)(void); 661 void (*cpuid_update)(struct kvm_vcpu *vcpu); 662 663 /* Create, but do not attach this VCPU */ 664 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id); 665 void (*vcpu_free)(struct kvm_vcpu *vcpu); 666 void (*vcpu_reset)(struct kvm_vcpu *vcpu); 667 668 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); 669 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); 670 void (*vcpu_put)(struct kvm_vcpu *vcpu); 671 672 void (*update_db_bp_intercept)(struct kvm_vcpu *vcpu); 673 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata); 674 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 675 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); 676 void (*get_segment)(struct kvm_vcpu *vcpu, 677 struct kvm_segment *var, int seg); 678 int (*get_cpl)(struct kvm_vcpu *vcpu); 679 void (*set_segment)(struct kvm_vcpu *vcpu, 680 struct kvm_segment *var, int seg); 681 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 682 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu); 683 void (*decache_cr3)(struct kvm_vcpu *vcpu); 684 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu); 685 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 686 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 687 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 688 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 689 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 690 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 691 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 692 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 693 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); 694 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); 695 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 696 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 697 void (*fpu_activate)(struct kvm_vcpu *vcpu); 698 void (*fpu_deactivate)(struct kvm_vcpu *vcpu); 699 700 void (*tlb_flush)(struct kvm_vcpu *vcpu); 701 702 void (*run)(struct kvm_vcpu *vcpu); 703 int (*handle_exit)(struct kvm_vcpu *vcpu); 704 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); 705 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 706 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 707 void (*patch_hypercall)(struct kvm_vcpu *vcpu, 708 unsigned char *hypercall_addr); 709 void (*set_irq)(struct kvm_vcpu *vcpu); 710 void (*set_nmi)(struct kvm_vcpu *vcpu); 711 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr, 712 bool has_error_code, u32 error_code, 713 bool reinject); 714 void (*cancel_injection)(struct kvm_vcpu *vcpu); 715 int (*interrupt_allowed)(struct kvm_vcpu *vcpu); 716 int (*nmi_allowed)(struct kvm_vcpu *vcpu); 717 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); 718 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); 719 int (*enable_nmi_window)(struct kvm_vcpu *vcpu); 720 int (*enable_irq_window)(struct kvm_vcpu *vcpu); 721 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); 722 int (*vm_has_apicv)(struct kvm *kvm); 723 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); 724 void (*hwapic_isr_update)(struct kvm *kvm, int isr); 725 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); 726 void (*set_virtual_x2apic_mode)(struct kvm_vcpu *vcpu, bool set); 727 void (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector); 728 void (*sync_pir_to_irr)(struct kvm_vcpu *vcpu); 729 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); 730 int (*get_tdp_level)(void); 731 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); 732 int (*get_lpage_level)(void); 733 bool (*rdtscp_supported)(void); 734 bool (*invpcid_supported)(void); 735 void (*adjust_tsc_offset)(struct kvm_vcpu *vcpu, s64 adjustment, bool host); 736 737 void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 738 739 void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry); 740 741 bool (*has_wbinvd_exit)(void); 742 743 void (*set_tsc_khz)(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale); 744 u64 (*read_tsc_offset)(struct kvm_vcpu *vcpu); 745 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); 746 747 u64 (*compute_tsc_offset)(struct kvm_vcpu *vcpu, u64 target_tsc); 748 u64 (*read_l1_tsc)(struct kvm_vcpu *vcpu, u64 host_tsc); 749 750 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2); 751 752 int (*check_intercept)(struct kvm_vcpu *vcpu, 753 struct x86_instruction_info *info, 754 enum x86_intercept_stage stage); 755 void (*handle_external_intr)(struct kvm_vcpu *vcpu); 756}; 757 758struct kvm_arch_async_pf { 759 u32 token; 760 gfn_t gfn; 761 unsigned long cr3; 762 bool direct_map; 763}; 764 765extern struct kvm_x86_ops *kvm_x86_ops; 766 767static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu, 768 s64 adjustment) 769{ 770 kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, false); 771} 772 773static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment) 774{ 775 kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, true); 776} 777 778int kvm_mmu_module_init(void); 779void kvm_mmu_module_exit(void); 780 781void kvm_mmu_destroy(struct kvm_vcpu *vcpu); 782int kvm_mmu_create(struct kvm_vcpu *vcpu); 783int kvm_mmu_setup(struct kvm_vcpu *vcpu); 784void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, 785 u64 dirty_mask, u64 nx_mask, u64 x_mask); 786 787int kvm_mmu_reset_context(struct kvm_vcpu *vcpu); 788void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot); 789void kvm_mmu_write_protect_pt_masked(struct kvm *kvm, 790 struct kvm_memory_slot *slot, 791 gfn_t gfn_offset, unsigned long mask); 792void kvm_mmu_zap_all(struct kvm *kvm); 793void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm); 794unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm); 795void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages); 796 797int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3); 798 799int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 800 const void *val, int bytes); 801u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn); 802 803extern bool tdp_enabled; 804 805u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); 806 807/* control of guest tsc rate supported? */ 808extern bool kvm_has_tsc_control; 809/* minimum supported tsc_khz for guests */ 810extern u32 kvm_min_guest_tsc_khz; 811/* maximum supported tsc_khz for guests */ 812extern u32 kvm_max_guest_tsc_khz; 813 814enum emulation_result { 815 EMULATE_DONE, /* no further processing */ 816 EMULATE_USER_EXIT, /* kvm_run ready for userspace exit */ 817 EMULATE_FAIL, /* can't emulate this instruction */ 818}; 819 820#define EMULTYPE_NO_DECODE (1 << 0) 821#define EMULTYPE_TRAP_UD (1 << 1) 822#define EMULTYPE_SKIP (1 << 2) 823#define EMULTYPE_RETRY (1 << 3) 824#define EMULTYPE_NO_REEXECUTE (1 << 4) 825int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2, 826 int emulation_type, void *insn, int insn_len); 827 828static inline int emulate_instruction(struct kvm_vcpu *vcpu, 829 int emulation_type) 830{ 831 return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0); 832} 833 834void kvm_enable_efer_bits(u64); 835bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer); 836int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data); 837int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr); 838 839struct x86_emulate_ctxt; 840 841int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port); 842void kvm_emulate_cpuid(struct kvm_vcpu *vcpu); 843int kvm_emulate_halt(struct kvm_vcpu *vcpu); 844int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); 845 846void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); 847int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); 848void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, unsigned int vector); 849 850int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index, 851 int reason, bool has_error_code, u32 error_code); 852 853int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 854int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); 855int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 856int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); 857int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); 858int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); 859unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); 860void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); 861void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); 862int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr); 863 864int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata); 865int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 866 867unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); 868void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); 869bool kvm_rdpmc(struct kvm_vcpu *vcpu); 870 871void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); 872void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 873void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); 874void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 875void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 876int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 877 gfn_t gfn, void *data, int offset, int len, 878 u32 access); 879void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 880bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); 881 882static inline int __kvm_irq_line_state(unsigned long *irq_state, 883 int irq_source_id, int level) 884{ 885 /* Logical OR for level trig interrupt */ 886 if (level) 887 __set_bit(irq_source_id, irq_state); 888 else 889 __clear_bit(irq_source_id, irq_state); 890 891 return !!(*irq_state); 892} 893 894int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level); 895void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id); 896 897void kvm_inject_nmi(struct kvm_vcpu *vcpu); 898 899int fx_init(struct kvm_vcpu *vcpu); 900 901void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu); 902void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, 903 const u8 *new, int bytes); 904int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); 905int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); 906void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); 907int kvm_mmu_load(struct kvm_vcpu *vcpu); 908void kvm_mmu_unload(struct kvm_vcpu *vcpu); 909void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu); 910gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access); 911gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, 912 struct x86_exception *exception); 913gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, 914 struct x86_exception *exception); 915gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 916 struct x86_exception *exception); 917gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, 918 struct x86_exception *exception); 919 920int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 921 922int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code, 923 void *insn, int insn_len); 924void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); 925 926void kvm_enable_tdp(void); 927void kvm_disable_tdp(void); 928 929int complete_pio(struct kvm_vcpu *vcpu); 930bool kvm_check_iopl(struct kvm_vcpu *vcpu); 931 932static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access) 933{ 934 return gpa; 935} 936 937static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) 938{ 939 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT); 940 941 return (struct kvm_mmu_page *)page_private(page); 942} 943 944static inline u16 kvm_read_ldt(void) 945{ 946 u16 ldt; 947 asm("sldt %0" : "=g"(ldt)); 948 return ldt; 949} 950 951static inline void kvm_load_ldt(u16 sel) 952{ 953 asm("lldt %0" : : "rm"(sel)); 954} 955 956#ifdef CONFIG_X86_64 957static inline unsigned long read_msr(unsigned long msr) 958{ 959 u64 value; 960 961 rdmsrl(msr, value); 962 return value; 963} 964#endif 965 966static inline u32 get_rdx_init_val(void) 967{ 968 return 0x600; /* P6 family */ 969} 970 971static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) 972{ 973 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 974} 975 976#define TSS_IOPB_BASE_OFFSET 0x66 977#define TSS_BASE_SIZE 0x68 978#define TSS_IOPB_SIZE (65536 / 8) 979#define TSS_REDIRECTION_SIZE (256 / 8) 980#define RMODE_TSS_SIZE \ 981 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) 982 983enum { 984 TASK_SWITCH_CALL = 0, 985 TASK_SWITCH_IRET = 1, 986 TASK_SWITCH_JMP = 2, 987 TASK_SWITCH_GATE = 3, 988}; 989 990#define HF_GIF_MASK (1 << 0) 991#define HF_HIF_MASK (1 << 1) 992#define HF_VINTR_MASK (1 << 2) 993#define HF_NMI_MASK (1 << 3) 994#define HF_IRET_MASK (1 << 4) 995#define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ 996 997/* 998 * Hardware virtualization extension instructions may fault if a 999 * reboot turns off virtualization while processes are running. 1000 * Trap the fault and ignore the instruction if that happens. 1001 */ 1002asmlinkage void kvm_spurious_fault(void); 1003 1004#define ____kvm_handle_fault_on_reboot(insn, cleanup_insn) \ 1005 "666: " insn "\n\t" \ 1006 "668: \n\t" \ 1007 ".pushsection .fixup, \"ax\" \n" \ 1008 "667: \n\t" \ 1009 cleanup_insn "\n\t" \ 1010 "cmpb $0, kvm_rebooting \n\t" \ 1011 "jne 668b \n\t" \ 1012 __ASM_SIZE(push) " $666b \n\t" \ 1013 "call kvm_spurious_fault \n\t" \ 1014 ".popsection \n\t" \ 1015 _ASM_EXTABLE(666b, 667b) 1016 1017#define __kvm_handle_fault_on_reboot(insn) \ 1018 ____kvm_handle_fault_on_reboot(insn, "") 1019 1020#define KVM_ARCH_WANT_MMU_NOTIFIER 1021int kvm_unmap_hva(struct kvm *kvm, unsigned long hva); 1022int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end); 1023int kvm_age_hva(struct kvm *kvm, unsigned long hva); 1024int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); 1025void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); 1026int cpuid_maxphyaddr(struct kvm_vcpu *vcpu); 1027int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); 1028int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); 1029int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); 1030int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 1031void kvm_vcpu_reset(struct kvm_vcpu *vcpu); 1032 1033void kvm_define_shared_msr(unsigned index, u32 msr); 1034void kvm_set_shared_msr(unsigned index, u64 val, u64 mask); 1035 1036bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 1037 1038void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, 1039 struct kvm_async_pf *work); 1040void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, 1041 struct kvm_async_pf *work); 1042void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, 1043 struct kvm_async_pf *work); 1044bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu); 1045extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); 1046 1047void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); 1048 1049int kvm_is_in_guest(void); 1050 1051void kvm_pmu_init(struct kvm_vcpu *vcpu); 1052void kvm_pmu_destroy(struct kvm_vcpu *vcpu); 1053void kvm_pmu_reset(struct kvm_vcpu *vcpu); 1054void kvm_pmu_cpuid_update(struct kvm_vcpu *vcpu); 1055bool kvm_pmu_msr(struct kvm_vcpu *vcpu, u32 msr); 1056int kvm_pmu_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *data); 1057int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info); 1058int kvm_pmu_read_pmc(struct kvm_vcpu *vcpu, unsigned pmc, u64 *data); 1059void kvm_handle_pmu_event(struct kvm_vcpu *vcpu); 1060void kvm_deliver_pmi(struct kvm_vcpu *vcpu); 1061 1062#endif /* _ASM_X86_KVM_HOST_H */ 1063