DNBArchImpl.h revision 1f5c0c368c1dfeb67b3b9fca8ef869206554e25a 
1//===-- DNBArchImpl.h -------------------------------------------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10//  Created by Greg Clayton on 6/25/07.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef __DebugNubArchMachARM_h__
15#define __DebugNubArchMachARM_h__
16
17#if defined (__arm__)
18
19#include "DNBArch.h"
20#include <ARMDisassembler/ARMDisassembler.h>
21
22class MachThread;
23
24class DNBArchMachARM : public DNBArchProtocol
25{
26public:
27    enum { kMaxNumThumbITBreakpoints = 4 };
28
29    DNBArchMachARM(MachThread *thread) :
30        m_thread(thread),
31        m_state(),
32        m_hw_single_chained_step_addr(INVALID_NUB_ADDRESS),
33        m_sw_single_step_next_pc(INVALID_NUB_ADDRESS),
34        m_sw_single_step_break_id(INVALID_NUB_BREAK_ID),
35        m_sw_single_step_itblock_break_count(0),
36        m_last_decode_pc(INVALID_NUB_ADDRESS)
37    {
38        memset(&m_dbg_save, 0, sizeof(m_dbg_save));
39        ThumbStaticsInit(&m_last_decode_thumb);
40        for (int i = 0; i < kMaxNumThumbITBreakpoints; i++)
41            m_sw_single_step_itblock_break_id[i] = INVALID_NUB_BREAK_ID;
42    }
43
44    virtual ~DNBArchMachARM()
45    {
46    }
47
48    static void Initialize();
49    static const DNBRegisterSetInfo *
50    GetRegisterSetInfo(nub_size_t *num_reg_sets);
51
52    virtual bool            GetRegisterValue(int set, int reg, DNBRegisterValue *value);
53    virtual bool            SetRegisterValue(int set, int reg, const DNBRegisterValue *value);
54    virtual nub_size_t      GetRegisterContext (void *buf, nub_size_t buf_len);
55    virtual nub_size_t      SetRegisterContext (const void *buf, nub_size_t buf_len);
56
57    virtual kern_return_t   GetRegisterState  (int set, bool force);
58    virtual kern_return_t   SetRegisterState  (int set);
59    virtual bool            RegisterSetStateIsValid (int set) const;
60
61    virtual uint64_t        GetPC(uint64_t failValue);    // Get program counter
62    virtual kern_return_t   SetPC(uint64_t value);
63    virtual uint64_t        GetSP(uint64_t failValue);    // Get stack pointer
64    virtual void            ThreadWillResume();
65    virtual bool            ThreadDidStop();
66
67    static DNBArchProtocol *Create (MachThread *thread);
68    static const uint8_t * const SoftwareBreakpointOpcode (nub_size_t byte_size);
69    static uint32_t         GetCPUType();
70
71    virtual uint32_t        NumSupportedHardwareBreakpoints();
72    virtual uint32_t        NumSupportedHardwareWatchpoints();
73    virtual uint32_t        EnableHardwareBreakpoint (nub_addr_t addr, nub_size_t size);
74    virtual uint32_t        EnableHardwareWatchpoint (nub_addr_t addr, nub_size_t size, bool read, bool write);
75    virtual bool            DisableHardwareBreakpoint (uint32_t hw_break_index);
76    virtual bool            DisableHardwareWatchpoint (uint32_t hw_break_index);
77    virtual bool            StepNotComplete ();
78
79    typedef arm_debug_state_t DBG;
80
81protected:
82
83
84    kern_return_t           EnableHardwareSingleStep (bool enable);
85    kern_return_t           SetSingleStepSoftwareBreakpoints ();
86
87    bool                    ConditionPassed(uint8_t condition, uint32_t cpsr);
88    bool                    ComputeNextPC(nub_addr_t currentPC, arm_decoded_instruction_t decodedInstruction, bool currentPCIsThumb, nub_addr_t *targetPC);
89    void                    EvaluateNextInstructionForSoftwareBreakpointSetup(nub_addr_t currentPC, uint32_t cpsr, bool currentPCIsThumb, nub_addr_t *nextPC, bool *nextPCIsThumb);
90    void                    DecodeITBlockInstructions(nub_addr_t curr_pc);
91    arm_error_t             DecodeInstructionUsingDisassembler(nub_addr_t curr_pc, uint32_t curr_cpsr, arm_decoded_instruction_t *decodedInstruction, thumb_static_data_t *thumbStaticData, nub_addr_t *next_pc);
92    static nub_bool_t       BreakpointHit (nub_process_t pid, nub_thread_t tid, nub_break_t breakID, void *baton);
93
94    typedef enum RegisterSetTag
95    {
96        e_regSetALL = REGISTER_SET_ALL,
97        e_regSetGPR = ARM_THREAD_STATE,
98        e_regSetVFP = ARM_VFP_STATE,
99        e_regSetEXC = ARM_EXCEPTION_STATE,
100        e_regSetDBG = ARM_DEBUG_STATE,
101        kNumRegisterSets
102    } RegisterSet;
103
104    enum
105    {
106        Read = 0,
107        Write = 1,
108        kNumErrors = 2
109    };
110
111    typedef arm_thread_state_t GPR;
112    typedef arm_vfp_state_t FPU;
113    typedef arm_exception_state_t EXC;
114
115    static const DNBRegisterInfo g_gpr_registers[];
116    static const DNBRegisterInfo g_vfp_registers[];
117    static const DNBRegisterInfo g_exc_registers[];
118    static const DNBRegisterSetInfo g_reg_sets[];
119
120    static const size_t k_num_gpr_registers;
121    static const size_t k_num_vfp_registers;
122    static const size_t k_num_exc_registers;
123    static const size_t k_num_all_registers;
124    static const size_t k_num_register_sets;
125
126    struct Context
127    {
128        GPR gpr;
129        FPU vfp;
130        EXC exc;
131    };
132
133    struct State
134    {
135        Context                 context;
136        DBG                     dbg;
137        kern_return_t           gpr_errs[2];    // Read/Write errors
138        kern_return_t           vfp_errs[2];    // Read/Write errors
139        kern_return_t           exc_errs[2];    // Read/Write errors
140        kern_return_t           dbg_errs[2];    // Read/Write errors
141        State()
142        {
143            uint32_t i;
144            for (i=0; i<kNumErrors; i++)
145            {
146                gpr_errs[i] = -1;
147                vfp_errs[i] = -1;
148                exc_errs[i] = -1;
149                dbg_errs[i] = -1;
150            }
151        }
152        void InvalidateRegisterSetState(int set)
153        {
154            SetError (set, Read, -1);
155        }
156        kern_return_t GetError (int set, uint32_t err_idx) const
157        {
158            if (err_idx < kNumErrors)
159            {
160                switch (set)
161                {
162                // When getting all errors, just OR all values together to see if
163                // we got any kind of error.
164                case e_regSetALL:   return gpr_errs[err_idx] |
165                                           vfp_errs[err_idx] |
166                                           exc_errs[err_idx] |
167                                           dbg_errs[err_idx] ;
168                case e_regSetGPR:   return gpr_errs[err_idx];
169                case e_regSetVFP:   return vfp_errs[err_idx];
170                case e_regSetEXC:   return exc_errs[err_idx];
171                case e_regSetDBG:   return dbg_errs[err_idx];
172                default: break;
173                }
174            }
175            return -1;
176        }
177        bool SetError (int set, uint32_t err_idx, kern_return_t err)
178        {
179            if (err_idx < kNumErrors)
180            {
181                switch (set)
182                {
183                case e_regSetALL:
184                    gpr_errs[err_idx] = err;
185                    vfp_errs[err_idx] = err;
186                    dbg_errs[err_idx] = err;
187                    exc_errs[err_idx] = err;
188                    return true;
189
190                case e_regSetGPR:
191                    gpr_errs[err_idx] = err;
192                    return true;
193
194                case e_regSetVFP:
195                    vfp_errs[err_idx] = err;
196                    return true;
197
198                case e_regSetEXC:
199                    exc_errs[err_idx] = err;
200                    return true;
201
202                case e_regSetDBG:
203                    dbg_errs[err_idx] = err;
204                    return true;
205                default: break;
206                }
207            }
208            return false;
209        }
210        bool RegsAreValid (int set) const
211        {
212            return GetError(set, Read) == KERN_SUCCESS;
213        }
214    };
215
216    kern_return_t GetGPRState (bool force);
217    kern_return_t GetVFPState (bool force);
218    kern_return_t GetEXCState (bool force);
219    kern_return_t GetDBGState (bool force);
220
221    kern_return_t SetGPRState ();
222    kern_return_t SetVFPState ();
223    kern_return_t SetEXCState ();
224    kern_return_t SetDBGState ();
225protected:
226    MachThread *    m_thread;
227    State           m_state;
228    arm_debug_state_t m_dbg_save;
229    nub_addr_t      m_hw_single_chained_step_addr;
230    // Software single stepping support
231    nub_addr_t      m_sw_single_step_next_pc;
232    nub_break_t     m_sw_single_step_break_id;
233    nub_break_t     m_sw_single_step_itblock_break_id[kMaxNumThumbITBreakpoints];
234    nub_addr_t      m_sw_single_step_itblock_break_count;
235    // Disassembler state
236    thumb_static_data_t m_last_decode_thumb;
237    arm_decoded_instruction_t m_last_decode_arm;
238    nub_addr_t      m_last_decode_pc;
239
240};
241
242#endif    // #if defined (__arm__)
243#endif    // #ifndef __DebugNubArchMachARM_h__
244