DNBArchImpl.h revision 20d338fad87eba91de65aa9bec76e01c04472848 
1//===-- DNBArchImpl.h -------------------------------------------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10//  Created by Greg Clayton on 6/25/07.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef __DebugNubArchMachARM_h__
15#define __DebugNubArchMachARM_h__
16
17#if defined (__arm__)
18
19#include "DNBArch.h"
20#include <ARMDisassembler/ARMDisassembler.h>
21
22class MachThread;
23
24class DNBArchMachARM : public DNBArchProtocol
25{
26public:
27    enum { kMaxNumThumbITBreakpoints = 4 };
28
29    DNBArchMachARM(MachThread *thread) :
30        m_thread(thread),
31        m_state(),
32        m_hw_single_chained_step_addr(INVALID_NUB_ADDRESS),
33        m_sw_single_step_next_pc(INVALID_NUB_ADDRESS),
34        m_sw_single_step_break_id(INVALID_NUB_BREAK_ID),
35        m_sw_single_step_itblock_break_count(0),
36        m_last_decode_pc(INVALID_NUB_ADDRESS)
37    {
38        memset(&m_dbg_save, 0, sizeof(m_dbg_save));
39        ThumbStaticsInit(&m_last_decode_thumb);
40        for (int i = 0; i < kMaxNumThumbITBreakpoints; i++)
41            m_sw_single_step_itblock_break_id[i] = INVALID_NUB_BREAK_ID;
42    }
43
44    virtual ~DNBArchMachARM()
45    {
46    }
47
48    static const DNBRegisterSetInfo *
49    GetRegisterSetInfo(nub_size_t *num_reg_sets);
50
51    virtual bool            GetRegisterValue(int set, int reg, DNBRegisterValue *value);
52    virtual bool            SetRegisterValue(int set, int reg, const DNBRegisterValue *value);
53    virtual nub_size_t      GetRegisterContext (void *buf, nub_size_t buf_len);
54    virtual nub_size_t      SetRegisterContext (const void *buf, nub_size_t buf_len);
55
56    virtual kern_return_t   GetRegisterState  (int set, bool force);
57    virtual kern_return_t   SetRegisterState  (int set);
58    virtual bool            RegisterSetStateIsValid (int set) const;
59
60    virtual uint64_t        GetPC(uint64_t failValue);    // Get program counter
61    virtual kern_return_t   SetPC(uint64_t value);
62    virtual uint64_t        GetSP(uint64_t failValue);    // Get stack pointer
63    virtual void            ThreadWillResume();
64    virtual bool            ThreadDidStop();
65
66    static const uint8_t * const SoftwareBreakpointOpcode (nub_size_t byte_size);
67    static uint32_t         GetCPUType();
68
69    virtual uint32_t        NumSupportedHardwareBreakpoints();
70    virtual uint32_t        NumSupportedHardwareWatchpoints();
71    virtual uint32_t        EnableHardwareBreakpoint (nub_addr_t addr, nub_size_t size);
72    virtual uint32_t        EnableHardwareWatchpoint (nub_addr_t addr, nub_size_t size, bool read, bool write);
73    virtual bool            DisableHardwareBreakpoint (uint32_t hw_break_index);
74    virtual bool            DisableHardwareWatchpoint (uint32_t hw_break_index);
75    virtual bool            StepNotComplete ();
76
77protected:
78
79
80    kern_return_t           EnableHardwareSingleStep (bool enable);
81    kern_return_t           SetSingleStepSoftwareBreakpoints ();
82
83    bool                    ConditionPassed(uint8_t condition, uint32_t cpsr);
84    bool                    ComputeNextPC(nub_addr_t currentPC, arm_decoded_instruction_t decodedInstruction, bool currentPCIsThumb, nub_addr_t *targetPC);
85    void                    EvaluateNextInstructionForSoftwareBreakpointSetup(nub_addr_t currentPC, uint32_t cpsr, bool currentPCIsThumb, nub_addr_t *nextPC, bool *nextPCIsThumb);
86    void                    DecodeITBlockInstructions(nub_addr_t curr_pc);
87    arm_error_t             DecodeInstructionUsingDisassembler(nub_addr_t curr_pc, uint32_t curr_cpsr, arm_decoded_instruction_t *decodedInstruction, thumb_static_data_t *thumbStaticData, nub_addr_t *next_pc);
88    static nub_bool_t       BreakpointHit (nub_process_t pid, nub_thread_t tid, nub_break_t breakID, void *baton);
89
90    typedef enum RegisterSetTag
91    {
92        e_regSetALL = REGISTER_SET_ALL,
93        e_regSetGPR = ARM_THREAD_STATE,
94        e_regSetVFP = ARM_VFP_STATE,
95        e_regSetEXC = ARM_EXCEPTION_STATE,
96        e_regSetDBG = ARM_DEBUG_STATE,
97        kNumRegisterSets
98    } RegisterSet;
99
100    enum
101    {
102        Read = 0,
103        Write = 1,
104        kNumErrors = 2
105    };
106
107    typedef arm_thread_state_t GPR;
108    typedef arm_vfp_state_t FPU;
109    typedef arm_exception_state_t EXC;
110
111    static const DNBRegisterInfo g_gpr_registers[];
112    static const DNBRegisterInfo g_vfp_registers[];
113    static const DNBRegisterInfo g_exc_registers[];
114    static const DNBRegisterSetInfo g_reg_sets[];
115
116    static const size_t k_num_gpr_registers;
117    static const size_t k_num_vfp_registers;
118    static const size_t k_num_exc_registers;
119    static const size_t k_num_all_registers;
120    static const size_t k_num_register_sets;
121
122    struct Context
123    {
124        GPR gpr;
125        FPU vfp;
126        EXC exc;
127    };
128
129    struct State
130    {
131        Context                 context;
132        arm_debug_state_t       dbg;
133        kern_return_t           gpr_errs[2];    // Read/Write errors
134        kern_return_t           vfp_errs[2];    // Read/Write errors
135        kern_return_t           exc_errs[2];    // Read/Write errors
136        kern_return_t           dbg_errs[2];    // Read/Write errors
137        State()
138        {
139            uint32_t i;
140            for (i=0; i<kNumErrors; i++)
141            {
142                gpr_errs[i] = -1;
143                vfp_errs[i] = -1;
144                exc_errs[i] = -1;
145                dbg_errs[i] = -1;
146            }
147        }
148        void InvalidateRegisterSetState(int set)
149        {
150            SetError (set, Read, -1);
151        }
152        kern_return_t GetError (int set, uint32_t err_idx) const
153        {
154            if (err_idx < kNumErrors)
155            {
156                switch (set)
157                {
158                // When getting all errors, just OR all values together to see if
159                // we got any kind of error.
160                case e_regSetALL:   return gpr_errs[err_idx] |
161                                           vfp_errs[err_idx] |
162                                           exc_errs[err_idx] |
163                                           dbg_errs[err_idx] ;
164                case e_regSetGPR:   return gpr_errs[err_idx];
165                case e_regSetVFP:   return vfp_errs[err_idx];
166                case e_regSetEXC:   return exc_errs[err_idx];
167                case e_regSetDBG:   return dbg_errs[err_idx];
168                default: break;
169                }
170            }
171            return -1;
172        }
173        bool SetError (int set, uint32_t err_idx, kern_return_t err)
174        {
175            if (err_idx < kNumErrors)
176            {
177                switch (set)
178                {
179                case e_regSetALL:
180                    gpr_errs[err_idx] = err;
181                    vfp_errs[err_idx] = err;
182                    dbg_errs[err_idx] = err;
183                    exc_errs[err_idx] = err;
184                    return true;
185
186                case e_regSetGPR:
187                    gpr_errs[err_idx] = err;
188                    return true;
189
190                case e_regSetVFP:
191                    vfp_errs[err_idx] = err;
192                    return true;
193
194                case e_regSetEXC:
195                    exc_errs[err_idx] = err;
196                    return true;
197
198                case e_regSetDBG:
199                    dbg_errs[err_idx] = err;
200                    return true;
201                default: break;
202                }
203            }
204            return false;
205        }
206        bool RegsAreValid (int set) const
207        {
208            return GetError(set, Read) == KERN_SUCCESS;
209        }
210    };
211
212    kern_return_t GetGPRState (bool force);
213    kern_return_t GetVFPState (bool force);
214    kern_return_t GetEXCState (bool force);
215    kern_return_t GetDBGState (bool force);
216
217    kern_return_t SetGPRState ();
218    kern_return_t SetVFPState ();
219    kern_return_t SetEXCState ();
220    kern_return_t SetDBGState ();
221protected:
222    MachThread *    m_thread;
223    State           m_state;
224    arm_debug_state_t m_dbg_save;
225    nub_addr_t      m_hw_single_chained_step_addr;
226    // Software single stepping support
227    nub_addr_t      m_sw_single_step_next_pc;
228    nub_break_t     m_sw_single_step_break_id;
229    nub_break_t     m_sw_single_step_itblock_break_id[kMaxNumThumbITBreakpoints];
230    nub_addr_t      m_sw_single_step_itblock_break_count;
231    // Disassembler state
232    thumb_static_data_t m_last_decode_thumb;
233    arm_decoded_instruction_t m_last_decode_arm;
234    nub_addr_t      m_last_decode_pc;
235
236};
237
238#endif    // #if defined (__arm__)
239#endif    // #ifndef __DebugNubArchMachARM_h__
240