DNBArchImpl.h revision 59752d199bb19ffde140b67da147b0afa67f2e88
1//===-- DNBArchImpl.h -------------------------------------------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// Created by Greg Clayton on 6/25/07. 11// 12//===----------------------------------------------------------------------===// 13 14#ifndef __DebugNubArchMachARM_h__ 15#define __DebugNubArchMachARM_h__ 16 17#if defined (__arm__) 18 19#include "DNBArch.h" 20 21class MachThread; 22 23class DNBArchMachARM : public DNBArchProtocol 24{ 25public: 26 enum { kMaxNumThumbITBreakpoints = 4 }; 27 28 DNBArchMachARM(MachThread *thread) : 29 m_thread(thread), 30 m_state(), 31 m_hw_single_chained_step_addr(INVALID_NUB_ADDRESS), 32 m_last_decode_pc(INVALID_NUB_ADDRESS), 33 m_watchpoint_hw_index(-1), 34 m_watchpoint_did_occur(false), 35 m_watchpoint_resume_single_step_enabled(false) 36 { 37 memset(&m_dbg_save, 0, sizeof(m_dbg_save)); 38#if defined (USE_ARM_DISASSEMBLER_FRAMEWORK) 39 ThumbStaticsInit(&m_last_decode_thumb); 40#endif 41 } 42 43 virtual ~DNBArchMachARM() 44 { 45 } 46 47 static void Initialize(); 48 static const DNBRegisterSetInfo * 49 GetRegisterSetInfo(nub_size_t *num_reg_sets); 50 51 virtual bool GetRegisterValue(int set, int reg, DNBRegisterValue *value); 52 virtual bool SetRegisterValue(int set, int reg, const DNBRegisterValue *value); 53 virtual nub_size_t GetRegisterContext (void *buf, nub_size_t buf_len); 54 virtual nub_size_t SetRegisterContext (const void *buf, nub_size_t buf_len); 55 56 virtual kern_return_t GetRegisterState (int set, bool force); 57 virtual kern_return_t SetRegisterState (int set); 58 virtual bool RegisterSetStateIsValid (int set) const; 59 60 virtual uint64_t GetPC(uint64_t failValue); // Get program counter 61 virtual kern_return_t SetPC(uint64_t value); 62 virtual uint64_t GetSP(uint64_t failValue); // Get stack pointer 63 virtual void ThreadWillResume(); 64 virtual bool ThreadDidStop(); 65 virtual bool NotifyException(MachException::Data& exc); 66 67 static DNBArchProtocol *Create (MachThread *thread); 68 static const uint8_t * const SoftwareBreakpointOpcode (nub_size_t byte_size); 69 static uint32_t GetCPUType(); 70 71 virtual uint32_t NumSupportedHardwareBreakpoints(); 72 virtual uint32_t NumSupportedHardwareWatchpoints(); 73 virtual uint32_t EnableHardwareBreakpoint (nub_addr_t addr, nub_size_t size); 74 virtual uint32_t EnableHardwareWatchpoint (nub_addr_t addr, nub_size_t size, bool read, bool write); 75 virtual bool DisableHardwareBreakpoint (uint32_t hw_break_index); 76 virtual bool DisableHardwareWatchpoint (uint32_t hw_break_index); 77 virtual bool EnableHardwareWatchpoint0 (uint32_t hw_break_index, bool Delegate); 78 virtual bool DisableHardwareWatchpoint0 (uint32_t hw_break_index, bool Delegate); 79 virtual bool StepNotComplete (); 80 virtual void HardwareWatchpointStateChanged (); 81 virtual uint32_t GetHardwareWatchpointHit(nub_addr_t &addr); 82 83 typedef arm_debug_state_t DBG; 84 85protected: 86 87 88 kern_return_t EnableHardwareSingleStep (bool enable); 89 kern_return_t SetSingleStepSoftwareBreakpoints (); 90 91 bool ConditionPassed(uint8_t condition, uint32_t cpsr); 92#if defined (USE_ARM_DISASSEMBLER_FRAMEWORK) 93 bool ComputeNextPC(nub_addr_t currentPC, arm_decoded_instruction_t decodedInstruction, bool currentPCIsThumb, nub_addr_t *targetPC); 94 arm_error_t DecodeInstructionUsingDisassembler(nub_addr_t curr_pc, uint32_t curr_cpsr, arm_decoded_instruction_t *decodedInstruction, thumb_static_data_t *thumbStaticData, nub_addr_t *next_pc); 95 void DecodeITBlockInstructions(nub_addr_t curr_pc); 96#endif 97 void EvaluateNextInstructionForSoftwareBreakpointSetup(nub_addr_t currentPC, uint32_t cpsr, bool currentPCIsThumb, nub_addr_t *nextPC, bool *nextPCIsThumb); 98 99 typedef enum RegisterSetTag 100 { 101 e_regSetALL = REGISTER_SET_ALL, 102 e_regSetGPR = ARM_THREAD_STATE, 103 e_regSetVFP = ARM_VFP_STATE, 104 e_regSetEXC = ARM_EXCEPTION_STATE, 105 e_regSetDBG = ARM_DEBUG_STATE, 106 kNumRegisterSets 107 } RegisterSet; 108 109 enum 110 { 111 Read = 0, 112 Write = 1, 113 kNumErrors = 2 114 }; 115 116 typedef arm_thread_state_t GPR; 117 typedef arm_vfp_state_t FPU; 118 typedef arm_exception_state_t EXC; 119 120 static const DNBRegisterInfo g_gpr_registers[]; 121 static const DNBRegisterInfo g_vfp_registers[]; 122 static const DNBRegisterInfo g_exc_registers[]; 123 static const DNBRegisterSetInfo g_reg_sets[]; 124 125 static const size_t k_num_gpr_registers; 126 static const size_t k_num_vfp_registers; 127 static const size_t k_num_exc_registers; 128 static const size_t k_num_all_registers; 129 static const size_t k_num_register_sets; 130 131 struct Context 132 { 133 GPR gpr; 134 FPU vfp; 135 EXC exc; 136 }; 137 138 // See also HardwareWatchpointStateChanged() which updates this class-wide variable. 139 static DBG Global_Debug_State; 140 static bool Valid_Global_Debug_State; 141 142 struct State 143 { 144 Context context; 145 DBG dbg; 146 kern_return_t gpr_errs[2]; // Read/Write errors 147 kern_return_t vfp_errs[2]; // Read/Write errors 148 kern_return_t exc_errs[2]; // Read/Write errors 149 kern_return_t dbg_errs[2]; // Read/Write errors 150 State() 151 { 152 uint32_t i; 153 for (i=0; i<kNumErrors; i++) 154 { 155 gpr_errs[i] = -1; 156 vfp_errs[i] = -1; 157 exc_errs[i] = -1; 158 dbg_errs[i] = -1; 159 } 160 } 161 void InvalidateRegisterSetState(int set) 162 { 163 SetError (set, Read, -1); 164 } 165 kern_return_t GetError (int set, uint32_t err_idx) const 166 { 167 if (err_idx < kNumErrors) 168 { 169 switch (set) 170 { 171 // When getting all errors, just OR all values together to see if 172 // we got any kind of error. 173 case e_regSetALL: return gpr_errs[err_idx] | 174 vfp_errs[err_idx] | 175 exc_errs[err_idx] | 176 dbg_errs[err_idx] ; 177 case e_regSetGPR: return gpr_errs[err_idx]; 178 case e_regSetVFP: return vfp_errs[err_idx]; 179 case e_regSetEXC: return exc_errs[err_idx]; 180 case e_regSetDBG: return dbg_errs[err_idx]; 181 default: break; 182 } 183 } 184 return -1; 185 } 186 bool SetError (int set, uint32_t err_idx, kern_return_t err) 187 { 188 if (err_idx < kNumErrors) 189 { 190 switch (set) 191 { 192 case e_regSetALL: 193 gpr_errs[err_idx] = err; 194 vfp_errs[err_idx] = err; 195 dbg_errs[err_idx] = err; 196 exc_errs[err_idx] = err; 197 return true; 198 199 case e_regSetGPR: 200 gpr_errs[err_idx] = err; 201 return true; 202 203 case e_regSetVFP: 204 vfp_errs[err_idx] = err; 205 return true; 206 207 case e_regSetEXC: 208 exc_errs[err_idx] = err; 209 return true; 210 211 case e_regSetDBG: 212 dbg_errs[err_idx] = err; 213 return true; 214 default: break; 215 } 216 } 217 return false; 218 } 219 bool RegsAreValid (int set) const 220 { 221 return GetError(set, Read) == KERN_SUCCESS; 222 } 223 }; 224 225 kern_return_t GetGPRState (bool force); 226 kern_return_t GetVFPState (bool force); 227 kern_return_t GetEXCState (bool force); 228 kern_return_t GetDBGState (bool force); 229 230 kern_return_t SetGPRState (); 231 kern_return_t SetVFPState (); 232 kern_return_t SetEXCState (); 233 kern_return_t SetDBGState (); 234 235 // Helper functions for watchpoint implementaions. 236 static void ClearWatchpointOccurred(); 237 static bool HasWatchpointOccurred(); 238 static bool IsWatchpointEnabled(const DBG &debug_state, uint32_t hw_index); 239 static nub_addr_t GetWatchAddress(const DBG &debug_state, uint32_t hw_index); 240 241protected: 242 MachThread * m_thread; 243 State m_state; 244 DBG m_dbg_save; 245 nub_addr_t m_hw_single_chained_step_addr; 246 nub_addr_t m_last_decode_pc; 247 248 // The following member variables should be updated atomically. 249 int32_t m_watchpoint_hw_index; 250 bool m_watchpoint_did_occur; 251 bool m_watchpoint_resume_single_step_enabled; 252}; 253 254#endif // #if defined (__arm__) 255#endif // #ifndef __DebugNubArchMachARM_h__ 256