DNBArchImpl.h revision 6c7559ae5255ad791a197dc08e1d0ce9130a3988 
1//===-- DNBArchImpl.h -------------------------------------------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10//  Created by Greg Clayton on 6/25/07.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef __DebugNubArchMachARM_h__
15#define __DebugNubArchMachARM_h__
16
17#if defined (__arm__)
18
19#include "DNBArch.h"
20#if defined (USE_ARM_DISASSEMBLER_FRAMEWORK)
21#include <ARMDisassembler/ARMDisassembler.h>
22#endif
23
24class MachThread;
25
26class DNBArchMachARM : public DNBArchProtocol
27{
28public:
29    enum { kMaxNumThumbITBreakpoints = 4 };
30
31    DNBArchMachARM(MachThread *thread) :
32        m_thread(thread),
33        m_state(),
34        m_hw_single_chained_step_addr(INVALID_NUB_ADDRESS),
35        m_sw_single_step_next_pc(INVALID_NUB_ADDRESS),
36        m_sw_single_step_break_id(INVALID_NUB_BREAK_ID),
37        m_sw_single_step_itblock_break_count(0),
38        m_last_decode_pc(INVALID_NUB_ADDRESS)
39    {
40        memset(&m_dbg_save, 0, sizeof(m_dbg_save));
41#if defined (USE_ARM_DISASSEMBLER_FRAMEWORK)
42        ThumbStaticsInit(&m_last_decode_thumb);
43#endif
44        for (int i = 0; i < kMaxNumThumbITBreakpoints; i++)
45            m_sw_single_step_itblock_break_id[i] = INVALID_NUB_BREAK_ID;
46    }
47
48    virtual ~DNBArchMachARM()
49    {
50    }
51
52    static void Initialize();
53    static const DNBRegisterSetInfo *
54    GetRegisterSetInfo(nub_size_t *num_reg_sets);
55
56    virtual bool            GetRegisterValue(int set, int reg, DNBRegisterValue *value);
57    virtual bool            SetRegisterValue(int set, int reg, const DNBRegisterValue *value);
58    virtual nub_size_t      GetRegisterContext (void *buf, nub_size_t buf_len);
59    virtual nub_size_t      SetRegisterContext (const void *buf, nub_size_t buf_len);
60
61    virtual kern_return_t   GetRegisterState  (int set, bool force);
62    virtual kern_return_t   SetRegisterState  (int set);
63    virtual bool            RegisterSetStateIsValid (int set) const;
64
65    virtual uint64_t        GetPC(uint64_t failValue);    // Get program counter
66    virtual kern_return_t   SetPC(uint64_t value);
67    virtual uint64_t        GetSP(uint64_t failValue);    // Get stack pointer
68    virtual void            ThreadWillResume();
69    virtual bool            ThreadDidStop();
70
71    static DNBArchProtocol *Create (MachThread *thread);
72    static const uint8_t * const SoftwareBreakpointOpcode (nub_size_t byte_size);
73    static uint32_t         GetCPUType();
74
75    virtual uint32_t        NumSupportedHardwareBreakpoints();
76    virtual uint32_t        NumSupportedHardwareWatchpoints();
77    virtual uint32_t        EnableHardwareBreakpoint (nub_addr_t addr, nub_size_t size);
78    virtual uint32_t        EnableHardwareWatchpoint (nub_addr_t addr, nub_size_t size, bool read, bool write);
79    virtual bool            DisableHardwareBreakpoint (uint32_t hw_break_index);
80    virtual bool            DisableHardwareWatchpoint (uint32_t hw_break_index);
81    virtual bool            StepNotComplete ();
82
83    typedef arm_debug_state_t DBG;
84
85protected:
86
87
88    kern_return_t           EnableHardwareSingleStep (bool enable);
89    kern_return_t           SetSingleStepSoftwareBreakpoints ();
90
91    bool                    ConditionPassed(uint8_t condition, uint32_t cpsr);
92#if defined (USE_ARM_DISASSEMBLER_FRAMEWORK)
93    bool                    ComputeNextPC(nub_addr_t currentPC, arm_decoded_instruction_t decodedInstruction, bool currentPCIsThumb, nub_addr_t *targetPC);
94    arm_error_t             DecodeInstructionUsingDisassembler(nub_addr_t curr_pc, uint32_t curr_cpsr, arm_decoded_instruction_t *decodedInstruction, thumb_static_data_t *thumbStaticData, nub_addr_t *next_pc);
95    void                    DecodeITBlockInstructions(nub_addr_t curr_pc);
96#endif
97    void                    EvaluateNextInstructionForSoftwareBreakpointSetup(nub_addr_t currentPC, uint32_t cpsr, bool currentPCIsThumb, nub_addr_t *nextPC, bool *nextPCIsThumb);
98    static nub_bool_t       BreakpointHit (nub_process_t pid, nub_thread_t tid, nub_break_t breakID, void *baton);
99
100    typedef enum RegisterSetTag
101    {
102        e_regSetALL = REGISTER_SET_ALL,
103        e_regSetGPR = ARM_THREAD_STATE,
104        e_regSetVFP = ARM_VFP_STATE,
105        e_regSetEXC = ARM_EXCEPTION_STATE,
106        e_regSetDBG = ARM_DEBUG_STATE,
107        kNumRegisterSets
108    } RegisterSet;
109
110    enum
111    {
112        Read = 0,
113        Write = 1,
114        kNumErrors = 2
115    };
116
117    typedef arm_thread_state_t GPR;
118    typedef arm_vfp_state_t FPU;
119    typedef arm_exception_state_t EXC;
120
121    static const DNBRegisterInfo g_gpr_registers[];
122    static const DNBRegisterInfo g_vfp_registers[];
123    static const DNBRegisterInfo g_exc_registers[];
124    static const DNBRegisterSetInfo g_reg_sets[];
125
126    static const size_t k_num_gpr_registers;
127    static const size_t k_num_vfp_registers;
128    static const size_t k_num_exc_registers;
129    static const size_t k_num_all_registers;
130    static const size_t k_num_register_sets;
131
132    struct Context
133    {
134        GPR gpr;
135        FPU vfp;
136        EXC exc;
137    };
138
139    struct State
140    {
141        Context                 context;
142        DBG                     dbg;
143        kern_return_t           gpr_errs[2];    // Read/Write errors
144        kern_return_t           vfp_errs[2];    // Read/Write errors
145        kern_return_t           exc_errs[2];    // Read/Write errors
146        kern_return_t           dbg_errs[2];    // Read/Write errors
147        State()
148        {
149            uint32_t i;
150            for (i=0; i<kNumErrors; i++)
151            {
152                gpr_errs[i] = -1;
153                vfp_errs[i] = -1;
154                exc_errs[i] = -1;
155                dbg_errs[i] = -1;
156            }
157        }
158        void InvalidateRegisterSetState(int set)
159        {
160            SetError (set, Read, -1);
161        }
162        kern_return_t GetError (int set, uint32_t err_idx) const
163        {
164            if (err_idx < kNumErrors)
165            {
166                switch (set)
167                {
168                // When getting all errors, just OR all values together to see if
169                // we got any kind of error.
170                case e_regSetALL:   return gpr_errs[err_idx] |
171                                           vfp_errs[err_idx] |
172                                           exc_errs[err_idx] |
173                                           dbg_errs[err_idx] ;
174                case e_regSetGPR:   return gpr_errs[err_idx];
175                case e_regSetVFP:   return vfp_errs[err_idx];
176                case e_regSetEXC:   return exc_errs[err_idx];
177                case e_regSetDBG:   return dbg_errs[err_idx];
178                default: break;
179                }
180            }
181            return -1;
182        }
183        bool SetError (int set, uint32_t err_idx, kern_return_t err)
184        {
185            if (err_idx < kNumErrors)
186            {
187                switch (set)
188                {
189                case e_regSetALL:
190                    gpr_errs[err_idx] = err;
191                    vfp_errs[err_idx] = err;
192                    dbg_errs[err_idx] = err;
193                    exc_errs[err_idx] = err;
194                    return true;
195
196                case e_regSetGPR:
197                    gpr_errs[err_idx] = err;
198                    return true;
199
200                case e_regSetVFP:
201                    vfp_errs[err_idx] = err;
202                    return true;
203
204                case e_regSetEXC:
205                    exc_errs[err_idx] = err;
206                    return true;
207
208                case e_regSetDBG:
209                    dbg_errs[err_idx] = err;
210                    return true;
211                default: break;
212                }
213            }
214            return false;
215        }
216        bool RegsAreValid (int set) const
217        {
218            return GetError(set, Read) == KERN_SUCCESS;
219        }
220    };
221
222    kern_return_t GetGPRState (bool force);
223    kern_return_t GetVFPState (bool force);
224    kern_return_t GetEXCState (bool force);
225    kern_return_t GetDBGState (bool force);
226
227    kern_return_t SetGPRState ();
228    kern_return_t SetVFPState ();
229    kern_return_t SetEXCState ();
230    kern_return_t SetDBGState ();
231protected:
232    MachThread *    m_thread;
233    State           m_state;
234    arm_debug_state_t m_dbg_save;
235    nub_addr_t      m_hw_single_chained_step_addr;
236    // Software single stepping support
237    nub_addr_t      m_sw_single_step_next_pc;
238    nub_break_t     m_sw_single_step_break_id;
239    nub_break_t     m_sw_single_step_itblock_break_id[kMaxNumThumbITBreakpoints];
240    nub_addr_t      m_sw_single_step_itblock_break_count;
241    // Disassembler state
242#if defined (USE_ARM_DISASSEMBLER_FRAMEWORK)
243    thumb_static_data_t m_last_decode_thumb;
244    arm_decoded_instruction_t m_last_decode_arm;
245#endif
246    nub_addr_t      m_last_decode_pc;
247
248};
249
250#endif    // #if defined (__arm__)
251#endif    // #ifndef __DebugNubArchMachARM_h__
252