MachRegisterStatesI386.h revision e39356825b86cd7484097ca4c4c9f07f9ff95e2e 
1//===-- MachRegisterStatesI386.h --------------------------------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10//  Created by Sean Callanan on 3/16/11.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef __MachRegisterStatesI386_h__
15#define __MachRegisterStatesI386_h__
16
17#include <inttypes.h>
18
19#define __i386_THREAD_STATE         1
20#define __i386_FLOAT_STATE          2
21#define __i386_EXCEPTION_STATE      3
22#define __i386_DEBUG_STATE          10
23#define __i386_AVX_STATE            16
24
25typedef struct {
26    uint32_t    __eax;
27    uint32_t    __ebx;
28    uint32_t    __ecx;
29    uint32_t    __edx;
30    uint32_t    __edi;
31    uint32_t    __esi;
32    uint32_t    __ebp;
33    uint32_t    __esp;
34    uint32_t    __ss;
35    uint32_t    __eflags;
36    uint32_t    __eip;
37    uint32_t    __cs;
38    uint32_t    __ds;
39    uint32_t    __es;
40    uint32_t    __fs;
41    uint32_t    __gs;
42} __i386_thread_state_t;
43
44typedef struct {
45    uint16_t    __invalid   : 1;
46    uint16_t    __denorm    : 1;
47    uint16_t    __zdiv      : 1;
48    uint16_t    __ovrfl     : 1;
49    uint16_t    __undfl     : 1;
50    uint16_t    __precis    : 1;
51    uint16_t    __PAD1      : 2;
52    uint16_t    __pc        : 2;
53    uint16_t    __rc        : 2;
54    uint16_t    __PAD2      : 1;
55    uint16_t    __PAD3      : 3;
56} __i386_fp_control_t;
57
58typedef struct {
59    uint16_t    __invalid   : 1;
60    uint16_t    __denorm    : 1;
61    uint16_t    __zdiv      : 1;
62    uint16_t    __ovrfl     : 1;
63    uint16_t    __undfl     : 1;
64    uint16_t    __precis    : 1;
65    uint16_t    __stkflt    : 1;
66    uint16_t    __errsumm   : 1;
67    uint16_t    __c0        : 1;
68    uint16_t    __c1        : 1;
69    uint16_t    __c2        : 1;
70    uint16_t    __tos       : 3;
71    uint16_t    __c3        : 1;
72    uint16_t    __busy      : 1;
73} __i386_fp_status_t;
74
75typedef struct {
76    uint8_t     __mmst_reg[10];
77    uint8_t     __mmst_rsrv[6];
78} __i386_mmst_reg;
79
80typedef struct {
81    uint8_t     __xmm_reg[16];
82} __i386_xmm_reg;
83
84typedef struct {
85    uint32_t                __fpu_reserved[2];
86    __i386_fp_control_t     __fpu_fcw;
87    __i386_fp_status_t      __fpu_fsw;
88    uint8_t                 __fpu_ftw;
89    uint8_t                 __fpu_rsrv1;
90    uint16_t                __fpu_fop;
91    uint32_t                __fpu_ip;
92    uint16_t                __fpu_cs;
93    uint16_t                __fpu_rsrv2;
94    uint32_t                __fpu_dp;
95    uint16_t                __fpu_ds;
96    uint16_t                __fpu_rsrv3;
97    uint32_t                __fpu_mxcsr;
98    uint32_t                __fpu_mxcsrmask;
99    __i386_mmst_reg         __fpu_stmm0;
100    __i386_mmst_reg         __fpu_stmm1;
101    __i386_mmst_reg         __fpu_stmm2;
102    __i386_mmst_reg         __fpu_stmm3;
103    __i386_mmst_reg         __fpu_stmm4;
104    __i386_mmst_reg         __fpu_stmm5;
105    __i386_mmst_reg         __fpu_stmm6;
106    __i386_mmst_reg         __fpu_stmm7;
107    __i386_xmm_reg          __fpu_xmm0;
108    __i386_xmm_reg          __fpu_xmm1;
109    __i386_xmm_reg          __fpu_xmm2;
110    __i386_xmm_reg          __fpu_xmm3;
111    __i386_xmm_reg          __fpu_xmm4;
112    __i386_xmm_reg          __fpu_xmm5;
113    __i386_xmm_reg          __fpu_xmm6;
114    __i386_xmm_reg          __fpu_xmm7;
115    uint8_t                 __fpu_rsrv4[14*16];
116    uint32_t                __fpu_reserved1;
117} __i386_float_state_t;
118
119typedef struct {
120    uint32_t                __fpu_reserved[2];
121    __i386_fp_control_t     __fpu_fcw;
122    __i386_fp_status_t      __fpu_fsw;
123    uint8_t                 __fpu_ftw;
124    uint8_t                 __fpu_rsrv1;
125    uint16_t                __fpu_fop;
126    uint32_t                __fpu_ip;
127    uint16_t                __fpu_cs;
128    uint16_t                __fpu_rsrv2;
129    uint32_t                __fpu_dp;
130    uint16_t                __fpu_ds;
131    uint16_t                __fpu_rsrv3;
132    uint32_t                __fpu_mxcsr;
133    uint32_t                __fpu_mxcsrmask;
134    __i386_mmst_reg         __fpu_stmm0;
135    __i386_mmst_reg         __fpu_stmm1;
136    __i386_mmst_reg         __fpu_stmm2;
137    __i386_mmst_reg         __fpu_stmm3;
138    __i386_mmst_reg         __fpu_stmm4;
139    __i386_mmst_reg         __fpu_stmm5;
140    __i386_mmst_reg         __fpu_stmm6;
141    __i386_mmst_reg         __fpu_stmm7;
142    __i386_xmm_reg          __fpu_xmm0;
143    __i386_xmm_reg          __fpu_xmm1;
144    __i386_xmm_reg          __fpu_xmm2;
145    __i386_xmm_reg          __fpu_xmm3;
146    __i386_xmm_reg          __fpu_xmm4;
147    __i386_xmm_reg          __fpu_xmm5;
148    __i386_xmm_reg          __fpu_xmm6;
149    __i386_xmm_reg          __fpu_xmm7;
150    uint8_t                 __fpu_rsrv4[14*16];
151    uint32_t                __fpu_reserved1;
152    uint8_t                 __avx_reserved1[64];
153    __i386_xmm_reg          __fpu_ymmh0;
154    __i386_xmm_reg          __fpu_ymmh1;
155    __i386_xmm_reg          __fpu_ymmh2;
156    __i386_xmm_reg          __fpu_ymmh3;
157    __i386_xmm_reg          __fpu_ymmh4;
158    __i386_xmm_reg          __fpu_ymmh5;
159    __i386_xmm_reg          __fpu_ymmh6;
160    __i386_xmm_reg          __fpu_ymmh7;
161} __i386_avx_state_t;
162
163typedef struct {
164    uint32_t    __trapno;
165    uint32_t    __err;
166    uint32_t    __faultvaddr;
167} __i386_exception_state_t;
168
169typedef struct {
170	uint32_t	__dr0;
171	uint32_t	__dr1;
172	uint32_t	__dr2;
173	uint32_t	__dr3;
174	uint32_t	__dr4;
175	uint32_t	__dr5;
176	uint32_t	__dr6;
177	uint32_t	__dr7;
178} __i386_debug_state_t;
179
180#endif
181