TargetTransformInfo.h revision c61aa59bcc62019b8e31fcbb3582255be3a63052
1//===- llvm/Analysis/TargetTransformInfo.h ----------------------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This pass exposes codegen information to IR-level passes. Every 11// transformation that uses codegen information is broken into three parts: 12// 1. The IR-level analysis pass. 13// 2. The IR-level transformation interface which provides the needed 14// information. 15// 3. Codegen-level implementation which uses target-specific hooks. 16// 17// This file defines #2, which is the interface that IR-level transformations 18// use for querying the codegen. 19// 20//===----------------------------------------------------------------------===// 21 22#ifndef LLVM_ANALYSIS_TARGETTRANSFORMINFO_H 23#define LLVM_ANALYSIS_TARGETTRANSFORMINFO_H 24 25#include "llvm/CodeGen/ValueTypes.h" 26#include "llvm/IR/GlobalValue.h" 27#include "llvm/IR/Intrinsics.h" 28#include "llvm/IR/Type.h" 29#include "llvm/Pass.h" 30#include "llvm/Support/DataTypes.h" 31 32namespace llvm { 33 34/// TargetTransformInfo - This pass provides access to the codegen 35/// interfaces that are needed for IR-level transformations. 36class TargetTransformInfo { 37protected: 38 /// \brief The TTI instance one level down the stack. 39 /// 40 /// This is used to implement the default behavior all of the methods which 41 /// is to delegate up through the stack of TTIs until one can answer the 42 /// query. 43 TargetTransformInfo *PrevTTI; 44 45 /// \brief The top of the stack of TTI analyses available. 46 /// 47 /// This is a convenience routine maintained as TTI analyses become available 48 /// that complements the PrevTTI delegation chain. When one part of an 49 /// analysis pass wants to query another part of the analysis pass it can use 50 /// this to start back at the top of the stack. 51 TargetTransformInfo *TopTTI; 52 53 /// All pass subclasses must in their initializePass routine call 54 /// pushTTIStack with themselves to update the pointers tracking the previous 55 /// TTI instance in the analysis group's stack, and the top of the analysis 56 /// group's stack. 57 void pushTTIStack(Pass *P); 58 59 /// All pass subclasses must in their finalizePass routine call popTTIStack 60 /// to update the pointers tracking the previous TTI instance in the analysis 61 /// group's stack, and the top of the analysis group's stack. 62 void popTTIStack(); 63 64 /// All pass subclasses must call TargetTransformInfo::getAnalysisUsage. 65 virtual void getAnalysisUsage(AnalysisUsage &AU) const; 66 67public: 68 /// This class is intended to be subclassed by real implementations. 69 virtual ~TargetTransformInfo() = 0; 70 71 /// \name Generic Target Information 72 /// @{ 73 74 /// \brief Underlying constants for 'cost' values in this interface. 75 /// 76 /// Many APIs in this interface return a cost. This enum defines the 77 /// fundamental values that should be used to interpret (and produce) those 78 /// costs. The costs are returned as an unsigned rather than a member of this 79 /// enumeration because it is expected that the cost of one IR instruction 80 /// may have a multiplicative factor to it or otherwise won't fit dircetly 81 /// into the enum. Moreover, it is common to sum or average costs which works 82 /// better as simple integral values. Thus this enum only provides constants. 83 /// 84 /// Note that these costs should usually reflect the intersection of code-size 85 /// cost and execution cost. A free instruction is typically one that folds 86 /// into another instruction. For example, reg-to-reg moves can often be 87 /// skipped by renaming the registers in the CPU, but they still are encoded 88 /// and thus wouldn't be considered 'free' here. 89 enum TargetCostConstants { 90 TCC_Free = 0, ///< Expected to fold away in lowering. 91 TCC_Basic = 1, ///< The cost of a typical 'add' instruction. 92 TCC_Expensive = 4 ///< The cost of a 'div' instruction on x86. 93 }; 94 95 /// \brief Estimate the cost of a specific operation when lowered. 96 /// 97 /// Note that this is designed to work on an arbitrary synthetic opcode, and 98 /// thus work for hypothetical queries before an instruction has even been 99 /// formed. However, this does *not* work for GEPs, and must not be called 100 /// for a GEP instruction. Instead, use the dedicated getGEPCost interface as 101 /// analyzing a GEP's cost required more information. 102 /// 103 /// Typically only the result type is required, and the operand type can be 104 /// omitted. However, if the opcode is one of the cast instructions, the 105 /// operand type is required. 106 /// 107 /// The returned cost is defined in terms of \c TargetCostConstants, see its 108 /// comments for a detailed explanation of the cost values. 109 virtual unsigned getOperationCost(unsigned Opcode, Type *Ty, 110 Type *OpTy = 0) const; 111 112 /// \brief Estimate the cost of a GEP operation when lowered. 113 /// 114 /// The contract for this function is the same as \c getOperationCost except 115 /// that it supports an interface that provides extra information specific to 116 /// the GEP operation. 117 virtual unsigned getGEPCost(const Value *Ptr, 118 ArrayRef<const Value *> Operands) const; 119 120 /// \brief Estimate the cost of a given IR user when lowered. 121 /// 122 /// This can estimate the cost of either a ConstantExpr or Instruction when 123 /// lowered. It has two primary advantages over the \c getOperationCost and 124 /// \c getGEPCost above, and one significant disadvantage: it can only be 125 /// used when the IR construct has already been formed. 126 /// 127 /// The advantages are that it can inspect the SSA use graph to reason more 128 /// accurately about the cost. For example, all-constant-GEPs can often be 129 /// folded into a load or other instruction, but if they are used in some 130 /// other context they may not be folded. This routine can distinguish such 131 /// cases. 132 /// 133 /// The returned cost is defined in terms of \c TargetCostConstants, see its 134 /// comments for a detailed explanation of the cost values. 135 virtual unsigned getUserCost(const User *U) const; 136 137 /// @} 138 139 /// \name Scalar Target Information 140 /// @{ 141 142 /// \brief Flags indicating the kind of support for population count. 143 /// 144 /// Compared to the SW implementation, HW support is supposed to 145 /// significantly boost the performance when the population is dense, and it 146 /// may or may not degrade performance if the population is sparse. A HW 147 /// support is considered as "Fast" if it can outperform, or is on a par 148 /// with, SW implementaion when the population is sparse; otherwise, it is 149 /// considered as "Slow". 150 enum PopcntSupportKind { 151 PSK_Software, 152 PSK_SlowHardware, 153 PSK_FastHardware 154 }; 155 156 /// isLegalAddImmediate - Return true if the specified immediate is legal 157 /// add immediate, that is the target has add instructions which can add 158 /// a register with the immediate without having to materialize the 159 /// immediate into a register. 160 virtual bool isLegalAddImmediate(int64_t Imm) const; 161 162 /// isLegalICmpImmediate - Return true if the specified immediate is legal 163 /// icmp immediate, that is the target has icmp instructions which can compare 164 /// a register against the immediate without having to materialize the 165 /// immediate into a register. 166 virtual bool isLegalICmpImmediate(int64_t Imm) const; 167 168 /// isLegalAddressingMode - Return true if the addressing mode represented by 169 /// AM is legal for this target, for a load/store of the specified type. 170 /// The type may be VoidTy, in which case only return true if the addressing 171 /// mode is legal for a load/store of any legal type. 172 /// TODO: Handle pre/postinc as well. 173 virtual bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, 174 int64_t BaseOffset, bool HasBaseReg, 175 int64_t Scale) const; 176 177 /// isTruncateFree - Return true if it's free to truncate a value of 178 /// type Ty1 to type Ty2. e.g. On x86 it's free to truncate a i32 value in 179 /// register EAX to i16 by referencing its sub-register AX. 180 virtual bool isTruncateFree(Type *Ty1, Type *Ty2) const; 181 182 /// Is this type legal. 183 virtual bool isTypeLegal(Type *Ty) const; 184 185 /// getJumpBufAlignment - returns the target's jmp_buf alignment in bytes 186 virtual unsigned getJumpBufAlignment() const; 187 188 /// getJumpBufSize - returns the target's jmp_buf size in bytes. 189 virtual unsigned getJumpBufSize() const; 190 191 /// shouldBuildLookupTables - Return true if switches should be turned into 192 /// lookup tables for the target. 193 virtual bool shouldBuildLookupTables() const; 194 195 /// getPopcntSupport - Return hardware support for population count. 196 virtual PopcntSupportKind getPopcntSupport(unsigned IntTyWidthInBit) const; 197 198 /// getIntImmCost - Return the expected cost of materializing the given 199 /// integer immediate of the specified type. 200 virtual unsigned getIntImmCost(const APInt &Imm, Type *Ty) const; 201 202 /// @} 203 204 /// \name Vector Target Information 205 /// @{ 206 207 /// \brief The various kinds of shuffle patterns for vector queries. 208 enum ShuffleKind { 209 SK_Broadcast, ///< Broadcast element 0 to all other elements. 210 SK_Reverse, ///< Reverse the order of the vector. 211 SK_InsertSubvector, ///< InsertSubvector. Index indicates start offset. 212 SK_ExtractSubvector ///< ExtractSubvector Index indicates start offset. 213 }; 214 215 /// \return The number of scalar or vector registers that the target has. 216 /// If 'Vectors' is true, it returns the number of vector registers. If it is 217 /// set to false, it returns the number of scalar registers. 218 virtual unsigned getNumberOfRegisters(bool Vector) const; 219 220 /// \return The width of the largest scalar or vector register type. 221 virtual unsigned getRegisterBitWidth(bool Vector) const; 222 223 /// \return The maximum unroll factor that the vectorizer should try to 224 /// perform for this target. This number depends on the level of parallelism 225 /// and the number of execution units in the CPU. 226 virtual unsigned getMaximumUnrollFactor() const; 227 228 /// \return The expected cost of arithmetic ops, such as mul, xor, fsub, etc. 229 virtual unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty) const; 230 231 /// \return The cost of a shuffle instruction of kind Kind and of type Tp. 232 /// The index and subtype parameters are used by the subvector insertion and 233 /// extraction shuffle kinds. 234 virtual unsigned getShuffleCost(ShuffleKind Kind, Type *Tp, int Index = 0, 235 Type *SubTp = 0) const; 236 237 /// \return The expected cost of cast instructions, such as bitcast, trunc, 238 /// zext, etc. 239 virtual unsigned getCastInstrCost(unsigned Opcode, Type *Dst, 240 Type *Src) const; 241 242 /// \return The expected cost of control-flow related instrutctions such as 243 /// Phi, Ret, Br. 244 virtual unsigned getCFInstrCost(unsigned Opcode) const; 245 246 /// \returns The expected cost of compare and select instructions. 247 virtual unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, 248 Type *CondTy = 0) const; 249 250 /// \return The expected cost of vector Insert and Extract. 251 /// Use -1 to indicate that there is no information on the index value. 252 virtual unsigned getVectorInstrCost(unsigned Opcode, Type *Val, 253 unsigned Index = -1) const; 254 255 /// \return The cost of Load and Store instructions. 256 virtual unsigned getMemoryOpCost(unsigned Opcode, Type *Src, 257 unsigned Alignment, 258 unsigned AddressSpace) const; 259 260 /// \returns The cost of Intrinsic instructions. 261 virtual unsigned getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy, 262 ArrayRef<Type *> Tys) const; 263 264 /// \returns The number of pieces into which the provided type must be 265 /// split during legalization. Zero is returned when the answer is unknown. 266 virtual unsigned getNumberOfParts(Type *Tp) const; 267 268 /// @} 269 270 /// Analysis group identification. 271 static char ID; 272}; 273 274/// \brief Create the base case instance of a pass in the TTI analysis group. 275/// 276/// This class provides the base case for the stack of TTI analyses. It doesn't 277/// delegate to anything and uses the STTI and VTTI objects passed in to 278/// satisfy the queries. 279ImmutablePass *createNoTargetTransformInfoPass(); 280 281} // End llvm namespace 282 283#endif 284