FastISel.h revision 40b189e4e257924d90aaf63bf2e12bc7bbca961a 
1//===-- FastISel.h - Definition of the FastISel class ---------------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines the FastISel class.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_CODEGEN_FASTISEL_H
15#define LLVM_CODEGEN_FASTISEL_H
16
17#include "llvm/BasicBlock.h"
18#include "llvm/ADT/DenseMap.h"
19#include "llvm/CodeGen/SelectionDAGNodes.h"
20
21namespace llvm {
22
23class ConstantFP;
24class MachineBasicBlock;
25class MachineConstantPool;
26class MachineFunction;
27class MachineRegisterInfo;
28class TargetData;
29class TargetInstrInfo;
30class TargetLowering;
31class TargetMachine;
32class TargetRegisterClass;
33
34/// FastISel - This is a fast-path instruction selection class that
35/// generates poor code and doesn't support illegal types or non-trivial
36/// lowering, but runs quickly.
37class FastISel {
38protected:
39  MachineBasicBlock *MBB;
40  DenseMap<const Value *, unsigned> LocalValueMap;
41  DenseMap<const Value *, unsigned> &ValueMap;
42  DenseMap<const BasicBlock *, MachineBasicBlock *> &MBBMap;
43  MachineFunction &MF;
44  MachineRegisterInfo &MRI;
45  const TargetMachine &TM;
46  const TargetData &TD;
47  const TargetInstrInfo &TII;
48  const TargetLowering &TLI;
49
50public:
51  /// setCurrentBlock - Set the current block, to which generated
52  /// machine instructions will be appended.
53  ///
54  void setCurrentBlock(MachineBasicBlock *mbb) {
55    MBB = mbb;
56  }
57
58  /// SelectInstruction - Do "fast" instruction selection for the given
59  /// LLVM IR instruction, and append generated machine instructions to
60  /// the current block. Return true if selection was successful.
61  ///
62  bool SelectInstruction(Instruction *I);
63
64  /// SelectInstruction - Do "fast" instruction selection for the given
65  /// LLVM IR operator (Instruction or ConstantExpr), and append
66  /// generated machine instructions to the current block. Return true
67  /// if selection was successful.
68  ///
69  bool SelectOperator(User *I, unsigned Opcode);
70
71  /// TargetSelectInstruction - This method is called by target-independent
72  /// code when the normal FastISel process fails to select an instruction.
73  /// This gives targets a chance to emit code for anything that doesn't
74  /// fit into FastISel's framework. It returns true if it was successful.
75  ///
76  virtual bool
77  TargetSelectInstruction(Instruction *I) = 0;
78
79  /// getRegForValue - Create a virtual register and arrange for it to
80  /// be assigned the value for the given LLVM value.
81  unsigned getRegForValue(Value *V);
82
83  virtual ~FastISel();
84
85protected:
86  FastISel(MachineFunction &mf,
87           DenseMap<const Value *, unsigned> &vm,
88           DenseMap<const BasicBlock *, MachineBasicBlock *> &bm);
89
90  /// FastEmit_r - This method is called by target-independent code
91  /// to request that an instruction with the given type and opcode
92  /// be emitted.
93  virtual unsigned FastEmit_(MVT::SimpleValueType VT,
94                             MVT::SimpleValueType RetVT,
95                             ISD::NodeType Opcode);
96
97  /// FastEmit_r - This method is called by target-independent code
98  /// to request that an instruction with the given type, opcode, and
99  /// register operand be emitted.
100  ///
101  virtual unsigned FastEmit_r(MVT::SimpleValueType VT,
102                              MVT::SimpleValueType RetVT,
103                              ISD::NodeType Opcode, unsigned Op0);
104
105  /// FastEmit_rr - This method is called by target-independent code
106  /// to request that an instruction with the given type, opcode, and
107  /// register operands be emitted.
108  ///
109  virtual unsigned FastEmit_rr(MVT::SimpleValueType VT,
110                               MVT::SimpleValueType RetVT,
111                               ISD::NodeType Opcode,
112                               unsigned Op0, unsigned Op1);
113
114  /// FastEmit_ri - This method is called by target-independent code
115  /// to request that an instruction with the given type, opcode, and
116  /// register and immediate operands be emitted.
117  ///
118  virtual unsigned FastEmit_ri(MVT::SimpleValueType VT,
119                               MVT::SimpleValueType RetVT,
120                               ISD::NodeType Opcode,
121                               unsigned Op0, uint64_t Imm);
122
123  /// FastEmit_rf - This method is called by target-independent code
124  /// to request that an instruction with the given type, opcode, and
125  /// register and floating-point immediate operands be emitted.
126  ///
127  virtual unsigned FastEmit_rf(MVT::SimpleValueType VT,
128                               MVT::SimpleValueType RetVT,
129                               ISD::NodeType Opcode,
130                               unsigned Op0, ConstantFP *FPImm);
131
132  /// FastEmit_rri - This method is called by target-independent code
133  /// to request that an instruction with the given type, opcode, and
134  /// register and immediate operands be emitted.
135  ///
136  virtual unsigned FastEmit_rri(MVT::SimpleValueType VT,
137                                MVT::SimpleValueType RetVT,
138                                ISD::NodeType Opcode,
139                                unsigned Op0, unsigned Op1, uint64_t Imm);
140
141  /// FastEmit_ri_ - This method is a wrapper of FastEmit_ri. It first tries
142  /// to emit an instruction with an immediate operand using FastEmit_ri.
143  /// If that fails, it materializes the immediate into a register and try
144  /// FastEmit_rr instead.
145  unsigned FastEmit_ri_(MVT::SimpleValueType VT,
146                        ISD::NodeType Opcode,
147                        unsigned Op0, uint64_t Imm,
148                        MVT::SimpleValueType ImmType);
149
150  /// FastEmit_rf_ - This method is a wrapper of FastEmit_rf. It first tries
151  /// to emit an instruction with an immediate operand using FastEmit_rf.
152  /// If that fails, it materializes the immediate into a register and try
153  /// FastEmit_rr instead.
154  unsigned FastEmit_rf_(MVT::SimpleValueType VT,
155                        ISD::NodeType Opcode,
156                        unsigned Op0, ConstantFP *FPImm,
157                        MVT::SimpleValueType ImmType);
158
159  /// FastEmit_i - This method is called by target-independent code
160  /// to request that an instruction with the given type, opcode, and
161  /// immediate operand be emitted.
162  virtual unsigned FastEmit_i(MVT::SimpleValueType VT,
163                              MVT::SimpleValueType RetVT,
164                              ISD::NodeType Opcode,
165                              uint64_t Imm);
166
167  /// FastEmit_f - This method is called by target-independent code
168  /// to request that an instruction with the given type, opcode, and
169  /// floating-point immediate operand be emitted.
170  virtual unsigned FastEmit_f(MVT::SimpleValueType VT,
171                              MVT::SimpleValueType RetVT,
172                              ISD::NodeType Opcode,
173                              ConstantFP *FPImm);
174
175  /// FastEmitInst_ - Emit a MachineInstr with no operands and a
176  /// result register in the given register class.
177  ///
178  unsigned FastEmitInst_(unsigned MachineInstOpcode,
179                         const TargetRegisterClass *RC);
180
181  /// FastEmitInst_r - Emit a MachineInstr with one register operand
182  /// and a result register in the given register class.
183  ///
184  unsigned FastEmitInst_r(unsigned MachineInstOpcode,
185                          const TargetRegisterClass *RC,
186                          unsigned Op0);
187
188  /// FastEmitInst_rr - Emit a MachineInstr with two register operands
189  /// and a result register in the given register class.
190  ///
191  unsigned FastEmitInst_rr(unsigned MachineInstOpcode,
192                           const TargetRegisterClass *RC,
193                           unsigned Op0, unsigned Op1);
194
195  /// FastEmitInst_ri - Emit a MachineInstr with two register operands
196  /// and a result register in the given register class.
197  ///
198  unsigned FastEmitInst_ri(unsigned MachineInstOpcode,
199                           const TargetRegisterClass *RC,
200                           unsigned Op0, uint64_t Imm);
201
202  /// FastEmitInst_rf - Emit a MachineInstr with two register operands
203  /// and a result register in the given register class.
204  ///
205  unsigned FastEmitInst_rf(unsigned MachineInstOpcode,
206                           const TargetRegisterClass *RC,
207                           unsigned Op0, ConstantFP *FPImm);
208
209  /// FastEmitInst_rri - Emit a MachineInstr with two register operands,
210  /// an immediate, and a result register in the given register class.
211  ///
212  unsigned FastEmitInst_rri(unsigned MachineInstOpcode,
213                            const TargetRegisterClass *RC,
214                            unsigned Op0, unsigned Op1, uint64_t Imm);
215
216  /// FastEmitInst_i - Emit a MachineInstr with a single immediate
217  /// operand, and a result register in the given register class.
218  unsigned FastEmitInst_i(unsigned MachineInstrOpcode,
219                          const TargetRegisterClass *RC,
220                          uint64_t Imm);
221
222  /// FastEmitInst_extractsubreg - Emit a MachineInstr for an extract_subreg
223  /// from a specified index of a superregister.
224  unsigned FastEmitInst_extractsubreg(unsigned Op0, uint32_t Idx);
225
226  void UpdateValueMap(Value* I, unsigned Reg);
227
228  unsigned createResultReg(const TargetRegisterClass *RC);
229
230  virtual unsigned TargetSelectConstantPoolLoad(Constant* C,
231                                                MachineConstantPool* MCP) {
232    return 0;
233  }
234
235private:
236  bool SelectBinaryOp(User *I, ISD::NodeType ISDOpcode);
237
238  bool SelectGetElementPtr(User *I);
239
240  bool SelectBitCast(User *I);
241
242  bool SelectCast(User *I, ISD::NodeType Opcode);
243};
244
245}
246
247#endif
248