MachineInstr.h revision cbc988be22bc9411d95215c8b7251b5f85710674
148486893f46d2e12e926682a3ecb908716bc66c4Chris Lattner//===-- llvm/CodeGen/MachineInstr.h - MachineInstr class --------*- C++ -*-===// 2ea61c358720aa6c7a159d51658b34276316aa841Misha Brukman// 36fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// The LLVM Compiler Infrastructure 46fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// 57ed47a13356daed2a34cd2209a31f92552e3bdd8Chris Lattner// This file is distributed under the University of Illinois Open Source 67ed47a13356daed2a34cd2209a31f92552e3bdd8Chris Lattner// License. See LICENSE.TXT for details. 7ea61c358720aa6c7a159d51658b34276316aa841Misha Brukman// 86fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell//===----------------------------------------------------------------------===// 9a730c864227b287cdfad5f5f3d5d0808c9f422bbChris Lattner// 10a730c864227b287cdfad5f5f3d5d0808c9f422bbChris Lattner// This file contains the declaration of the MachineInstr class, which is the 11ef6a6a69ff1e1b709d0acb315b9f6c926c67a778Misha Brukman// basic representation for all target dependent machine instructions used by 12a730c864227b287cdfad5f5f3d5d0808c9f422bbChris Lattner// the back end. 13a730c864227b287cdfad5f5f3d5d0808c9f422bbChris Lattner// 14a730c864227b287cdfad5f5f3d5d0808c9f422bbChris Lattner//===----------------------------------------------------------------------===// 1523ee550765232e22d0daf6407141ecef4c55c06fVikram S. Adve 1623ee550765232e22d0daf6407141ecef4c55c06fVikram S. Adve#ifndef LLVM_CODEGEN_MACHINEINSTR_H 1723ee550765232e22d0daf6407141ecef4c55c06fVikram S. Adve#define LLVM_CODEGEN_MACHINEINSTR_H 1823ee550765232e22d0daf6407141ecef4c55c06fVikram S. Adve 19103a64318bb716d68a4248996466900411d789beChris Lattner#include "llvm/CodeGen/MachineOperand.h" 2079e6ed9d4733ef6bfaf6e6ae71a013c8b226b7c9Owen Anderson#include "llvm/Target/TargetInstrDesc.h" 21518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner#include "llvm/Target/TargetOpcodes.h" 2284e679beea11ac55ed7871eec4deaccdf393de3eChris Lattner#include "llvm/ADT/ilist.h" 2384e679beea11ac55ed7871eec4deaccdf393de3eChris Lattner#include "llvm/ADT/ilist_node.h" 2484e679beea11ac55ed7871eec4deaccdf393de3eChris Lattner#include "llvm/ADT/STLExtras.h" 2584e679beea11ac55ed7871eec4deaccdf393de3eChris Lattner#include "llvm/ADT/DenseMapInfo.h" 261e86a66b00b94adc4ad6977ef6b47c516ac62cecDevang Patel#include "llvm/Support/DebugLoc.h" 271baa88e3de8947b02d9ef4caa73e5860f048ec6eDan Gohman#include <vector> 28be583b914d8156b99d3da264d5adca37fee8dbc9John Criswell 29d0fde30ce850b78371fd1386338350591f9ff494Brian Gaekenamespace llvm { 30d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke 3118b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesentemplate <typename T> class SmallVectorImpl; 32e33f44cfc547359bc28526e4c5e1852b600b4448Dan Gohmanclass AliasAnalysis; 33749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattnerclass TargetInstrDesc; 34b27087f5aa574f875598f4a309b7dd687c64a455Evan Chengclass TargetInstrInfo; 356f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohmanclass TargetRegisterInfo; 368e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohmanclass MachineFunction; 37c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohmanclass MachineMemOperand; 38c0b9dc5be79f009d260edb5cd5e1d8346587aaa2Alkis Evlogimenos 39b05497e0ca1ba2e7f57b792cc160e5d1c8579582Chris Lattner//===----------------------------------------------------------------------===// 408b915b4ed2c6e43413937ac71c0cbcf476ad1a98Chris Lattner/// MachineInstr - Representation of each machine instruction. 418b915b4ed2c6e43413937ac71c0cbcf476ad1a98Chris Lattner/// 42fed90b6d097d50881afb45e4d79f430db66dd741Dan Gohmanclass MachineInstr : public ilist_node<MachineInstr> { 43c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohmanpublic: 44c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman typedef MachineMemOperand **mmo_iterator; 45c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman 4645282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner /// Flags to specify different kinds of comments to output in 4745282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner /// assembly code. These flags carry semantic information not 4845282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner /// otherwise easily derivable from the IR text. 4945282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner /// 5045282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner enum CommentFlag { 5145282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner ReloadReuse = 0x1 5245282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner }; 536dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov 546dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov enum MIFlag { 556dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov NoFlags = 0, 566dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov FrameSetup = 1 << 0 // Instruction is used as a part of 576dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov // function frame setup code. 586dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov }; 59c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohmanprivate: 60749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner const TargetInstrDesc *TID; // Instruction descriptor. 616647b59c9263eb1decd7f7ff353c0c99ec09ae6cAnton Korobeynikov uint16_t NumImplicitOps; // Number of implicit operands (which 629a00279988612d0f960fb8d43e4ccfcab89e0e14Evan Cheng // are determined at construction time). 639a00279988612d0f960fb8d43e4ccfcab89e0e14Evan Cheng 646dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov uint8_t Flags; // Various bits of additional 656dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov // information about machine 666dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov // instruction. 676dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov 686647b59c9263eb1decd7f7ff353c0c99ec09ae6cAnton Korobeynikov uint8_t AsmPrinterFlags; // Various bits of information used by 691251443929a256c833717e1030c368d3b6e4cb7cDavid Greene // the AsmPrinter to emit helpful 701251443929a256c833717e1030c368d3b6e4cb7cDavid Greene // comments. This is *not* semantic 711251443929a256c833717e1030c368d3b6e4cb7cDavid Greene // information. Do not use this for 721251443929a256c833717e1030c368d3b6e4cb7cDavid Greene // anything other than to convey comment 731251443929a256c833717e1030c368d3b6e4cb7cDavid Greene // information to AsmPrinter. 741251443929a256c833717e1030c368d3b6e4cb7cDavid Greene 75943b5e117fe9a087f9aa529a2632c2d32cc22374Chris Lattner std::vector<MachineOperand> Operands; // the operands 76c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman mmo_iterator MemRefs; // information on memory references 77c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman mmo_iterator MemRefsEnd; 78f20c1a497fe3922ac718429d65a5fe396890575eChris Lattner MachineBasicBlock *Parent; // Pointer to the owning basic block. 7906efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen DebugLoc debugLoc; // Source line information. 80c54839573cd9ffa6af33dc5190cc40d498534585Brian Gaeke 81413746e9833d97a8b463ef6a788aa326cf3829a2Chris Lattner // OperandComplete - Return true if it's illegal to add a new operand 82413746e9833d97a8b463ef6a788aa326cf3829a2Chris Lattner bool OperandsComplete() const; 83a2bae305fb5a870c4ef753ed290a7ddea73ec82bVikram S. Adve 848e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman MachineInstr(const MachineInstr&); // DO NOT IMPLEMENT 859452b0797a80001920576d7e2ef4af05242cba69Chris Lattner void operator=(const MachineInstr&); // DO NOT IMPLEMENT 86c0b9dc5be79f009d260edb5cd5e1d8346587aaa2Alkis Evlogimenos 87c0b9dc5be79f009d260edb5cd5e1d8346587aaa2Alkis Evlogimenos // Intrusive list support 88fed90b6d097d50881afb45e4d79f430db66dd741Dan Gohman friend struct ilist_traits<MachineInstr>; 89fed90b6d097d50881afb45e4d79f430db66dd741Dan Gohman friend struct ilist_traits<MachineBasicBlock>; 90f20c1a497fe3922ac718429d65a5fe396890575eChris Lattner void setParent(MachineBasicBlock *P) { Parent = P; } 918e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman 928e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman /// MachineInstr ctor - This constructor creates a copy of the given 938e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman /// MachineInstr in the given MachineFunction. 948e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman MachineInstr(MachineFunction &, const MachineInstr &); 958e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman 96c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan Cheng /// MachineInstr ctor - This constructor creates a dummy MachineInstr with 9767f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng /// TID NULL and no operands. 98c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan Cheng MachineInstr(); 99e8b57ef2603ed522083dc18e559ca4e20abf22aeVikram S. Adve 10006efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen // The next two constructors have DebugLoc and non-DebugLoc versions; 10106efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen // over time, the non-DebugLoc versions should be phased out and eventually 10206efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen // removed. 10306efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen 104666f8cb9b7486a45f59fd9ba3202e4b67dbad58cBob Wilson /// MachineInstr ctor - This constructor creates a MachineInstr and adds the 105666f8cb9b7486a45f59fd9ba3202e4b67dbad58cBob Wilson /// implicit operands. It reserves space for the number of operands specified 106666f8cb9b7486a45f59fd9ba3202e4b67dbad58cBob Wilson /// by the TargetInstrDesc. The version with a DebugLoc should be preferred. 107749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner explicit MachineInstr(const TargetInstrDesc &TID, bool NoImp = false); 108d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng 1097db458fb0768059f050d3a0f1a26818fa8e22712Chris Lattner /// MachineInstr ctor - Work exactly the same as the ctor above, except that 1107db458fb0768059f050d3a0f1a26818fa8e22712Chris Lattner /// the MachineInstr is created and added to the end of the specified basic 11106efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen /// block. The version with a DebugLoc should be preferred. 112749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner MachineInstr(MachineBasicBlock *MBB, const TargetInstrDesc &TID); 113ea61c358720aa6c7a159d51658b34276316aa841Misha Brukman 11406efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen /// MachineInstr ctor - This constructor create a MachineInstr and add the 11506efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen /// implicit operands. It reserves space for number of operands specified by 11606efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen /// TargetInstrDesc. An explicit DebugLoc is supplied. 117108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach explicit MachineInstr(const TargetInstrDesc &TID, const DebugLoc dl, 11806efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen bool NoImp = false); 11906efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen 12006efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen /// MachineInstr ctor - Work exactly the same as the ctor above, except that 12106efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen /// the MachineInstr is created and added to the end of the specified basic 12206efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen /// block. 123108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach MachineInstr(MachineBasicBlock *MBB, const DebugLoc dl, 12406efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen const TargetInstrDesc &TID); 12506efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen 126aad5c0505183a5b7913f1a443a1f0650122551ccAlkis Evlogimenos ~MachineInstr(); 127aad5c0505183a5b7913f1a443a1f0650122551ccAlkis Evlogimenos 1288e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman // MachineInstrs are pool-allocated and owned by MachineFunction. 1298e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman friend class MachineFunction; 1308e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman 1318e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohmanpublic: 132f20c1a497fe3922ac718429d65a5fe396890575eChris Lattner const MachineBasicBlock* getParent() const { return Parent; } 133f20c1a497fe3922ac718429d65a5fe396890575eChris Lattner MachineBasicBlock* getParent() { return Parent; } 13406efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen 1351251443929a256c833717e1030c368d3b6e4cb7cDavid Greene /// getAsmPrinterFlags - Return the asm printer flags bitvector. 1361251443929a256c833717e1030c368d3b6e4cb7cDavid Greene /// 1376647b59c9263eb1decd7f7ff353c0c99ec09ae6cAnton Korobeynikov uint8_t getAsmPrinterFlags() const { return AsmPrinterFlags; } 1381251443929a256c833717e1030c368d3b6e4cb7cDavid Greene 139cbd323ad5259dc2bd3428a4ac26718b10adcd3cfChris Lattner /// clearAsmPrinterFlags - clear the AsmPrinter bitvector 140cbd323ad5259dc2bd3428a4ac26718b10adcd3cfChris Lattner /// 141cbd323ad5259dc2bd3428a4ac26718b10adcd3cfChris Lattner void clearAsmPrinterFlags() { AsmPrinterFlags = 0; } 142108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach 1431251443929a256c833717e1030c368d3b6e4cb7cDavid Greene /// getAsmPrinterFlag - Return whether an AsmPrinter flag is set. 1441251443929a256c833717e1030c368d3b6e4cb7cDavid Greene /// 14545282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner bool getAsmPrinterFlag(CommentFlag Flag) const { 1461251443929a256c833717e1030c368d3b6e4cb7cDavid Greene return AsmPrinterFlags & Flag; 1471251443929a256c833717e1030c368d3b6e4cb7cDavid Greene } 1481251443929a256c833717e1030c368d3b6e4cb7cDavid Greene 1491251443929a256c833717e1030c368d3b6e4cb7cDavid Greene /// setAsmPrinterFlag - Set a flag for the AsmPrinter. 1501251443929a256c833717e1030c368d3b6e4cb7cDavid Greene /// 15145282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner void setAsmPrinterFlag(CommentFlag Flag) { 1526dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov AsmPrinterFlags |= (uint8_t)Flag; 1536dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov } 1546dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov 1556dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov /// getFlags - Return the MI flags bitvector. 1566dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov uint8_t getFlags() const { 1576dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov return Flags; 1586dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov } 1596dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov 1606dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov /// getFlag - Return whether an MI flag is set. 1616dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov bool getFlag(MIFlag Flag) const { 1626dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov return Flags & Flag; 1636dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov } 1646dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov 1656dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov /// setFlag - Set a MI flag. 1666dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov void setFlag(MIFlag Flag) { 1676dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov Flags |= (uint8_t)Flag; 1686dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov } 1696dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov 1706dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov void setFlags(unsigned flags) { 1716dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov Flags = flags; 1721251443929a256c833717e1030c368d3b6e4cb7cDavid Greene } 173108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach 174cbd323ad5259dc2bd3428a4ac26718b10adcd3cfChris Lattner /// clearAsmPrinterFlag - clear specific AsmPrinter flags 175cbd323ad5259dc2bd3428a4ac26718b10adcd3cfChris Lattner /// 176cbd323ad5259dc2bd3428a4ac26718b10adcd3cfChris Lattner void clearAsmPrinterFlag(CommentFlag Flag) { 177cbd323ad5259dc2bd3428a4ac26718b10adcd3cfChris Lattner AsmPrinterFlags &= ~Flag; 178cbd323ad5259dc2bd3428a4ac26718b10adcd3cfChris Lattner } 1791251443929a256c833717e1030c368d3b6e4cb7cDavid Greene 18006efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen /// getDebugLoc - Returns the debug location id of this MachineInstr. 18106efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen /// 182d5fb7906130989a579d1bfe4490b414331e94feeChris Lattner DebugLoc getDebugLoc() const { return debugLoc; } 1836dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov 18469244300b8a0112efb44b6273ecea4ca6264b8cfChris Lattner /// getDesc - Returns the target instruction descriptor of this 18567f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng /// MachineInstr. 186749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner const TargetInstrDesc &getDesc() const { return *TID; } 187ab8672c8bb83e722b856eac67863542ea7e0cbb2Alkis Evlogimenos 188c54839573cd9ffa6af33dc5190cc40d498534585Brian Gaeke /// getOpcode - Returns the opcode of this MachineInstr. 189cd0b3a90aa34bd42d75d8d86f74ca4972145781dBrian Gaeke /// 19079e6ed9d4733ef6bfaf6e6ae71a013c8b226b7c9Owen Anderson int getOpcode() const { return TID->Opcode; } 1919f495b54fa94dba4e0be59ba9736c7cf18d996d9Vikram S. Adve 192cd0b3a90aa34bd42d75d8d86f74ca4972145781dBrian Gaeke /// Access to explicit operands of the instruction. 193cd0b3a90aa34bd42d75d8d86f74ca4972145781dBrian Gaeke /// 19434cd4a484e532cc463fd5a4bf59b88d13c5467c1Evan Cheng unsigned getNumOperands() const { return (unsigned)Operands.size(); } 195ea61c358720aa6c7a159d51658b34276316aa841Misha Brukman 196572f5c8c0cf66cd6f53dda255cd8c4d8f27d8505Chris Lattner const MachineOperand& getOperand(unsigned i) const { 197a2bae305fb5a870c4ef753ed290a7ddea73ec82bVikram S. Adve assert(i < getNumOperands() && "getOperand() out of range!"); 198943b5e117fe9a087f9aa529a2632c2d32cc22374Chris Lattner return Operands[i]; 199572f5c8c0cf66cd6f53dda255cd8c4d8f27d8505Chris Lattner } 200572f5c8c0cf66cd6f53dda255cd8c4d8f27d8505Chris Lattner MachineOperand& getOperand(unsigned i) { 201a2bae305fb5a870c4ef753ed290a7ddea73ec82bVikram S. Adve assert(i < getNumOperands() && "getOperand() out of range!"); 202943b5e117fe9a087f9aa529a2632c2d32cc22374Chris Lattner return Operands[i]; 203572f5c8c0cf66cd6f53dda255cd8c4d8f27d8505Chris Lattner } 2046d6c3f86186333037f2fd3fb001e8b2998c080d9Chris Lattner 20519e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng /// getNumExplicitOperands - Returns the number of non-implicit operands. 20619e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng /// 20719e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng unsigned getNumExplicitOperands() const; 208ccb5c677c66aea0a86878de69d5346ef802a6505Chris Lattner 209ccb5c677c66aea0a86878de69d5346ef802a6505Chris Lattner /// iterator/begin/end - Iterate over all operands of a machine instruction. 210ccb5c677c66aea0a86878de69d5346ef802a6505Chris Lattner typedef std::vector<MachineOperand>::iterator mop_iterator; 211ccb5c677c66aea0a86878de69d5346ef802a6505Chris Lattner typedef std::vector<MachineOperand>::const_iterator const_mop_iterator; 212ccb5c677c66aea0a86878de69d5346ef802a6505Chris Lattner 213ccb5c677c66aea0a86878de69d5346ef802a6505Chris Lattner mop_iterator operands_begin() { return Operands.begin(); } 214ccb5c677c66aea0a86878de69d5346ef802a6505Chris Lattner mop_iterator operands_end() { return Operands.end(); } 215ccb5c677c66aea0a86878de69d5346ef802a6505Chris Lattner 216ccb5c677c66aea0a86878de69d5346ef802a6505Chris Lattner const_mop_iterator operands_begin() const { return Operands.begin(); } 217ccb5c677c66aea0a86878de69d5346ef802a6505Chris Lattner const_mop_iterator operands_end() const { return Operands.end(); } 218ccb5c677c66aea0a86878de69d5346ef802a6505Chris Lattner 21969de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman /// Access to memory operands of the instruction 220c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman mmo_iterator memoperands_begin() const { return MemRefs; } 221c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman mmo_iterator memoperands_end() const { return MemRefsEnd; } 222c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman bool memoperands_empty() const { return MemRefsEnd == MemRefs; } 22369de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman 224cddc11e7570893233af8e84dfb8e7f0f9ab0090dDan Gohman /// hasOneMemOperand - Return true if this instruction has exactly one 225cddc11e7570893233af8e84dfb8e7f0f9ab0090dDan Gohman /// MachineMemOperand. 226cddc11e7570893233af8e84dfb8e7f0f9ab0090dDan Gohman bool hasOneMemOperand() const { 227c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman return MemRefsEnd - MemRefs == 1; 228cddc11e7570893233af8e84dfb8e7f0f9ab0090dDan Gohman } 229cddc11e7570893233af8e84dfb8e7f0f9ab0090dDan Gohman 230506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng enum MICheckType { 231506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng CheckDefs, // Check all operands for equality 232cbc988be22bc9411d95215c8b7251b5f85710674Evan Cheng CheckKillDead, // Check all operands including kill / dead markers 233506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng IgnoreDefs, // Ignore all definitions 234506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng IgnoreVRegDefs // Ignore virtual register definitions 235506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng }; 236506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng 237fcfcb6cb502fd4562b57425a5802dc52f358c451Chris Lattner /// isIdenticalTo - Return true if this instruction is identical to (same 238fcfcb6cb502fd4562b57425a5802dc52f358c451Chris Lattner /// opcode and same operands as) the specified instruction. 239506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng bool isIdenticalTo(const MachineInstr *Other, 240506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng MICheckType Check = CheckDefs) const; 241a2bae305fb5a870c4ef753ed290a7ddea73ec82bVikram S. Adve 2426b560918426182d2b46b899d609911d49f6739f7Chris Lattner /// removeFromParent - This method unlinks 'this' from the containing basic 2436b560918426182d2b46b899d609911d49f6739f7Chris Lattner /// block, and returns it, but does not delete it. 2446b560918426182d2b46b899d609911d49f6739f7Chris Lattner MachineInstr *removeFromParent(); 245108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach 2466b560918426182d2b46b899d609911d49f6739f7Chris Lattner /// eraseFromParent - This method unlinks 'this' from the containing basic 2476b560918426182d2b46b899d609911d49f6739f7Chris Lattner /// block and deletes it. 2488e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman void eraseFromParent(); 249466b534a570f574ed485d875bbca8454f68dcb52Tanya Lattner 2504406604047423576e36657c7ede266ca42e79642Dan Gohman /// isLabel - Returns true if the MachineInstr represents a label. 2514406604047423576e36657c7ede266ca42e79642Dan Gohman /// 252518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isLabel() const { 2537431beaba2a01c3fe299c861b2ec85cbf1dc81c4Bill Wendling return getOpcode() == TargetOpcode::PROLOG_LABEL || 254518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner getOpcode() == TargetOpcode::EH_LABEL || 255518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner getOpcode() == TargetOpcode::GC_LABEL; 256518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner } 257108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach 2587431beaba2a01c3fe299c861b2ec85cbf1dc81c4Bill Wendling bool isPrologLabel() const { 2597431beaba2a01c3fe299c861b2ec85cbf1dc81c4Bill Wendling return getOpcode() == TargetOpcode::PROLOG_LABEL; 2607431beaba2a01c3fe299c861b2ec85cbf1dc81c4Bill Wendling } 261518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isEHLabel() const { return getOpcode() == TargetOpcode::EH_LABEL; } 262518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isGCLabel() const { return getOpcode() == TargetOpcode::GC_LABEL; } 263518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isDebugValue() const { return getOpcode() == TargetOpcode::DBG_VALUE; } 264108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach 265518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isPHI() const { return getOpcode() == TargetOpcode::PHI; } 266518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isKill() const { return getOpcode() == TargetOpcode::KILL; } 267518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isImplicitDef() const { return getOpcode()==TargetOpcode::IMPLICIT_DEF; } 268518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isInlineAsm() const { return getOpcode() == TargetOpcode::INLINEASM; } 269c36b7069b42bece963b7e6adf020353ce990ef76Evan Cheng bool isStackAligningInlineAsm() const; 270518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isInsertSubreg() const { 271518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner return getOpcode() == TargetOpcode::INSERT_SUBREG; 272518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner } 273518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isSubregToReg() const { 274518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner return getOpcode() == TargetOpcode::SUBREG_TO_REG; 275518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner } 2763d720fbc6ad40bc9287a420f824d244965d24631Evan Cheng bool isRegSequence() const { 2773d720fbc6ad40bc9287a420f824d244965d24631Evan Cheng return getOpcode() == TargetOpcode::REG_SEQUENCE; 2783d720fbc6ad40bc9287a420f824d244965d24631Evan Cheng } 279a4e1ba53ddedd08669886b2849926bb33facc198Jakob Stoklund Olesen bool isCopy() const { 280a4e1ba53ddedd08669886b2849926bb33facc198Jakob Stoklund Olesen return getOpcode() == TargetOpcode::COPY; 281a4e1ba53ddedd08669886b2849926bb33facc198Jakob Stoklund Olesen } 282a4e1ba53ddedd08669886b2849926bb33facc198Jakob Stoklund Olesen 283273f7e42994a5bce0614d04d96dbfdf05fd652e5Jakob Stoklund Olesen /// isCopyLike - Return true if the instruction behaves like a copy. 284273f7e42994a5bce0614d04d96dbfdf05fd652e5Jakob Stoklund Olesen /// This does not include native copy instructions. 285273f7e42994a5bce0614d04d96dbfdf05fd652e5Jakob Stoklund Olesen bool isCopyLike() const { 2860bc25f40402f48ba42fc45403f635b20d90fabb3Jakob Stoklund Olesen return isCopy() || isSubregToReg(); 2870bc25f40402f48ba42fc45403f635b20d90fabb3Jakob Stoklund Olesen } 2880bc25f40402f48ba42fc45403f635b20d90fabb3Jakob Stoklund Olesen 2890bc25f40402f48ba42fc45403f635b20d90fabb3Jakob Stoklund Olesen /// isIdentityCopy - Return true is the instruction is an identity copy. 2900bc25f40402f48ba42fc45403f635b20d90fabb3Jakob Stoklund Olesen bool isIdentityCopy() const { 2910bc25f40402f48ba42fc45403f635b20d90fabb3Jakob Stoklund Olesen return isCopy() && getOperand(0).getReg() == getOperand(1).getReg() && 2920bc25f40402f48ba42fc45403f635b20d90fabb3Jakob Stoklund Olesen getOperand(0).getSubReg() == getOperand(1).getSubReg(); 293273f7e42994a5bce0614d04d96dbfdf05fd652e5Jakob Stoklund Olesen } 294273f7e42994a5bce0614d04d96dbfdf05fd652e5Jakob Stoklund Olesen 2956130f66eaae89f8878590796977678afa8448926Evan Cheng /// readsRegister - Return true if the MachineInstr reads the specified 2966130f66eaae89f8878590796977678afa8448926Evan Cheng /// register. If TargetRegisterInfo is passed, then it also checks if there 2976130f66eaae89f8878590796977678afa8448926Evan Cheng /// is a read of a super-register. 2987ebc4d63db05ac214d36bc01b4d60adadaf923e5Jakob Stoklund Olesen /// This does not count partial redefines of virtual registers as reads: 2997ebc4d63db05ac214d36bc01b4d60adadaf923e5Jakob Stoklund Olesen /// %reg1024:6 = OP. 3006130f66eaae89f8878590796977678afa8448926Evan Cheng bool readsRegister(unsigned Reg, const TargetRegisterInfo *TRI = NULL) const { 3016130f66eaae89f8878590796977678afa8448926Evan Cheng return findRegisterUseOperandIdx(Reg, false, TRI) != -1; 3026130f66eaae89f8878590796977678afa8448926Evan Cheng } 3036130f66eaae89f8878590796977678afa8448926Evan Cheng 3047ebc4d63db05ac214d36bc01b4d60adadaf923e5Jakob Stoklund Olesen /// readsVirtualRegister - Return true if the MachineInstr reads the specified 3057ebc4d63db05ac214d36bc01b4d60adadaf923e5Jakob Stoklund Olesen /// virtual register. Take into account that a partial define is a 3067ebc4d63db05ac214d36bc01b4d60adadaf923e5Jakob Stoklund Olesen /// read-modify-write operation. 30718b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen bool readsVirtualRegister(unsigned Reg) const { 30818b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen return readsWritesVirtualRegister(Reg).first; 30918b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen } 31018b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen 31118b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen /// readsWritesVirtualRegister - Return a pair of bools (reads, writes) 31218b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen /// indicating if this instruction reads or writes Reg. This also considers 31318b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen /// partial defines. 31418b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen /// If Ops is not null, all operand indices for Reg are added. 31518b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen std::pair<bool,bool> readsWritesVirtualRegister(unsigned Reg, 31618b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen SmallVectorImpl<unsigned> *Ops = 0) const; 3177ebc4d63db05ac214d36bc01b4d60adadaf923e5Jakob Stoklund Olesen 3186130f66eaae89f8878590796977678afa8448926Evan Cheng /// killsRegister - Return true if the MachineInstr kills the specified 3196130f66eaae89f8878590796977678afa8448926Evan Cheng /// register. If TargetRegisterInfo is passed, then it also checks if there is 3206130f66eaae89f8878590796977678afa8448926Evan Cheng /// a kill of a super-register. 3216130f66eaae89f8878590796977678afa8448926Evan Cheng bool killsRegister(unsigned Reg, const TargetRegisterInfo *TRI = NULL) const { 3226130f66eaae89f8878590796977678afa8448926Evan Cheng return findRegisterUseOperandIdx(Reg, true, TRI) != -1; 3236130f66eaae89f8878590796977678afa8448926Evan Cheng } 3246130f66eaae89f8878590796977678afa8448926Evan Cheng 3251015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng /// definesRegister - Return true if the MachineInstr fully defines the 3266130f66eaae89f8878590796977678afa8448926Evan Cheng /// specified register. If TargetRegisterInfo is passed, then it also checks 3276130f66eaae89f8878590796977678afa8448926Evan Cheng /// if there is a def of a super-register. 3281015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng /// NOTE: It's ignoring subreg indices on virtual registers. 3291015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng bool definesRegister(unsigned Reg, const TargetRegisterInfo *TRI=NULL) const { 3301015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng return findRegisterDefOperandIdx(Reg, false, false, TRI) != -1; 3311015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng } 3321015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng 3331015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng /// modifiesRegister - Return true if the MachineInstr modifies (fully define 3341015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng /// or partially define) the specified register. 3351015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng /// NOTE: It's ignoring subreg indices on virtual registers. 3361015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng bool modifiesRegister(unsigned Reg, const TargetRegisterInfo *TRI) const { 3371015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng return findRegisterDefOperandIdx(Reg, false, true, TRI) != -1; 3386130f66eaae89f8878590796977678afa8448926Evan Cheng } 3396130f66eaae89f8878590796977678afa8448926Evan Cheng 3406130f66eaae89f8878590796977678afa8448926Evan Cheng /// registerDefIsDead - Returns true if the register is dead in this machine 3416130f66eaae89f8878590796977678afa8448926Evan Cheng /// instruction. If TargetRegisterInfo is passed, then it also checks 3426130f66eaae89f8878590796977678afa8448926Evan Cheng /// if there is a dead def of a super-register. 3436130f66eaae89f8878590796977678afa8448926Evan Cheng bool registerDefIsDead(unsigned Reg, 3446130f66eaae89f8878590796977678afa8448926Evan Cheng const TargetRegisterInfo *TRI = NULL) const { 3451015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng return findRegisterDefOperandIdx(Reg, true, false, TRI) != -1; 3466130f66eaae89f8878590796977678afa8448926Evan Cheng } 3476130f66eaae89f8878590796977678afa8448926Evan Cheng 348faa510726f4b40aa4495e60e4d341c6467e3fb01Evan Cheng /// findRegisterUseOperandIdx() - Returns the operand index that is a use of 34910f9101c4c0df0837414976ad0ef0e86d6771059Jim Grosbach /// the specific register or -1 if it is not found. It further tightens 35076d7e76c15c258ec4a71fd75a2a32bca3a5e5e27Evan Cheng /// the search criteria to a use that kills the register if isKill is true. 3516130f66eaae89f8878590796977678afa8448926Evan Cheng int findRegisterUseOperandIdx(unsigned Reg, bool isKill = false, 3526130f66eaae89f8878590796977678afa8448926Evan Cheng const TargetRegisterInfo *TRI = NULL) const; 3536130f66eaae89f8878590796977678afa8448926Evan Cheng 3546130f66eaae89f8878590796977678afa8448926Evan Cheng /// findRegisterUseOperand - Wrapper for findRegisterUseOperandIdx, it returns 3556130f66eaae89f8878590796977678afa8448926Evan Cheng /// a pointer to the MachineOperand rather than an index. 3569180c8e3cfd12abd21242768db05072a209ca6e7Evan Cheng MachineOperand *findRegisterUseOperand(unsigned Reg, bool isKill = false, 3576130f66eaae89f8878590796977678afa8448926Evan Cheng const TargetRegisterInfo *TRI = NULL) { 3586130f66eaae89f8878590796977678afa8448926Evan Cheng int Idx = findRegisterUseOperandIdx(Reg, isKill, TRI); 3596130f66eaae89f8878590796977678afa8448926Evan Cheng return (Idx == -1) ? NULL : &getOperand(Idx); 3606130f66eaae89f8878590796977678afa8448926Evan Cheng } 361108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach 3626130f66eaae89f8878590796977678afa8448926Evan Cheng /// findRegisterDefOperandIdx() - Returns the operand index that is a def of 363703bfe69092e8da79fbef2fc5ca07b805ad9f753Dan Gohman /// the specified register or -1 if it is not found. If isDead is true, defs 3641015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng /// that are not dead are skipped. If Overlap is true, then it also looks for 3651015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng /// defs that merely overlap the specified register. If TargetRegisterInfo is 3661015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng /// non-null, then it also checks if there is a def of a super-register. 3671015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng int findRegisterDefOperandIdx(unsigned Reg, 3681015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng bool isDead = false, bool Overlap = false, 3696130f66eaae89f8878590796977678afa8448926Evan Cheng const TargetRegisterInfo *TRI = NULL) const; 3706130f66eaae89f8878590796977678afa8448926Evan Cheng 3716130f66eaae89f8878590796977678afa8448926Evan Cheng /// findRegisterDefOperand - Wrapper for findRegisterDefOperandIdx, it returns 3726130f66eaae89f8878590796977678afa8448926Evan Cheng /// a pointer to the MachineOperand rather than an index. 373631bd3cdf39eb099d5d5d279b17b08f119956538Evan Cheng MachineOperand *findRegisterDefOperand(unsigned Reg, bool isDead = false, 3746130f66eaae89f8878590796977678afa8448926Evan Cheng const TargetRegisterInfo *TRI = NULL) { 3751015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng int Idx = findRegisterDefOperandIdx(Reg, isDead, false, TRI); 3766130f66eaae89f8878590796977678afa8448926Evan Cheng return (Idx == -1) ? NULL : &getOperand(Idx); 3776130f66eaae89f8878590796977678afa8448926Evan Cheng } 37819e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng 379f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng /// findFirstPredOperandIdx() - Find the index of the first operand in the 380f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng /// operand list that is used to represent the predicate. It returns -1 if 381f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng /// none is found. 382f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng int findFirstPredOperandIdx() const; 383108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach 384d9df5017040489303acb57bdd8697ef0f8bafc08Bob Wilson /// isRegTiedToUseOperand - Given the index of a register def operand, 385d9df5017040489303acb57bdd8697ef0f8bafc08Bob Wilson /// check if the register def is tied to a source operand, due to either 386d9df5017040489303acb57bdd8697ef0f8bafc08Bob Wilson /// two-address elimination or inline assembly constraints. Returns the 387d9df5017040489303acb57bdd8697ef0f8bafc08Bob Wilson /// first tied use operand index by reference is UseOpIdx is not null. 388ce9be2cf5dc84865f6b819bd3f9be16944426268Jakob Stoklund Olesen bool isRegTiedToUseOperand(unsigned DefOpIdx, unsigned *UseOpIdx = 0) const; 38932dfbeada7292167bb488f36a71a5a6a519ddaffEvan Cheng 390a24752ff43dc1ad8c18c5d9e78549c45f62b980eEvan Cheng /// isRegTiedToDefOperand - Return true if the use operand of the specified 391a24752ff43dc1ad8c18c5d9e78549c45f62b980eEvan Cheng /// index is tied to an def operand. It also returns the def operand index by 392a24752ff43dc1ad8c18c5d9e78549c45f62b980eEvan Cheng /// reference if DefOpIdx is not null. 393ce9be2cf5dc84865f6b819bd3f9be16944426268Jakob Stoklund Olesen bool isRegTiedToDefOperand(unsigned UseOpIdx, unsigned *DefOpIdx = 0) const; 394a24752ff43dc1ad8c18c5d9e78549c45f62b980eEvan Cheng 395e6cd757e6800b9b94a6459ec148c0624c4f2e3c1Dan Gohman /// clearKillInfo - Clears kill flags on all operands. 396e6cd757e6800b9b94a6459ec148c0624c4f2e3c1Dan Gohman /// 397e6cd757e6800b9b94a6459ec148c0624c4f2e3c1Dan Gohman void clearKillInfo(); 398e6cd757e6800b9b94a6459ec148c0624c4f2e3c1Dan Gohman 3999a00279988612d0f960fb8d43e4ccfcab89e0e14Evan Cheng /// copyKillDeadInfo - Copies kill / dead operand properties from MI. 4009a00279988612d0f960fb8d43e4ccfcab89e0e14Evan Cheng /// 401576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng void copyKillDeadInfo(const MachineInstr *MI); 4029a00279988612d0f960fb8d43e4ccfcab89e0e14Evan Cheng 40319e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng /// copyPredicates - Copies predicate operand(s) from MI. 40419e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng void copyPredicates(const MachineInstr *MI); 40519e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng 4069edf7deb37f0f97664f279040fa15d89f32e23d9Jakob Stoklund Olesen /// substituteRegister - Replace all occurrences of FromReg with ToReg:SubIdx, 4079edf7deb37f0f97664f279040fa15d89f32e23d9Jakob Stoklund Olesen /// properly composing subreg indices where necessary. 4089edf7deb37f0f97664f279040fa15d89f32e23d9Jakob Stoklund Olesen void substituteRegister(unsigned FromReg, unsigned ToReg, unsigned SubIdx, 4099edf7deb37f0f97664f279040fa15d89f32e23d9Jakob Stoklund Olesen const TargetRegisterInfo &RegInfo); 4109edf7deb37f0f97664f279040fa15d89f32e23d9Jakob Stoklund Olesen 411b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// addRegisterKilled - We have determined MI kills a register. Look for the 412b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// operand that uses it and mark it as IsKill. If AddIfNotFound is true, 413b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// add a implicit operand if it's not found. Returns true if the operand 414b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// exists / is added. 4156f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman bool addRegisterKilled(unsigned IncomingReg, 4166f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman const TargetRegisterInfo *RegInfo, 417b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson bool AddIfNotFound = false); 4188efadf94b568c08de3ff8ce35fd904a935387406Jakob Stoklund Olesen 419b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// addRegisterDead - We have determined MI defined a register without a use. 420b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// Look for the operand that defines it and mark it as IsDead. If 421b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// AddIfNotFound is true, add a implicit operand if it's not found. Returns 422b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// true if the operand exists / is added. 4236f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman bool addRegisterDead(unsigned IncomingReg, const TargetRegisterInfo *RegInfo, 424b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson bool AddIfNotFound = false); 425b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson 4268efadf94b568c08de3ff8ce35fd904a935387406Jakob Stoklund Olesen /// addRegisterDefined - We have determined MI defines a register. Make sure 4278efadf94b568c08de3ff8ce35fd904a935387406Jakob Stoklund Olesen /// there is an operand defining Reg. 4288efadf94b568c08de3ff8ce35fd904a935387406Jakob Stoklund Olesen void addRegisterDefined(unsigned IncomingReg, 42963e6a488cb6c29983415221719d05fbf99e00193Jakob Stoklund Olesen const TargetRegisterInfo *RegInfo = 0); 4308efadf94b568c08de3ff8ce35fd904a935387406Jakob Stoklund Olesen 4312a09f878ef64f216268df3dbe2f51b949f18c145Jim Grosbach /// setPhysRegsDeadExcept - Mark every physreg used by this instruction as 4322a09f878ef64f216268df3dbe2f51b949f18c145Jim Grosbach /// dead except those in the UsedRegs list. 433db4971259ce94cea26e555e9ade82672a3581f5cDan Gohman void setPhysRegsDeadExcept(const SmallVectorImpl<unsigned> &UsedRegs, 434db4971259ce94cea26e555e9ade82672a3581f5cDan Gohman const TargetRegisterInfo &TRI); 435db4971259ce94cea26e555e9ade82672a3581f5cDan Gohman 4369f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng /// isSafeToMove - Return true if it is safe to move this instruction. If 4379f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng /// SawStore is set to true, it means that there is a store (or call) between 4389f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng /// the instruction's location and its intended destination. 439ac1abde05b7e6956c01deb6557539bee8fea30f4Evan Cheng bool isSafeToMove(const TargetInstrInfo *TII, AliasAnalysis *AA, 440ac1abde05b7e6956c01deb6557539bee8fea30f4Evan Cheng bool &SawStore) const; 441b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng 4423e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman /// isSafeToReMat - Return true if it's safe to rematerialize the specified 4433e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman /// instruction which defined the specified register instead of copying it. 444ac1abde05b7e6956c01deb6557539bee8fea30f4Evan Cheng bool isSafeToReMat(const TargetInstrInfo *TII, AliasAnalysis *AA, 445ac1abde05b7e6956c01deb6557539bee8fea30f4Evan Cheng unsigned DstReg) const; 446df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng 4473e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman /// hasVolatileMemoryRef - Return true if this instruction may have a 4483e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman /// volatile memory reference, or if the information describing the 4493e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman /// memory reference is not available. Return false if it is known to 4503e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman /// have no volatile memory references. 4513e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman bool hasVolatileMemoryRef() const; 4523e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman 453e33f44cfc547359bc28526e4c5e1852b600b4448Dan Gohman /// isInvariantLoad - Return true if this instruction is loading from a 454e33f44cfc547359bc28526e4c5e1852b600b4448Dan Gohman /// location whose value is invariant across the function. For example, 455f451cb870efcf9e0302d25ed05f4cac6bb494e42Dan Gohman /// loading a value from the constant pool or from the argument area of 456e33f44cfc547359bc28526e4c5e1852b600b4448Dan Gohman /// a function if it does not change. This should only return true of *all* 457e33f44cfc547359bc28526e4c5e1852b600b4448Dan Gohman /// loads the instruction does are invariant (if it does multiple loads). 458a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman bool isInvariantLoad(AliasAnalysis *AA) const; 459e33f44cfc547359bc28526e4c5e1852b600b4448Dan Gohman 460229694f0ee630ceabe96a8bd48952f6740f928b2Evan Cheng /// isConstantValuePHI - If the specified instruction is a PHI that always 461229694f0ee630ceabe96a8bd48952f6740f928b2Evan Cheng /// merges together the same virtual register, return the register, otherwise 462229694f0ee630ceabe96a8bd48952f6740f928b2Evan Cheng /// return 0. 463229694f0ee630ceabe96a8bd48952f6740f928b2Evan Cheng unsigned isConstantValuePHI() const; 464229694f0ee630ceabe96a8bd48952f6740f928b2Evan Cheng 465c36b7069b42bece963b7e6adf020353ce990ef76Evan Cheng /// hasUnmodeledSideEffects - Return true if this instruction has side 466c36b7069b42bece963b7e6adf020353ce990ef76Evan Cheng /// effects that are not modeled by mayLoad / mayStore, etc. 467c36b7069b42bece963b7e6adf020353ce990ef76Evan Cheng /// For all instructions, the property is encoded in TargetInstrDesc::Flags 468c36b7069b42bece963b7e6adf020353ce990ef76Evan Cheng /// (see TargetInstrDesc::hasUnmodeledSideEffects(). The only exception is 469c36b7069b42bece963b7e6adf020353ce990ef76Evan Cheng /// INLINEASM instruction, in which case the side effect property is encoded 470c36b7069b42bece963b7e6adf020353ce990ef76Evan Cheng /// in one of its operands (see InlineAsm::Extra_HasSideEffect). 471c36b7069b42bece963b7e6adf020353ce990ef76Evan Cheng /// 472c36b7069b42bece963b7e6adf020353ce990ef76Evan Cheng bool hasUnmodeledSideEffects() const; 473c36b7069b42bece963b7e6adf020353ce990ef76Evan Cheng 474a57fabe815ccf016eead526eb3ef475f116ab155Evan Cheng /// allDefsAreDead - Return true if all the defs of this instruction are dead. 475a57fabe815ccf016eead526eb3ef475f116ab155Evan Cheng /// 476a57fabe815ccf016eead526eb3ef475f116ab155Evan Cheng bool allDefsAreDead() const; 477a57fabe815ccf016eead526eb3ef475f116ab155Evan Cheng 478b179b46cc558c720d23a066c768bad71f975eb93Evan Cheng /// copyImplicitOps - Copy implicit register operands from specified 479b179b46cc558c720d23a066c768bad71f975eb93Evan Cheng /// instruction to this instruction. 480b179b46cc558c720d23a066c768bad71f975eb93Evan Cheng void copyImplicitOps(const MachineInstr *MI); 481b179b46cc558c720d23a066c768bad71f975eb93Evan Cheng 482a995e6086deca9cbd9aab9d6e1e94b36964b66daVikram S. Adve // 483a995e6086deca9cbd9aab9d6e1e94b36964b66daVikram S. Adve // Debugging support 484fa78fbf446b505767e838f9c188707183c57fc9cChris Lattner // 485cb3718832375a581c5ea23f15918f3ea447a446cOwen Anderson void print(raw_ostream &OS, const TargetMachine *TM = 0) const; 486572f5c8c0cf66cd6f53dda255cd8c4d8f27d8505Chris Lattner void dump() const; 4872f898d207466bf233b55607e404baca302bc7b5eChris Lattner 488413746e9833d97a8b463ef6a788aa326cf3829a2Chris Lattner //===--------------------------------------------------------------------===// 48962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Accessors used to build up machine instructions. 4907ad6be7b01a902f532eebb607306f7b3f4627718Chris Lattner 49162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// addOperand - Add the specified operand to the instruction. If it is an 49262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// implicit operand, it is added to the end of the operand list. If it is 49362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// an explicit operand it is added at the end of the explicit operand list 494108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach /// (before the first implicit operand). 49562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner void addOperand(const MachineOperand &Op); 496108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach 4975080f4d9919d39b367891dc51e739c571a66036cChris Lattner /// setDesc - Replace the instruction descriptor (thus opcode) of 49867f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng /// the current instruction with a new one. 4993c8cbe6567c94fdd24ec9b2b8b5c5cc1b01a8c58Chris Lattner /// 5005080f4d9919d39b367891dc51e739c571a66036cChris Lattner void setDesc(const TargetInstrDesc &tid) { TID = &tid; } 5013c8cbe6567c94fdd24ec9b2b8b5c5cc1b01a8c58Chris Lattner 50206efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen /// setDebugLoc - Replace current source information with new such. 503ab160cf371d6148d49b5401a903dd4ce381b2f8cDale Johannesen /// Avoid using this, the constructor argument is preferable. 50406efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen /// 50506efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen void setDebugLoc(const DebugLoc dl) { debugLoc = dl; } 50606efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen 5073c8cbe6567c94fdd24ec9b2b8b5c5cc1b01a8c58Chris Lattner /// RemoveOperand - Erase an operand from an instruction, leaving it with one 5083c8cbe6567c94fdd24ec9b2b8b5c5cc1b01a8c58Chris Lattner /// fewer operand than it started with. 5093c8cbe6567c94fdd24ec9b2b8b5c5cc1b01a8c58Chris Lattner /// 51062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner void RemoveOperand(unsigned i); 51162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 512c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman /// addMemOperand - Add a MachineMemOperand to the machine instruction. 513c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman /// This function should be used only occasionally. The setMemRefs function 514c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman /// is the primary method for setting up a MachineInstr's MemRefs list. 515c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman void addMemOperand(MachineFunction &MF, MachineMemOperand *MO); 5168e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman 517c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman /// setMemRefs - Assign this MachineInstr's memory reference descriptor 518c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman /// list. This does not transfer ownership. 519c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman void setMemRefs(mmo_iterator NewMemRefs, mmo_iterator NewMemRefsEnd) { 520c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman MemRefs = NewMemRefs; 521c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman MemRefsEnd = NewMemRefsEnd; 522c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman } 52369de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman 524943b5e117fe9a087f9aa529a2632c2d32cc22374Chris Lattnerprivate: 52562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// getRegInfo - If this instruction is embedded into a MachineFunction, 52662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// return the MachineRegisterInfo object for the current function, otherwise 52762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// return null. 52862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner MachineRegisterInfo *getRegInfo(); 529d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng 530d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng /// addImplicitDefUseOperands - Add all implicit def and use operands to 531d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng /// this instruction. 53267f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng void addImplicitDefUseOperands(); 533108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach 53462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// RemoveRegOperandsFromUseLists - Unlink all of the register operands in 53562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// this instruction from their respective use lists. This requires that the 53662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// operands already be on their use lists. 53762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner void RemoveRegOperandsFromUseLists(); 538108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach 53962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// AddRegOperandsToUseLists - Add all of the register operands in 54062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// this instruction from their respective use lists. This requires that the 54162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// operands not be on their use lists yet. 54262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner void AddRegOperandsToUseLists(MachineRegisterInfo &RegInfo); 543a995e6086deca9cbd9aab9d6e1e94b36964b66daVikram S. Adve}; 54423ee550765232e22d0daf6407141ecef4c55c06fVikram S. Adve 54505bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng/// MachineInstrExpressionTrait - Special DenseMapInfo traits to compare 54605bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng/// MachineInstr* by *value* of the instruction rather than by pointer value. 54705bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng/// The hashing and equality testing functions ignore definitions so this is 54805bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng/// useful for CSE, etc. 54905bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Chengstruct MachineInstrExpressionTrait : DenseMapInfo<MachineInstr*> { 55005bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng static inline MachineInstr *getEmptyKey() { 55105bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng return 0; 55205bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng } 55305bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng 55405bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng static inline MachineInstr *getTombstoneKey() { 55505bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng return reinterpret_cast<MachineInstr*>(-1); 55605bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng } 55705bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng 55867eaa08f2b71aa8aec8cdf4c7d970db4cad58adaEvan Cheng static unsigned getHashValue(const MachineInstr* const &MI); 55905bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng 56005bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng static bool isEqual(const MachineInstr* const &LHS, 56105bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng const MachineInstr* const &RHS) { 56205bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng if (RHS == getEmptyKey() || RHS == getTombstoneKey() || 56305bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng LHS == getEmptyKey() || LHS == getTombstoneKey()) 56405bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng return LHS == RHS; 56505bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng return LHS->isIdenticalTo(RHS, MachineInstr::IgnoreVRegDefs); 56605bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng } 56705bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng}; 56805bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng 569b05497e0ca1ba2e7f57b792cc160e5d1c8579582Chris Lattner//===----------------------------------------------------------------------===// 570593da4acc56d4c591ad688e6605b04d0825c867eVikram S. Adve// Debugging Support 571593da4acc56d4c591ad688e6605b04d0825c867eVikram S. Adve 572cb3718832375a581c5ea23f15918f3ea447a446cOwen Andersoninline raw_ostream& operator<<(raw_ostream &OS, const MachineInstr &MI) { 573cb3718832375a581c5ea23f15918f3ea447a446cOwen Anderson MI.print(OS); 574cb3718832375a581c5ea23f15918f3ea447a446cOwen Anderson return OS; 575cb3718832375a581c5ea23f15918f3ea447a446cOwen Anderson} 576cb3718832375a581c5ea23f15918f3ea447a446cOwen Anderson 577d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke} // End llvm namespace 578d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke 57923ee550765232e22d0daf6407141ecef4c55c06fVikram S. Adve#endif 580