MachineInstr.h revision ddfd1377d2e4154d44dc3ad217735adc15af2e3f
148486893f46d2e12e926682a3ecb908716bc66c4Chris Lattner//===-- llvm/CodeGen/MachineInstr.h - MachineInstr class --------*- C++ -*-===// 2ea61c358720aa6c7a159d51658b34276316aa841Misha Brukman// 36fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// The LLVM Compiler Infrastructure 46fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// 57ed47a13356daed2a34cd2209a31f92552e3bdd8Chris Lattner// This file is distributed under the University of Illinois Open Source 67ed47a13356daed2a34cd2209a31f92552e3bdd8Chris Lattner// License. See LICENSE.TXT for details. 7ea61c358720aa6c7a159d51658b34276316aa841Misha Brukman// 86fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell//===----------------------------------------------------------------------===// 9a730c864227b287cdfad5f5f3d5d0808c9f422bbChris Lattner// 10a730c864227b287cdfad5f5f3d5d0808c9f422bbChris Lattner// This file contains the declaration of the MachineInstr class, which is the 11ef6a6a69ff1e1b709d0acb315b9f6c926c67a778Misha Brukman// basic representation for all target dependent machine instructions used by 12a730c864227b287cdfad5f5f3d5d0808c9f422bbChris Lattner// the back end. 13a730c864227b287cdfad5f5f3d5d0808c9f422bbChris Lattner// 14a730c864227b287cdfad5f5f3d5d0808c9f422bbChris Lattner//===----------------------------------------------------------------------===// 1523ee550765232e22d0daf6407141ecef4c55c06fVikram S. Adve 1623ee550765232e22d0daf6407141ecef4c55c06fVikram S. Adve#ifndef LLVM_CODEGEN_MACHINEINSTR_H 1723ee550765232e22d0daf6407141ecef4c55c06fVikram S. Adve#define LLVM_CODEGEN_MACHINEINSTR_H 1823ee550765232e22d0daf6407141ecef4c55c06fVikram S. Adve 19103a64318bb716d68a4248996466900411d789beChris Lattner#include "llvm/CodeGen/MachineOperand.h" 20e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng#include "llvm/MC/MCInstrDesc.h" 21518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner#include "llvm/Target/TargetOpcodes.h" 2284e679beea11ac55ed7871eec4deaccdf393de3eChris Lattner#include "llvm/ADT/ilist.h" 2384e679beea11ac55ed7871eec4deaccdf393de3eChris Lattner#include "llvm/ADT/ilist_node.h" 2484e679beea11ac55ed7871eec4deaccdf393de3eChris Lattner#include "llvm/ADT/STLExtras.h" 25d519de082766bb71e13f6a516b305ff841c6b48cJakob Stoklund Olesen#include "llvm/ADT/StringRef.h" 2684e679beea11ac55ed7871eec4deaccdf393de3eChris Lattner#include "llvm/ADT/DenseMapInfo.h" 271e86a66b00b94adc4ad6977ef6b47c516ac62cecDevang Patel#include "llvm/Support/DebugLoc.h" 281baa88e3de8947b02d9ef4caa73e5860f048ec6eDan Gohman#include <vector> 29be583b914d8156b99d3da264d5adca37fee8dbc9John Criswell 30d0fde30ce850b78371fd1386338350591f9ff494Brian Gaekenamespace llvm { 31d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke 3218b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesentemplate <typename T> class SmallVectorImpl; 33e33f44cfc547359bc28526e4c5e1852b600b4448Dan Gohmanclass AliasAnalysis; 34b27087f5aa574f875598f4a309b7dd687c64a455Evan Chengclass TargetInstrInfo; 35f5916976e9057177100badee7b7388bd7ba76ac3Jakob Stoklund Olesenclass TargetRegisterClass; 366f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohmanclass TargetRegisterInfo; 378e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohmanclass MachineFunction; 38c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohmanclass MachineMemOperand; 39c0b9dc5be79f009d260edb5cd5e1d8346587aaa2Alkis Evlogimenos 40b05497e0ca1ba2e7f57b792cc160e5d1c8579582Chris Lattner//===----------------------------------------------------------------------===// 418b915b4ed2c6e43413937ac71c0cbcf476ad1a98Chris Lattner/// MachineInstr - Representation of each machine instruction. 428b915b4ed2c6e43413937ac71c0cbcf476ad1a98Chris Lattner/// 43fed90b6d097d50881afb45e4d79f430db66dd741Dan Gohmanclass MachineInstr : public ilist_node<MachineInstr> { 44c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohmanpublic: 45c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman typedef MachineMemOperand **mmo_iterator; 46c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman 4745282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner /// Flags to specify different kinds of comments to output in 4845282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner /// assembly code. These flags carry semantic information not 4945282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner /// otherwise easily derivable from the IR text. 5045282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner /// 5145282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner enum CommentFlag { 5245282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner ReloadReuse = 0x1 5345282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner }; 546dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov 556dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov enum MIFlag { 567c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng NoFlags = 0, 577c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng FrameSetup = 1 << 0, // Instruction is used as a part of 586dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov // function frame setup code. 597c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng InsideBundle = 1 << 1 // Instruction is inside a bundle (not 607c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng // the first MI in a bundle) 616dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov }; 62c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohmanprivate: 63e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng const MCInstrDesc *MCID; // Instruction descriptor. 649a00279988612d0f960fb8d43e4ccfcab89e0e14Evan Cheng 656dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov uint8_t Flags; // Various bits of additional 666dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov // information about machine 676dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov // instruction. 686dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov 696647b59c9263eb1decd7f7ff353c0c99ec09ae6cAnton Korobeynikov uint8_t AsmPrinterFlags; // Various bits of information used by 701251443929a256c833717e1030c368d3b6e4cb7cDavid Greene // the AsmPrinter to emit helpful 711251443929a256c833717e1030c368d3b6e4cb7cDavid Greene // comments. This is *not* semantic 721251443929a256c833717e1030c368d3b6e4cb7cDavid Greene // information. Do not use this for 731251443929a256c833717e1030c368d3b6e4cb7cDavid Greene // anything other than to convey comment 741251443929a256c833717e1030c368d3b6e4cb7cDavid Greene // information to AsmPrinter. 751251443929a256c833717e1030c368d3b6e4cb7cDavid Greene 76943b5e117fe9a087f9aa529a2632c2d32cc22374Chris Lattner std::vector<MachineOperand> Operands; // the operands 77c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman mmo_iterator MemRefs; // information on memory references 78c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman mmo_iterator MemRefsEnd; 79f20c1a497fe3922ac718429d65a5fe396890575eChris Lattner MachineBasicBlock *Parent; // Pointer to the owning basic block. 8006efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen DebugLoc debugLoc; // Source line information. 81c54839573cd9ffa6af33dc5190cc40d498534585Brian Gaeke 828e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman MachineInstr(const MachineInstr&); // DO NOT IMPLEMENT 839452b0797a80001920576d7e2ef4af05242cba69Chris Lattner void operator=(const MachineInstr&); // DO NOT IMPLEMENT 84c0b9dc5be79f009d260edb5cd5e1d8346587aaa2Alkis Evlogimenos 85c0b9dc5be79f009d260edb5cd5e1d8346587aaa2Alkis Evlogimenos // Intrusive list support 86fed90b6d097d50881afb45e4d79f430db66dd741Dan Gohman friend struct ilist_traits<MachineInstr>; 87fed90b6d097d50881afb45e4d79f430db66dd741Dan Gohman friend struct ilist_traits<MachineBasicBlock>; 88f20c1a497fe3922ac718429d65a5fe396890575eChris Lattner void setParent(MachineBasicBlock *P) { Parent = P; } 898e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman 908e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman /// MachineInstr ctor - This constructor creates a copy of the given 918e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman /// MachineInstr in the given MachineFunction. 928e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman MachineInstr(MachineFunction &, const MachineInstr &); 938e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman 94c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan Cheng /// MachineInstr ctor - This constructor creates a dummy MachineInstr with 95e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng /// MCID NULL and no operands. 96c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan Cheng MachineInstr(); 97e8b57ef2603ed522083dc18e559ca4e20abf22aeVikram S. Adve 9806efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen // The next two constructors have DebugLoc and non-DebugLoc versions; 9906efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen // over time, the non-DebugLoc versions should be phased out and eventually 10006efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen // removed. 10106efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen 102666f8cb9b7486a45f59fd9ba3202e4b67dbad58cBob Wilson /// MachineInstr ctor - This constructor creates a MachineInstr and adds the 103666f8cb9b7486a45f59fd9ba3202e4b67dbad58cBob Wilson /// implicit operands. It reserves space for the number of operands specified 104e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng /// by the MCInstrDesc. The version with a DebugLoc should be preferred. 105e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng explicit MachineInstr(const MCInstrDesc &MCID, bool NoImp = false); 106d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng 1077db458fb0768059f050d3a0f1a26818fa8e22712Chris Lattner /// MachineInstr ctor - Work exactly the same as the ctor above, except that 1087db458fb0768059f050d3a0f1a26818fa8e22712Chris Lattner /// the MachineInstr is created and added to the end of the specified basic 10906efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen /// block. The version with a DebugLoc should be preferred. 110e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng MachineInstr(MachineBasicBlock *MBB, const MCInstrDesc &MCID); 111ea61c358720aa6c7a159d51658b34276316aa841Misha Brukman 11206efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen /// MachineInstr ctor - This constructor create a MachineInstr and add the 11306efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen /// implicit operands. It reserves space for number of operands specified by 114e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng /// MCInstrDesc. An explicit DebugLoc is supplied. 115e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng explicit MachineInstr(const MCInstrDesc &MCID, const DebugLoc dl, 11606efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen bool NoImp = false); 11706efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen 11806efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen /// MachineInstr ctor - Work exactly the same as the ctor above, except that 11906efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen /// the MachineInstr is created and added to the end of the specified basic 12006efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen /// block. 121108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach MachineInstr(MachineBasicBlock *MBB, const DebugLoc dl, 122e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng const MCInstrDesc &MCID); 12306efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen 124aad5c0505183a5b7913f1a443a1f0650122551ccAlkis Evlogimenos ~MachineInstr(); 125aad5c0505183a5b7913f1a443a1f0650122551ccAlkis Evlogimenos 1268e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman // MachineInstrs are pool-allocated and owned by MachineFunction. 1278e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman friend class MachineFunction; 1288e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman 1298e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohmanpublic: 130f20c1a497fe3922ac718429d65a5fe396890575eChris Lattner const MachineBasicBlock* getParent() const { return Parent; } 131f20c1a497fe3922ac718429d65a5fe396890575eChris Lattner MachineBasicBlock* getParent() { return Parent; } 13206efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen 1331251443929a256c833717e1030c368d3b6e4cb7cDavid Greene /// getAsmPrinterFlags - Return the asm printer flags bitvector. 1341251443929a256c833717e1030c368d3b6e4cb7cDavid Greene /// 1356647b59c9263eb1decd7f7ff353c0c99ec09ae6cAnton Korobeynikov uint8_t getAsmPrinterFlags() const { return AsmPrinterFlags; } 1361251443929a256c833717e1030c368d3b6e4cb7cDavid Greene 137cbd323ad5259dc2bd3428a4ac26718b10adcd3cfChris Lattner /// clearAsmPrinterFlags - clear the AsmPrinter bitvector 138cbd323ad5259dc2bd3428a4ac26718b10adcd3cfChris Lattner /// 139cbd323ad5259dc2bd3428a4ac26718b10adcd3cfChris Lattner void clearAsmPrinterFlags() { AsmPrinterFlags = 0; } 140108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach 1411251443929a256c833717e1030c368d3b6e4cb7cDavid Greene /// getAsmPrinterFlag - Return whether an AsmPrinter flag is set. 1421251443929a256c833717e1030c368d3b6e4cb7cDavid Greene /// 14345282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner bool getAsmPrinterFlag(CommentFlag Flag) const { 1441251443929a256c833717e1030c368d3b6e4cb7cDavid Greene return AsmPrinterFlags & Flag; 1451251443929a256c833717e1030c368d3b6e4cb7cDavid Greene } 1461251443929a256c833717e1030c368d3b6e4cb7cDavid Greene 1471251443929a256c833717e1030c368d3b6e4cb7cDavid Greene /// setAsmPrinterFlag - Set a flag for the AsmPrinter. 1481251443929a256c833717e1030c368d3b6e4cb7cDavid Greene /// 14945282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner void setAsmPrinterFlag(CommentFlag Flag) { 1506dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov AsmPrinterFlags |= (uint8_t)Flag; 1516dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov } 1526dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov 1537c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// clearAsmPrinterFlag - clear specific AsmPrinter flags 1547c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// 1557c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng void clearAsmPrinterFlag(CommentFlag Flag) { 1567c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng AsmPrinterFlags &= ~Flag; 1577c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng } 1587c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng 1596dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov /// getFlags - Return the MI flags bitvector. 1606dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov uint8_t getFlags() const { 1616dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov return Flags; 1626dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov } 1636dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov 1646dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov /// getFlag - Return whether an MI flag is set. 1656dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov bool getFlag(MIFlag Flag) const { 1666dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov return Flags & Flag; 1676dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov } 1686dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov 1696dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov /// setFlag - Set a MI flag. 1706dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov void setFlag(MIFlag Flag) { 1716dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov Flags |= (uint8_t)Flag; 1726dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov } 1736dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov 1746dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov void setFlags(unsigned flags) { 1756dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov Flags = flags; 1761251443929a256c833717e1030c368d3b6e4cb7cDavid Greene } 177108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach 178ddfd1377d2e4154d44dc3ad217735adc15af2e3fEvan Cheng /// clearFlag - Clear a MI flag. 179ddfd1377d2e4154d44dc3ad217735adc15af2e3fEvan Cheng void clearFlag(MIFlag Flag) { 180ddfd1377d2e4154d44dc3ad217735adc15af2e3fEvan Cheng Flags &= ~((uint8_t)Flag); 181ddfd1377d2e4154d44dc3ad217735adc15af2e3fEvan Cheng } 182ddfd1377d2e4154d44dc3ad217735adc15af2e3fEvan Cheng 1837c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// isInsideBundle - Return true if MI is in a bundle (but not the first MI 1847c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// in a bundle). 185cbd323ad5259dc2bd3428a4ac26718b10adcd3cfChris Lattner /// 1867c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// A bundle looks like this before it's finalized: 1877c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// ---------------- 1887c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// | MI | 1897c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// ---------------- 1907c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// | 1917c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// ---------------- 1927c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// | MI * | 1937c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// ---------------- 1947c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// | 1957c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// ---------------- 1967c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// | MI * | 1977c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// ---------------- 1987c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// In this case, the first MI starts a bundle but is not inside a bundle, the 1997c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// next 2 MIs are considered "inside" the bundle. 2007c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// 2017c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// After a bundle is finalized, it looks like this: 2027c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// ---------------- 2037c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// | Bundle | 2047c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// ---------------- 2057c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// | 2067c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// ---------------- 2077c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// | MI * | 2087c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// ---------------- 2097c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// | 2107c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// ---------------- 2117c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// | MI * | 2127c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// ---------------- 2137c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// | 2147c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// ---------------- 2157c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// | MI * | 2167c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// ---------------- 2177c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// The first instruction has the special opcode "BUNDLE". It's not "inside" 2187c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// a bundle, but the next three MIs are. 2197c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng bool isInsideBundle() const { 2207c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng return getFlag(InsideBundle); 221cbd323ad5259dc2bd3428a4ac26718b10adcd3cfChris Lattner } 2221251443929a256c833717e1030c368d3b6e4cb7cDavid Greene 223ddfd1377d2e4154d44dc3ad217735adc15af2e3fEvan Cheng /// setIsInsideBundle - Set InsideBundle bit. 224ddfd1377d2e4154d44dc3ad217735adc15af2e3fEvan Cheng /// 225ddfd1377d2e4154d44dc3ad217735adc15af2e3fEvan Cheng void setIsInsideBundle(bool Val = true) { 226ddfd1377d2e4154d44dc3ad217735adc15af2e3fEvan Cheng if (Val) 227ddfd1377d2e4154d44dc3ad217735adc15af2e3fEvan Cheng setFlag(InsideBundle); 228ddfd1377d2e4154d44dc3ad217735adc15af2e3fEvan Cheng else 229ddfd1377d2e4154d44dc3ad217735adc15af2e3fEvan Cheng clearFlag(InsideBundle); 230ddfd1377d2e4154d44dc3ad217735adc15af2e3fEvan Cheng } 231ddfd1377d2e4154d44dc3ad217735adc15af2e3fEvan Cheng 23206efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen /// getDebugLoc - Returns the debug location id of this MachineInstr. 23306efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen /// 234d5fb7906130989a579d1bfe4490b414331e94feeChris Lattner DebugLoc getDebugLoc() const { return debugLoc; } 2356dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov 236d519de082766bb71e13f6a516b305ff841c6b48cJakob Stoklund Olesen /// emitError - Emit an error referring to the source location of this 237d519de082766bb71e13f6a516b305ff841c6b48cJakob Stoklund Olesen /// instruction. This should only be used for inline assembly that is somehow 238d519de082766bb71e13f6a516b305ff841c6b48cJakob Stoklund Olesen /// impossible to compile. Other errors should have been handled much 239d519de082766bb71e13f6a516b305ff841c6b48cJakob Stoklund Olesen /// earlier. 240d519de082766bb71e13f6a516b305ff841c6b48cJakob Stoklund Olesen /// 241d519de082766bb71e13f6a516b305ff841c6b48cJakob Stoklund Olesen /// If this method returns, the caller should try to recover from the error. 242d519de082766bb71e13f6a516b305ff841c6b48cJakob Stoklund Olesen /// 243d519de082766bb71e13f6a516b305ff841c6b48cJakob Stoklund Olesen void emitError(StringRef Msg) const; 244d519de082766bb71e13f6a516b305ff841c6b48cJakob Stoklund Olesen 24569244300b8a0112efb44b6273ecea4ca6264b8cfChris Lattner /// getDesc - Returns the target instruction descriptor of this 24667f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng /// MachineInstr. 247e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng const MCInstrDesc &getDesc() const { return *MCID; } 248ab8672c8bb83e722b856eac67863542ea7e0cbb2Alkis Evlogimenos 249c54839573cd9ffa6af33dc5190cc40d498534585Brian Gaeke /// getOpcode - Returns the opcode of this MachineInstr. 250cd0b3a90aa34bd42d75d8d86f74ca4972145781dBrian Gaeke /// 251e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng int getOpcode() const { return MCID->Opcode; } 2529f495b54fa94dba4e0be59ba9736c7cf18d996d9Vikram S. Adve 253cd0b3a90aa34bd42d75d8d86f74ca4972145781dBrian Gaeke /// Access to explicit operands of the instruction. 254cd0b3a90aa34bd42d75d8d86f74ca4972145781dBrian Gaeke /// 25534cd4a484e532cc463fd5a4bf59b88d13c5467c1Evan Cheng unsigned getNumOperands() const { return (unsigned)Operands.size(); } 256ea61c358720aa6c7a159d51658b34276316aa841Misha Brukman 257572f5c8c0cf66cd6f53dda255cd8c4d8f27d8505Chris Lattner const MachineOperand& getOperand(unsigned i) const { 258a2bae305fb5a870c4ef753ed290a7ddea73ec82bVikram S. Adve assert(i < getNumOperands() && "getOperand() out of range!"); 259943b5e117fe9a087f9aa529a2632c2d32cc22374Chris Lattner return Operands[i]; 260572f5c8c0cf66cd6f53dda255cd8c4d8f27d8505Chris Lattner } 261572f5c8c0cf66cd6f53dda255cd8c4d8f27d8505Chris Lattner MachineOperand& getOperand(unsigned i) { 262a2bae305fb5a870c4ef753ed290a7ddea73ec82bVikram S. Adve assert(i < getNumOperands() && "getOperand() out of range!"); 263943b5e117fe9a087f9aa529a2632c2d32cc22374Chris Lattner return Operands[i]; 264572f5c8c0cf66cd6f53dda255cd8c4d8f27d8505Chris Lattner } 2656d6c3f86186333037f2fd3fb001e8b2998c080d9Chris Lattner 26619e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng /// getNumExplicitOperands - Returns the number of non-implicit operands. 26719e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng /// 26819e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng unsigned getNumExplicitOperands() const; 269ccb5c677c66aea0a86878de69d5346ef802a6505Chris Lattner 270ccb5c677c66aea0a86878de69d5346ef802a6505Chris Lattner /// iterator/begin/end - Iterate over all operands of a machine instruction. 271ccb5c677c66aea0a86878de69d5346ef802a6505Chris Lattner typedef std::vector<MachineOperand>::iterator mop_iterator; 272ccb5c677c66aea0a86878de69d5346ef802a6505Chris Lattner typedef std::vector<MachineOperand>::const_iterator const_mop_iterator; 273ccb5c677c66aea0a86878de69d5346ef802a6505Chris Lattner 274ccb5c677c66aea0a86878de69d5346ef802a6505Chris Lattner mop_iterator operands_begin() { return Operands.begin(); } 275ccb5c677c66aea0a86878de69d5346ef802a6505Chris Lattner mop_iterator operands_end() { return Operands.end(); } 276ccb5c677c66aea0a86878de69d5346ef802a6505Chris Lattner 277ccb5c677c66aea0a86878de69d5346ef802a6505Chris Lattner const_mop_iterator operands_begin() const { return Operands.begin(); } 278ccb5c677c66aea0a86878de69d5346ef802a6505Chris Lattner const_mop_iterator operands_end() const { return Operands.end(); } 279ccb5c677c66aea0a86878de69d5346ef802a6505Chris Lattner 28069de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman /// Access to memory operands of the instruction 281c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman mmo_iterator memoperands_begin() const { return MemRefs; } 282c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman mmo_iterator memoperands_end() const { return MemRefsEnd; } 283c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman bool memoperands_empty() const { return MemRefsEnd == MemRefs; } 28469de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman 285cddc11e7570893233af8e84dfb8e7f0f9ab0090dDan Gohman /// hasOneMemOperand - Return true if this instruction has exactly one 286cddc11e7570893233af8e84dfb8e7f0f9ab0090dDan Gohman /// MachineMemOperand. 287cddc11e7570893233af8e84dfb8e7f0f9ab0090dDan Gohman bool hasOneMemOperand() const { 288c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman return MemRefsEnd - MemRefs == 1; 289cddc11e7570893233af8e84dfb8e7f0f9ab0090dDan Gohman } 290cddc11e7570893233af8e84dfb8e7f0f9ab0090dDan Gohman 2915a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// API for querying MachineInstr properties. They are the same as MCInstrDesc 2925a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// queries but they are bundle aware. 2935a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 29443d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng enum QueryType { 29543d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng IgnoreBundle, // Ignore bundles 29643d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng AnyInBundle, // Return true if any instruction in bundle has property 29743d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng AllInBundle // Return true if all instructions in bundle have property 29843d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng }; 29943d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng 3005a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// hasProperty - Return true if the instruction (or in the case of a bundle, 3015a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// the instructions inside the bundle) has the specified property. 3025a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// The first argument is the property being queried. 3035a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// The second argument indicates whether the query should look inside 3045a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// instruction bundles. 3055a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// If the third argument is true, than the query can return true when *any* 3065a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// of the bundled instructions has the queried property. If it's false, then 3075a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// this can return true iff *all* of the instructions have the property. 30843d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool hasProperty(unsigned Flag, QueryType Type = AnyInBundle) const; 3095a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 3105a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// isVariadic - Return true if this instruction can have a variable number of 3115a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// operands. In this case, the variable operands will be after the normal 3125a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// operands but before the implicit definitions and uses (if any are 3135a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// present). 31443d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isVariadic(QueryType Type = IgnoreBundle) const { 31543d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::Variadic, Type); 3165a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 3175a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 3185a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// hasOptionalDef - Set if this instruction has an optional definition, e.g. 3195a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// ARM instructions which can set condition code if 's' bit is set. 32043d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool hasOptionalDef(QueryType Type = IgnoreBundle) const { 32143d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::HasOptionalDef, Type); 3225a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 3235a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 3245a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// isPseudo - Return true if this is a pseudo instruction that doesn't 3255a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// correspond to a real machine instruction. 3267c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// 32743d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isPseudo(QueryType Type = IgnoreBundle) const { 32843d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::Pseudo, Type); 3295a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 3305a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 33143d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isReturn(QueryType Type = AnyInBundle) const { 33243d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::Return, Type); 3335a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 3345a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 33543d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isCall(QueryType Type = AnyInBundle) const { 33643d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::Call, Type); 3375a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 3385a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 3395a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// isBarrier - Returns true if the specified instruction stops control flow 3405a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// from executing the instruction immediately following it. Examples include 3415a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// unconditional branches and return instructions. 34243d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isBarrier(QueryType Type = AnyInBundle) const { 34343d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::Barrier, Type); 3445a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 3457c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng 3465a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// isTerminator - Returns true if this instruction part of the terminator for 3475a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// a basic block. Typically this is things like return and branch 3485a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// instructions. 3495a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// 3505a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// Various passes use this to insert code into the bottom of a basic block, 3515a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// but before control flow occurs. 35243d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isTerminator(QueryType Type = AnyInBundle) const { 35343d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::Terminator, Type); 3547c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng } 3557c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng 3565a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// isBranch - Returns true if this is a conditional, unconditional, or 3575a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// indirect branch. Predicates below can be used to discriminate between 3585a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// these cases, and the TargetInstrInfo::AnalyzeBranch method can be used to 3595a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// get more information. 36043d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isBranch(QueryType Type = AnyInBundle) const { 36143d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::Branch, Type); 3625a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 3635a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 3645a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// isIndirectBranch - Return true if this is an indirect branch, such as a 3655a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// branch through a register. 36643d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isIndirectBranch(QueryType Type = AnyInBundle) const { 36743d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::IndirectBranch, Type); 3685a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 3695a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 3705a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// isConditionalBranch - Return true if this is a branch which may fall 3715a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// through to the next instruction or may transfer control flow to some other 3725a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// block. The TargetInstrInfo::AnalyzeBranch method can be used to get more 3735a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// information about this branch. 37443d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isConditionalBranch(QueryType Type = AnyInBundle) const { 37543d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return isBranch(Type) & !isBarrier(Type) & !isIndirectBranch(Type); 3765a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 3775a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 3785a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// isUnconditionalBranch - Return true if this is a branch which always 3795a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// transfers control flow to some other block. The 3805a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// TargetInstrInfo::AnalyzeBranch method can be used to get more information 3815a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// about this branch. 38243d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isUnconditionalBranch(QueryType Type = AnyInBundle) const { 38343d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return isBranch(Type) & isBarrier(Type) & !isIndirectBranch(Type); 3845a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 3855a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 3865a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng // isPredicable - Return true if this instruction has a predicate operand that 3875a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng // controls execution. It may be set to 'always', or may be set to other 3885a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// values. There are various methods in TargetInstrInfo that can be used to 3895a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// control and modify the predicate in this instruction. 39043d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isPredicable(QueryType Type = AllInBundle) const { 3915a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng // If it's a bundle than all bundled instructions must be predicable for this 3925a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng // to return true. 39343d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::Predicable, Type); 3945a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 3955a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 3965a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// isCompare - Return true if this instruction is a comparison. 39743d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isCompare(QueryType Type = IgnoreBundle) const { 39843d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::Compare, Type); 3995a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 4005a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 4015a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// isMoveImmediate - Return true if this instruction is a move immediate 4025a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// (including conditional moves) instruction. 40343d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isMoveImmediate(QueryType Type = IgnoreBundle) const { 40443d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::MoveImm, Type); 4055a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 4065a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 4075a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// isBitcast - Return true if this instruction is a bitcast instruction. 4085a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// 40943d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isBitcast(QueryType Type = IgnoreBundle) const { 41043d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::Bitcast, Type); 4115a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 4125a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 4135a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// isNotDuplicable - Return true if this instruction cannot be safely 4145a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// duplicated. For example, if the instruction has a unique labels attached 4155a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// to it, duplicating it would cause multiple definition errors. 41643d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isNotDuplicable(QueryType Type = AnyInBundle) const { 41743d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::NotDuplicable, Type); 4185a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 4195a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 4205a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// hasDelaySlot - Returns true if the specified instruction has a delay slot 4215a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// which must be filled by the code generator. 42243d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool hasDelaySlot(QueryType Type = AnyInBundle) const { 42343d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::DelaySlot, Type); 4245a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 4255a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 4265a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// canFoldAsLoad - Return true for instructions that can be folded as 4275a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// memory operands in other instructions. The most common use for this 4285a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// is instructions that are simple loads from memory that don't modify 4295a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// the loaded value in any way, but it can also be used for instructions 4305a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// that can be expressed as constant-pool loads, such as V_SETALLONES 4315a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// on x86, to allow them to be folded when it is beneficial. 4325a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// This should only be set on instructions that return a value in their 4335a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// only virtual register definition. 43443d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool canFoldAsLoad(QueryType Type = IgnoreBundle) const { 43543d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::FoldableAsLoad, Type); 4365a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 4375a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 4385a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng //===--------------------------------------------------------------------===// 4395a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng // Side Effect Analysis 4405a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng //===--------------------------------------------------------------------===// 4415a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 4425a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// mayLoad - Return true if this instruction could possibly read memory. 4435a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// Instructions with this flag set are not necessarily simple load 4445a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// instructions, they may load a value and modify it, for example. 44543d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool mayLoad(QueryType Type = AnyInBundle) const { 44643d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::MayLoad, Type); 4475a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 4485a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 4495a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 4505a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// mayStore - Return true if this instruction could possibly modify memory. 4515a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// Instructions with this flag set are not necessarily simple store 4525a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// instructions, they may store a modified value based on their operands, or 4535a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// may not actually modify anything, for example. 45443d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool mayStore(QueryType Type = AnyInBundle) const { 45543d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::MayStore, Type); 4565a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 4575a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 4585a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng //===--------------------------------------------------------------------===// 4595a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng // Flags that indicate whether an instruction can be modified by a method. 4605a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng //===--------------------------------------------------------------------===// 4615a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 4625a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// isCommutable - Return true if this may be a 2- or 3-address 4635a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// instruction (of the form "X = op Y, Z, ..."), which produces the same 4645a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// result if Y and Z are exchanged. If this flag is set, then the 4655a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// TargetInstrInfo::commuteInstruction method may be used to hack on the 4665a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// instruction. 4675a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// 4685a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// Note that this flag may be set on instructions that are only commutable 4695a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// sometimes. In these cases, the call to commuteInstruction will fail. 4705a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// Also note that some instructions require non-trivial modification to 4715a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// commute them. 47243d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isCommutable(QueryType Type = IgnoreBundle) const { 47343d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::Commutable, Type); 4745a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 4755a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 4765a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// isConvertibleTo3Addr - Return true if this is a 2-address instruction 4775a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// which can be changed into a 3-address instruction if needed. Doing this 4785a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// transformation can be profitable in the register allocator, because it 4795a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// means that the instruction can use a 2-address form if possible, but 4805a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// degrade into a less efficient form if the source and dest register cannot 4815a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// be assigned to the same register. For example, this allows the x86 4825a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// backend to turn a "shl reg, 3" instruction into an LEA instruction, which 4835a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// is the same speed as the shift but has bigger code size. 4845a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// 4855a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// If this returns true, then the target must implement the 4865a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// TargetInstrInfo::convertToThreeAddress method for this instruction, which 4875a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// is allowed to fail if the transformation isn't valid for this specific 4885a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// instruction (e.g. shl reg, 4 on x86). 4895a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// 49043d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isConvertibleTo3Addr(QueryType Type = IgnoreBundle) const { 49143d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::ConvertibleTo3Addr, Type); 4925a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 4935a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 4945a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// usesCustomInsertionHook - Return true if this instruction requires 4955a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// custom insertion support when the DAG scheduler is inserting it into a 4965a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// machine basic block. If this is true for the instruction, it basically 4975a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// means that it is a pseudo instruction used at SelectionDAG time that is 4985a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// expanded out into magic code by the target when MachineInstrs are formed. 4995a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// 5005a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// If this is true, the TargetLoweringInfo::InsertAtEndOfBasicBlock method 5015a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// is used to insert this into the MachineBasicBlock. 50243d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool usesCustomInsertionHook(QueryType Type = IgnoreBundle) const { 50343d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::UsesCustomInserter, Type); 5045a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 5055a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 5065a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// hasPostISelHook - Return true if this instruction requires *adjustment* 5075a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// after instruction selection by calling a target hook. For example, this 5085a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// can be used to fill in ARM 's' optional operand depending on whether 5095a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// the conditional flag register is used. 51043d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool hasPostISelHook(QueryType Type = IgnoreBundle) const { 51143d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::HasPostISelHook, Type); 5125a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 5135a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 5145a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// isRematerializable - Returns true if this instruction is a candidate for 5155a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// remat. This flag is deprecated, please don't use it anymore. If this 5165a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// flag is set, the isReallyTriviallyReMaterializable() method is called to 5175a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// verify the instruction is really rematable. 51843d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isRematerializable(QueryType Type = AllInBundle) const { 5195a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng // It's only possible to re-mat a bundle if all bundled instructions are 5205a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng // re-materializable. 52143d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::Rematerializable, Type); 5225a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 5235a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 5245a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// isAsCheapAsAMove - Returns true if this instruction has the same cost (or 5255a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// less) than a move instruction. This is useful during certain types of 5265a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// optimizations (e.g., remat during two-address conversion or machine licm) 5275a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// where we would like to remat or hoist the instruction, but not if it costs 5285a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// more than moving the instruction into the appropriate register. Note, we 5295a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// are not marking copies from and to the same register class with this flag. 53043d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isAsCheapAsAMove(QueryType Type = AllInBundle) const { 5315a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng // Only returns true for a bundle if all bundled instructions are cheap. 5325a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng // FIXME: This probably requires a target hook. 53343d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::CheapAsAMove, Type); 5345a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 5355a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 5365a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// hasExtraSrcRegAllocReq - Returns true if this instruction source operands 5375a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// have special register allocation requirements that are not captured by the 5385a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// operand register classes. e.g. ARM::STRD's two source registers must be an 5395a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// even / odd pair, ARM::STM registers have to be in ascending order. 5405a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// Post-register allocation passes should not attempt to change allocations 5415a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// for sources of instructions with this flag. 54243d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool hasExtraSrcRegAllocReq(QueryType Type = AnyInBundle) const { 54343d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::ExtraSrcRegAllocReq, Type); 5445a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 5455a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 5465a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// hasExtraDefRegAllocReq - Returns true if this instruction def operands 5475a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// have special register allocation requirements that are not captured by the 5485a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// operand register classes. e.g. ARM::LDRD's two def registers must be an 5495a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// even / odd pair, ARM::LDM registers have to be in ascending order. 5505a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// Post-register allocation passes should not attempt to change allocations 5515a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// for definitions of instructions with this flag. 55243d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool hasExtraDefRegAllocReq(QueryType Type = AnyInBundle) const { 55343d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::ExtraDefRegAllocReq, Type); 5545a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 5555a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 5565a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 557506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng enum MICheckType { 558506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng CheckDefs, // Check all operands for equality 559cbc988be22bc9411d95215c8b7251b5f85710674Evan Cheng CheckKillDead, // Check all operands including kill / dead markers 560506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng IgnoreDefs, // Ignore all definitions 561506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng IgnoreVRegDefs // Ignore virtual register definitions 562506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng }; 563506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng 564fcfcb6cb502fd4562b57425a5802dc52f358c451Chris Lattner /// isIdenticalTo - Return true if this instruction is identical to (same 565fcfcb6cb502fd4562b57425a5802dc52f358c451Chris Lattner /// opcode and same operands as) the specified instruction. 566506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng bool isIdenticalTo(const MachineInstr *Other, 567506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng MICheckType Check = CheckDefs) const; 568a2bae305fb5a870c4ef753ed290a7ddea73ec82bVikram S. Adve 5696b560918426182d2b46b899d609911d49f6739f7Chris Lattner /// removeFromParent - This method unlinks 'this' from the containing basic 5706b560918426182d2b46b899d609911d49f6739f7Chris Lattner /// block, and returns it, but does not delete it. 5716b560918426182d2b46b899d609911d49f6739f7Chris Lattner MachineInstr *removeFromParent(); 572108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach 5736b560918426182d2b46b899d609911d49f6739f7Chris Lattner /// eraseFromParent - This method unlinks 'this' from the containing basic 5746b560918426182d2b46b899d609911d49f6739f7Chris Lattner /// block and deletes it. 5758e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman void eraseFromParent(); 576466b534a570f574ed485d875bbca8454f68dcb52Tanya Lattner 5774406604047423576e36657c7ede266ca42e79642Dan Gohman /// isLabel - Returns true if the MachineInstr represents a label. 5784406604047423576e36657c7ede266ca42e79642Dan Gohman /// 579518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isLabel() const { 5807431beaba2a01c3fe299c861b2ec85cbf1dc81c4Bill Wendling return getOpcode() == TargetOpcode::PROLOG_LABEL || 581518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner getOpcode() == TargetOpcode::EH_LABEL || 582518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner getOpcode() == TargetOpcode::GC_LABEL; 583518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner } 584108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach 5857431beaba2a01c3fe299c861b2ec85cbf1dc81c4Bill Wendling bool isPrologLabel() const { 5867431beaba2a01c3fe299c861b2ec85cbf1dc81c4Bill Wendling return getOpcode() == TargetOpcode::PROLOG_LABEL; 5877431beaba2a01c3fe299c861b2ec85cbf1dc81c4Bill Wendling } 588518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isEHLabel() const { return getOpcode() == TargetOpcode::EH_LABEL; } 589518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isGCLabel() const { return getOpcode() == TargetOpcode::GC_LABEL; } 590518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isDebugValue() const { return getOpcode() == TargetOpcode::DBG_VALUE; } 591108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach 592518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isPHI() const { return getOpcode() == TargetOpcode::PHI; } 593518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isKill() const { return getOpcode() == TargetOpcode::KILL; } 594518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isImplicitDef() const { return getOpcode()==TargetOpcode::IMPLICIT_DEF; } 595518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isInlineAsm() const { return getOpcode() == TargetOpcode::INLINEASM; } 596c36b7069b42bece963b7e6adf020353ce990ef76Evan Cheng bool isStackAligningInlineAsm() const; 597518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isInsertSubreg() const { 598518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner return getOpcode() == TargetOpcode::INSERT_SUBREG; 599518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner } 600518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isSubregToReg() const { 601518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner return getOpcode() == TargetOpcode::SUBREG_TO_REG; 602518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner } 6033d720fbc6ad40bc9287a420f824d244965d24631Evan Cheng bool isRegSequence() const { 6043d720fbc6ad40bc9287a420f824d244965d24631Evan Cheng return getOpcode() == TargetOpcode::REG_SEQUENCE; 6053d720fbc6ad40bc9287a420f824d244965d24631Evan Cheng } 606ddfd1377d2e4154d44dc3ad217735adc15af2e3fEvan Cheng bool isBundle() const { 607ddfd1377d2e4154d44dc3ad217735adc15af2e3fEvan Cheng return getOpcode() == TargetOpcode::BUNDLE; 608ddfd1377d2e4154d44dc3ad217735adc15af2e3fEvan Cheng } 609a4e1ba53ddedd08669886b2849926bb33facc198Jakob Stoklund Olesen bool isCopy() const { 610a4e1ba53ddedd08669886b2849926bb33facc198Jakob Stoklund Olesen return getOpcode() == TargetOpcode::COPY; 611a4e1ba53ddedd08669886b2849926bb33facc198Jakob Stoklund Olesen } 612cfe5254cd34d9414d9f6b8aa02dc1239d71a703fRafael Espindola bool isFullCopy() const { 613cfe5254cd34d9414d9f6b8aa02dc1239d71a703fRafael Espindola return isCopy() && !getOperand(0).getSubReg() && !getOperand(1).getSubReg(); 614cfe5254cd34d9414d9f6b8aa02dc1239d71a703fRafael Espindola } 615a4e1ba53ddedd08669886b2849926bb33facc198Jakob Stoklund Olesen 616273f7e42994a5bce0614d04d96dbfdf05fd652e5Jakob Stoklund Olesen /// isCopyLike - Return true if the instruction behaves like a copy. 617273f7e42994a5bce0614d04d96dbfdf05fd652e5Jakob Stoklund Olesen /// This does not include native copy instructions. 618273f7e42994a5bce0614d04d96dbfdf05fd652e5Jakob Stoklund Olesen bool isCopyLike() const { 6190bc25f40402f48ba42fc45403f635b20d90fabb3Jakob Stoklund Olesen return isCopy() || isSubregToReg(); 6200bc25f40402f48ba42fc45403f635b20d90fabb3Jakob Stoklund Olesen } 6210bc25f40402f48ba42fc45403f635b20d90fabb3Jakob Stoklund Olesen 6220bc25f40402f48ba42fc45403f635b20d90fabb3Jakob Stoklund Olesen /// isIdentityCopy - Return true is the instruction is an identity copy. 6230bc25f40402f48ba42fc45403f635b20d90fabb3Jakob Stoklund Olesen bool isIdentityCopy() const { 6240bc25f40402f48ba42fc45403f635b20d90fabb3Jakob Stoklund Olesen return isCopy() && getOperand(0).getReg() == getOperand(1).getReg() && 6250bc25f40402f48ba42fc45403f635b20d90fabb3Jakob Stoklund Olesen getOperand(0).getSubReg() == getOperand(1).getSubReg(); 626273f7e42994a5bce0614d04d96dbfdf05fd652e5Jakob Stoklund Olesen } 627273f7e42994a5bce0614d04d96dbfdf05fd652e5Jakob Stoklund Olesen 628ddfd1377d2e4154d44dc3ad217735adc15af2e3fEvan Cheng /// getBundleSize - Return the number of instructions inside the MI bundle. 629ddfd1377d2e4154d44dc3ad217735adc15af2e3fEvan Cheng unsigned getBundleSize() const; 630ddfd1377d2e4154d44dc3ad217735adc15af2e3fEvan Cheng 6316130f66eaae89f8878590796977678afa8448926Evan Cheng /// readsRegister - Return true if the MachineInstr reads the specified 6326130f66eaae89f8878590796977678afa8448926Evan Cheng /// register. If TargetRegisterInfo is passed, then it also checks if there 6336130f66eaae89f8878590796977678afa8448926Evan Cheng /// is a read of a super-register. 6347ebc4d63db05ac214d36bc01b4d60adadaf923e5Jakob Stoklund Olesen /// This does not count partial redefines of virtual registers as reads: 6357ebc4d63db05ac214d36bc01b4d60adadaf923e5Jakob Stoklund Olesen /// %reg1024:6 = OP. 6366130f66eaae89f8878590796977678afa8448926Evan Cheng bool readsRegister(unsigned Reg, const TargetRegisterInfo *TRI = NULL) const { 6376130f66eaae89f8878590796977678afa8448926Evan Cheng return findRegisterUseOperandIdx(Reg, false, TRI) != -1; 6386130f66eaae89f8878590796977678afa8448926Evan Cheng } 6396130f66eaae89f8878590796977678afa8448926Evan Cheng 6407ebc4d63db05ac214d36bc01b4d60adadaf923e5Jakob Stoklund Olesen /// readsVirtualRegister - Return true if the MachineInstr reads the specified 6417ebc4d63db05ac214d36bc01b4d60adadaf923e5Jakob Stoklund Olesen /// virtual register. Take into account that a partial define is a 6427ebc4d63db05ac214d36bc01b4d60adadaf923e5Jakob Stoklund Olesen /// read-modify-write operation. 64318b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen bool readsVirtualRegister(unsigned Reg) const { 64418b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen return readsWritesVirtualRegister(Reg).first; 64518b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen } 64618b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen 64718b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen /// readsWritesVirtualRegister - Return a pair of bools (reads, writes) 64818b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen /// indicating if this instruction reads or writes Reg. This also considers 64918b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen /// partial defines. 65018b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen /// If Ops is not null, all operand indices for Reg are added. 65118b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen std::pair<bool,bool> readsWritesVirtualRegister(unsigned Reg, 65218b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen SmallVectorImpl<unsigned> *Ops = 0) const; 6537ebc4d63db05ac214d36bc01b4d60adadaf923e5Jakob Stoklund Olesen 6546130f66eaae89f8878590796977678afa8448926Evan Cheng /// killsRegister - Return true if the MachineInstr kills the specified 6556130f66eaae89f8878590796977678afa8448926Evan Cheng /// register. If TargetRegisterInfo is passed, then it also checks if there is 6566130f66eaae89f8878590796977678afa8448926Evan Cheng /// a kill of a super-register. 6576130f66eaae89f8878590796977678afa8448926Evan Cheng bool killsRegister(unsigned Reg, const TargetRegisterInfo *TRI = NULL) const { 6586130f66eaae89f8878590796977678afa8448926Evan Cheng return findRegisterUseOperandIdx(Reg, true, TRI) != -1; 6596130f66eaae89f8878590796977678afa8448926Evan Cheng } 6606130f66eaae89f8878590796977678afa8448926Evan Cheng 6611015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng /// definesRegister - Return true if the MachineInstr fully defines the 6626130f66eaae89f8878590796977678afa8448926Evan Cheng /// specified register. If TargetRegisterInfo is passed, then it also checks 6636130f66eaae89f8878590796977678afa8448926Evan Cheng /// if there is a def of a super-register. 6641015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng /// NOTE: It's ignoring subreg indices on virtual registers. 6651015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng bool definesRegister(unsigned Reg, const TargetRegisterInfo *TRI=NULL) const { 6661015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng return findRegisterDefOperandIdx(Reg, false, false, TRI) != -1; 6671015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng } 6681015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng 6691015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng /// modifiesRegister - Return true if the MachineInstr modifies (fully define 6701015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng /// or partially define) the specified register. 6711015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng /// NOTE: It's ignoring subreg indices on virtual registers. 6721015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng bool modifiesRegister(unsigned Reg, const TargetRegisterInfo *TRI) const { 6731015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng return findRegisterDefOperandIdx(Reg, false, true, TRI) != -1; 6746130f66eaae89f8878590796977678afa8448926Evan Cheng } 6756130f66eaae89f8878590796977678afa8448926Evan Cheng 6766130f66eaae89f8878590796977678afa8448926Evan Cheng /// registerDefIsDead - Returns true if the register is dead in this machine 6776130f66eaae89f8878590796977678afa8448926Evan Cheng /// instruction. If TargetRegisterInfo is passed, then it also checks 6786130f66eaae89f8878590796977678afa8448926Evan Cheng /// if there is a dead def of a super-register. 6796130f66eaae89f8878590796977678afa8448926Evan Cheng bool registerDefIsDead(unsigned Reg, 6806130f66eaae89f8878590796977678afa8448926Evan Cheng const TargetRegisterInfo *TRI = NULL) const { 6811015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng return findRegisterDefOperandIdx(Reg, true, false, TRI) != -1; 6826130f66eaae89f8878590796977678afa8448926Evan Cheng } 6836130f66eaae89f8878590796977678afa8448926Evan Cheng 684faa510726f4b40aa4495e60e4d341c6467e3fb01Evan Cheng /// findRegisterUseOperandIdx() - Returns the operand index that is a use of 68510f9101c4c0df0837414976ad0ef0e86d6771059Jim Grosbach /// the specific register or -1 if it is not found. It further tightens 68676d7e76c15c258ec4a71fd75a2a32bca3a5e5e27Evan Cheng /// the search criteria to a use that kills the register if isKill is true. 6876130f66eaae89f8878590796977678afa8448926Evan Cheng int findRegisterUseOperandIdx(unsigned Reg, bool isKill = false, 6886130f66eaae89f8878590796977678afa8448926Evan Cheng const TargetRegisterInfo *TRI = NULL) const; 6896130f66eaae89f8878590796977678afa8448926Evan Cheng 6906130f66eaae89f8878590796977678afa8448926Evan Cheng /// findRegisterUseOperand - Wrapper for findRegisterUseOperandIdx, it returns 6916130f66eaae89f8878590796977678afa8448926Evan Cheng /// a pointer to the MachineOperand rather than an index. 6929180c8e3cfd12abd21242768db05072a209ca6e7Evan Cheng MachineOperand *findRegisterUseOperand(unsigned Reg, bool isKill = false, 6936130f66eaae89f8878590796977678afa8448926Evan Cheng const TargetRegisterInfo *TRI = NULL) { 6946130f66eaae89f8878590796977678afa8448926Evan Cheng int Idx = findRegisterUseOperandIdx(Reg, isKill, TRI); 6956130f66eaae89f8878590796977678afa8448926Evan Cheng return (Idx == -1) ? NULL : &getOperand(Idx); 6966130f66eaae89f8878590796977678afa8448926Evan Cheng } 697108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach 6986130f66eaae89f8878590796977678afa8448926Evan Cheng /// findRegisterDefOperandIdx() - Returns the operand index that is a def of 699703bfe69092e8da79fbef2fc5ca07b805ad9f753Dan Gohman /// the specified register or -1 if it is not found. If isDead is true, defs 7001015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng /// that are not dead are skipped. If Overlap is true, then it also looks for 7011015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng /// defs that merely overlap the specified register. If TargetRegisterInfo is 7021015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng /// non-null, then it also checks if there is a def of a super-register. 7031015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng int findRegisterDefOperandIdx(unsigned Reg, 7041015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng bool isDead = false, bool Overlap = false, 7056130f66eaae89f8878590796977678afa8448926Evan Cheng const TargetRegisterInfo *TRI = NULL) const; 7066130f66eaae89f8878590796977678afa8448926Evan Cheng 7076130f66eaae89f8878590796977678afa8448926Evan Cheng /// findRegisterDefOperand - Wrapper for findRegisterDefOperandIdx, it returns 7086130f66eaae89f8878590796977678afa8448926Evan Cheng /// a pointer to the MachineOperand rather than an index. 709631bd3cdf39eb099d5d5d279b17b08f119956538Evan Cheng MachineOperand *findRegisterDefOperand(unsigned Reg, bool isDead = false, 7106130f66eaae89f8878590796977678afa8448926Evan Cheng const TargetRegisterInfo *TRI = NULL) { 7111015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng int Idx = findRegisterDefOperandIdx(Reg, isDead, false, TRI); 7126130f66eaae89f8878590796977678afa8448926Evan Cheng return (Idx == -1) ? NULL : &getOperand(Idx); 7136130f66eaae89f8878590796977678afa8448926Evan Cheng } 71419e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng 715f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng /// findFirstPredOperandIdx() - Find the index of the first operand in the 716f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng /// operand list that is used to represent the predicate. It returns -1 if 717f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng /// none is found. 718f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng int findFirstPredOperandIdx() const; 719108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach 7209dfaacb696d1ad850f9f5f49a94fdb81cf8ae018Jakob Stoklund Olesen /// findInlineAsmFlagIdx() - Find the index of the flag word operand that 7219dfaacb696d1ad850f9f5f49a94fdb81cf8ae018Jakob Stoklund Olesen /// corresponds to operand OpIdx on an inline asm instruction. Returns -1 if 7229dfaacb696d1ad850f9f5f49a94fdb81cf8ae018Jakob Stoklund Olesen /// getOperand(OpIdx) does not belong to an inline asm operand group. 7239dfaacb696d1ad850f9f5f49a94fdb81cf8ae018Jakob Stoklund Olesen /// 7249dfaacb696d1ad850f9f5f49a94fdb81cf8ae018Jakob Stoklund Olesen /// If GroupNo is not NULL, it will receive the number of the operand group 7259dfaacb696d1ad850f9f5f49a94fdb81cf8ae018Jakob Stoklund Olesen /// containing OpIdx. 7269dfaacb696d1ad850f9f5f49a94fdb81cf8ae018Jakob Stoklund Olesen /// 7279dfaacb696d1ad850f9f5f49a94fdb81cf8ae018Jakob Stoklund Olesen /// The flag operand is an immediate that can be decoded with methods like 7289dfaacb696d1ad850f9f5f49a94fdb81cf8ae018Jakob Stoklund Olesen /// InlineAsm::hasRegClassConstraint(). 7299dfaacb696d1ad850f9f5f49a94fdb81cf8ae018Jakob Stoklund Olesen /// 7309dfaacb696d1ad850f9f5f49a94fdb81cf8ae018Jakob Stoklund Olesen int findInlineAsmFlagIdx(unsigned OpIdx, unsigned *GroupNo = 0) const; 7319dfaacb696d1ad850f9f5f49a94fdb81cf8ae018Jakob Stoklund Olesen 732f5916976e9057177100badee7b7388bd7ba76ac3Jakob Stoklund Olesen /// getRegClassConstraint - Compute the static register class constraint for 733f5916976e9057177100badee7b7388bd7ba76ac3Jakob Stoklund Olesen /// operand OpIdx. For normal instructions, this is derived from the 734f5916976e9057177100badee7b7388bd7ba76ac3Jakob Stoklund Olesen /// MCInstrDesc. For inline assembly it is derived from the flag words. 735f5916976e9057177100badee7b7388bd7ba76ac3Jakob Stoklund Olesen /// 736f5916976e9057177100badee7b7388bd7ba76ac3Jakob Stoklund Olesen /// Returns NULL if the static register classs constraint cannot be 737f5916976e9057177100badee7b7388bd7ba76ac3Jakob Stoklund Olesen /// determined. 738f5916976e9057177100badee7b7388bd7ba76ac3Jakob Stoklund Olesen /// 739f5916976e9057177100badee7b7388bd7ba76ac3Jakob Stoklund Olesen const TargetRegisterClass* 740f5916976e9057177100badee7b7388bd7ba76ac3Jakob Stoklund Olesen getRegClassConstraint(unsigned OpIdx, 741f5916976e9057177100badee7b7388bd7ba76ac3Jakob Stoklund Olesen const TargetInstrInfo *TII, 742f5916976e9057177100badee7b7388bd7ba76ac3Jakob Stoklund Olesen const TargetRegisterInfo *TRI) const; 743f5916976e9057177100badee7b7388bd7ba76ac3Jakob Stoklund Olesen 744d9df5017040489303acb57bdd8697ef0f8bafc08Bob Wilson /// isRegTiedToUseOperand - Given the index of a register def operand, 745d9df5017040489303acb57bdd8697ef0f8bafc08Bob Wilson /// check if the register def is tied to a source operand, due to either 746d9df5017040489303acb57bdd8697ef0f8bafc08Bob Wilson /// two-address elimination or inline assembly constraints. Returns the 747d9df5017040489303acb57bdd8697ef0f8bafc08Bob Wilson /// first tied use operand index by reference is UseOpIdx is not null. 748ce9be2cf5dc84865f6b819bd3f9be16944426268Jakob Stoklund Olesen bool isRegTiedToUseOperand(unsigned DefOpIdx, unsigned *UseOpIdx = 0) const; 74932dfbeada7292167bb488f36a71a5a6a519ddaffEvan Cheng 750a24752ff43dc1ad8c18c5d9e78549c45f62b980eEvan Cheng /// isRegTiedToDefOperand - Return true if the use operand of the specified 751a24752ff43dc1ad8c18c5d9e78549c45f62b980eEvan Cheng /// index is tied to an def operand. It also returns the def operand index by 752a24752ff43dc1ad8c18c5d9e78549c45f62b980eEvan Cheng /// reference if DefOpIdx is not null. 753ce9be2cf5dc84865f6b819bd3f9be16944426268Jakob Stoklund Olesen bool isRegTiedToDefOperand(unsigned UseOpIdx, unsigned *DefOpIdx = 0) const; 754a24752ff43dc1ad8c18c5d9e78549c45f62b980eEvan Cheng 755e6cd757e6800b9b94a6459ec148c0624c4f2e3c1Dan Gohman /// clearKillInfo - Clears kill flags on all operands. 756e6cd757e6800b9b94a6459ec148c0624c4f2e3c1Dan Gohman /// 757e6cd757e6800b9b94a6459ec148c0624c4f2e3c1Dan Gohman void clearKillInfo(); 758e6cd757e6800b9b94a6459ec148c0624c4f2e3c1Dan Gohman 7599a00279988612d0f960fb8d43e4ccfcab89e0e14Evan Cheng /// copyKillDeadInfo - Copies kill / dead operand properties from MI. 7609a00279988612d0f960fb8d43e4ccfcab89e0e14Evan Cheng /// 761576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng void copyKillDeadInfo(const MachineInstr *MI); 7629a00279988612d0f960fb8d43e4ccfcab89e0e14Evan Cheng 76319e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng /// copyPredicates - Copies predicate operand(s) from MI. 76419e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng void copyPredicates(const MachineInstr *MI); 76519e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng 7669edf7deb37f0f97664f279040fa15d89f32e23d9Jakob Stoklund Olesen /// substituteRegister - Replace all occurrences of FromReg with ToReg:SubIdx, 7679edf7deb37f0f97664f279040fa15d89f32e23d9Jakob Stoklund Olesen /// properly composing subreg indices where necessary. 7689edf7deb37f0f97664f279040fa15d89f32e23d9Jakob Stoklund Olesen void substituteRegister(unsigned FromReg, unsigned ToReg, unsigned SubIdx, 7699edf7deb37f0f97664f279040fa15d89f32e23d9Jakob Stoklund Olesen const TargetRegisterInfo &RegInfo); 7709edf7deb37f0f97664f279040fa15d89f32e23d9Jakob Stoklund Olesen 771b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// addRegisterKilled - We have determined MI kills a register. Look for the 772b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// operand that uses it and mark it as IsKill. If AddIfNotFound is true, 773b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// add a implicit operand if it's not found. Returns true if the operand 774b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// exists / is added. 7756f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman bool addRegisterKilled(unsigned IncomingReg, 7766f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman const TargetRegisterInfo *RegInfo, 777b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson bool AddIfNotFound = false); 7788efadf94b568c08de3ff8ce35fd904a935387406Jakob Stoklund Olesen 779b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// addRegisterDead - We have determined MI defined a register without a use. 780b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// Look for the operand that defines it and mark it as IsDead. If 781b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// AddIfNotFound is true, add a implicit operand if it's not found. Returns 782b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// true if the operand exists / is added. 7836f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman bool addRegisterDead(unsigned IncomingReg, const TargetRegisterInfo *RegInfo, 784b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson bool AddIfNotFound = false); 785b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson 7868efadf94b568c08de3ff8ce35fd904a935387406Jakob Stoklund Olesen /// addRegisterDefined - We have determined MI defines a register. Make sure 7878efadf94b568c08de3ff8ce35fd904a935387406Jakob Stoklund Olesen /// there is an operand defining Reg. 7888efadf94b568c08de3ff8ce35fd904a935387406Jakob Stoklund Olesen void addRegisterDefined(unsigned IncomingReg, 78963e6a488cb6c29983415221719d05fbf99e00193Jakob Stoklund Olesen const TargetRegisterInfo *RegInfo = 0); 7908efadf94b568c08de3ff8ce35fd904a935387406Jakob Stoklund Olesen 7912a09f878ef64f216268df3dbe2f51b949f18c145Jim Grosbach /// setPhysRegsDeadExcept - Mark every physreg used by this instruction as 7922a09f878ef64f216268df3dbe2f51b949f18c145Jim Grosbach /// dead except those in the UsedRegs list. 793db4971259ce94cea26e555e9ade82672a3581f5cDan Gohman void setPhysRegsDeadExcept(const SmallVectorImpl<unsigned> &UsedRegs, 794db4971259ce94cea26e555e9ade82672a3581f5cDan Gohman const TargetRegisterInfo &TRI); 795db4971259ce94cea26e555e9ade82672a3581f5cDan Gohman 7969f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng /// isSafeToMove - Return true if it is safe to move this instruction. If 7979f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng /// SawStore is set to true, it means that there is a store (or call) between 7989f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng /// the instruction's location and its intended destination. 799ac1abde05b7e6956c01deb6557539bee8fea30f4Evan Cheng bool isSafeToMove(const TargetInstrInfo *TII, AliasAnalysis *AA, 800ac1abde05b7e6956c01deb6557539bee8fea30f4Evan Cheng bool &SawStore) const; 801b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng 8023e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman /// isSafeToReMat - Return true if it's safe to rematerialize the specified 8033e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman /// instruction which defined the specified register instead of copying it. 804ac1abde05b7e6956c01deb6557539bee8fea30f4Evan Cheng bool isSafeToReMat(const TargetInstrInfo *TII, AliasAnalysis *AA, 805ac1abde05b7e6956c01deb6557539bee8fea30f4Evan Cheng unsigned DstReg) const; 806df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng 8073e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman /// hasVolatileMemoryRef - Return true if this instruction may have a 8083e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman /// volatile memory reference, or if the information describing the 8093e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman /// memory reference is not available. Return false if it is known to 8103e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman /// have no volatile memory references. 8113e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman bool hasVolatileMemoryRef() const; 8123e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman 813e33f44cfc547359bc28526e4c5e1852b600b4448Dan Gohman /// isInvariantLoad - Return true if this instruction is loading from a 814e33f44cfc547359bc28526e4c5e1852b600b4448Dan Gohman /// location whose value is invariant across the function. For example, 815f451cb870efcf9e0302d25ed05f4cac6bb494e42Dan Gohman /// loading a value from the constant pool or from the argument area of 816e33f44cfc547359bc28526e4c5e1852b600b4448Dan Gohman /// a function if it does not change. This should only return true of *all* 817e33f44cfc547359bc28526e4c5e1852b600b4448Dan Gohman /// loads the instruction does are invariant (if it does multiple loads). 818a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman bool isInvariantLoad(AliasAnalysis *AA) const; 819e33f44cfc547359bc28526e4c5e1852b600b4448Dan Gohman 820229694f0ee630ceabe96a8bd48952f6740f928b2Evan Cheng /// isConstantValuePHI - If the specified instruction is a PHI that always 821229694f0ee630ceabe96a8bd48952f6740f928b2Evan Cheng /// merges together the same virtual register, return the register, otherwise 822229694f0ee630ceabe96a8bd48952f6740f928b2Evan Cheng /// return 0. 823229694f0ee630ceabe96a8bd48952f6740f928b2Evan Cheng unsigned isConstantValuePHI() const; 824229694f0ee630ceabe96a8bd48952f6740f928b2Evan Cheng 825c36b7069b42bece963b7e6adf020353ce990ef76Evan Cheng /// hasUnmodeledSideEffects - Return true if this instruction has side 826c36b7069b42bece963b7e6adf020353ce990ef76Evan Cheng /// effects that are not modeled by mayLoad / mayStore, etc. 827e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng /// For all instructions, the property is encoded in MCInstrDesc::Flags 828e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng /// (see MCInstrDesc::hasUnmodeledSideEffects(). The only exception is 829c36b7069b42bece963b7e6adf020353ce990ef76Evan Cheng /// INLINEASM instruction, in which case the side effect property is encoded 830c36b7069b42bece963b7e6adf020353ce990ef76Evan Cheng /// in one of its operands (see InlineAsm::Extra_HasSideEffect). 831c36b7069b42bece963b7e6adf020353ce990ef76Evan Cheng /// 832c36b7069b42bece963b7e6adf020353ce990ef76Evan Cheng bool hasUnmodeledSideEffects() const; 833c36b7069b42bece963b7e6adf020353ce990ef76Evan Cheng 834a57fabe815ccf016eead526eb3ef475f116ab155Evan Cheng /// allDefsAreDead - Return true if all the defs of this instruction are dead. 835a57fabe815ccf016eead526eb3ef475f116ab155Evan Cheng /// 836a57fabe815ccf016eead526eb3ef475f116ab155Evan Cheng bool allDefsAreDead() const; 837a57fabe815ccf016eead526eb3ef475f116ab155Evan Cheng 838b179b46cc558c720d23a066c768bad71f975eb93Evan Cheng /// copyImplicitOps - Copy implicit register operands from specified 839b179b46cc558c720d23a066c768bad71f975eb93Evan Cheng /// instruction to this instruction. 840b179b46cc558c720d23a066c768bad71f975eb93Evan Cheng void copyImplicitOps(const MachineInstr *MI); 841b179b46cc558c720d23a066c768bad71f975eb93Evan Cheng 842a995e6086deca9cbd9aab9d6e1e94b36964b66daVikram S. Adve // 843a995e6086deca9cbd9aab9d6e1e94b36964b66daVikram S. Adve // Debugging support 844fa78fbf446b505767e838f9c188707183c57fc9cChris Lattner // 845cb3718832375a581c5ea23f15918f3ea447a446cOwen Anderson void print(raw_ostream &OS, const TargetMachine *TM = 0) const; 846572f5c8c0cf66cd6f53dda255cd8c4d8f27d8505Chris Lattner void dump() const; 8472f898d207466bf233b55607e404baca302bc7b5eChris Lattner 848413746e9833d97a8b463ef6a788aa326cf3829a2Chris Lattner //===--------------------------------------------------------------------===// 84962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Accessors used to build up machine instructions. 8507ad6be7b01a902f532eebb607306f7b3f4627718Chris Lattner 85162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// addOperand - Add the specified operand to the instruction. If it is an 85262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// implicit operand, it is added to the end of the operand list. If it is 85362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// an explicit operand it is added at the end of the explicit operand list 854108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach /// (before the first implicit operand). 85562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner void addOperand(const MachineOperand &Op); 856108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach 8575080f4d9919d39b367891dc51e739c571a66036cChris Lattner /// setDesc - Replace the instruction descriptor (thus opcode) of 85867f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng /// the current instruction with a new one. 8593c8cbe6567c94fdd24ec9b2b8b5c5cc1b01a8c58Chris Lattner /// 860e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng void setDesc(const MCInstrDesc &tid) { MCID = &tid; } 8613c8cbe6567c94fdd24ec9b2b8b5c5cc1b01a8c58Chris Lattner 86206efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen /// setDebugLoc - Replace current source information with new such. 863ab160cf371d6148d49b5401a903dd4ce381b2f8cDale Johannesen /// Avoid using this, the constructor argument is preferable. 86406efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen /// 86506efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen void setDebugLoc(const DebugLoc dl) { debugLoc = dl; } 86606efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen 8673c8cbe6567c94fdd24ec9b2b8b5c5cc1b01a8c58Chris Lattner /// RemoveOperand - Erase an operand from an instruction, leaving it with one 8683c8cbe6567c94fdd24ec9b2b8b5c5cc1b01a8c58Chris Lattner /// fewer operand than it started with. 8693c8cbe6567c94fdd24ec9b2b8b5c5cc1b01a8c58Chris Lattner /// 87062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner void RemoveOperand(unsigned i); 87162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 872c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman /// addMemOperand - Add a MachineMemOperand to the machine instruction. 873c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman /// This function should be used only occasionally. The setMemRefs function 874c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman /// is the primary method for setting up a MachineInstr's MemRefs list. 875c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman void addMemOperand(MachineFunction &MF, MachineMemOperand *MO); 8768e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman 877c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman /// setMemRefs - Assign this MachineInstr's memory reference descriptor 878c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman /// list. This does not transfer ownership. 879c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman void setMemRefs(mmo_iterator NewMemRefs, mmo_iterator NewMemRefsEnd) { 880c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman MemRefs = NewMemRefs; 881c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman MemRefsEnd = NewMemRefsEnd; 882c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman } 88369de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman 884943b5e117fe9a087f9aa529a2632c2d32cc22374Chris Lattnerprivate: 88562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// getRegInfo - If this instruction is embedded into a MachineFunction, 88662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// return the MachineRegisterInfo object for the current function, otherwise 88762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// return null. 88862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner MachineRegisterInfo *getRegInfo(); 889d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng 890d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng /// addImplicitDefUseOperands - Add all implicit def and use operands to 891d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng /// this instruction. 89267f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng void addImplicitDefUseOperands(); 893108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach 89462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// RemoveRegOperandsFromUseLists - Unlink all of the register operands in 89562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// this instruction from their respective use lists. This requires that the 89662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// operands already be on their use lists. 89762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner void RemoveRegOperandsFromUseLists(); 898108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach 89962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// AddRegOperandsToUseLists - Add all of the register operands in 90062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// this instruction from their respective use lists. This requires that the 90162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// operands not be on their use lists yet. 90262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner void AddRegOperandsToUseLists(MachineRegisterInfo &RegInfo); 903a995e6086deca9cbd9aab9d6e1e94b36964b66daVikram S. Adve}; 90423ee550765232e22d0daf6407141ecef4c55c06fVikram S. Adve 90505bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng/// MachineInstrExpressionTrait - Special DenseMapInfo traits to compare 90605bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng/// MachineInstr* by *value* of the instruction rather than by pointer value. 90705bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng/// The hashing and equality testing functions ignore definitions so this is 90805bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng/// useful for CSE, etc. 90905bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Chengstruct MachineInstrExpressionTrait : DenseMapInfo<MachineInstr*> { 91005bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng static inline MachineInstr *getEmptyKey() { 91105bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng return 0; 91205bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng } 91305bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng 91405bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng static inline MachineInstr *getTombstoneKey() { 91505bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng return reinterpret_cast<MachineInstr*>(-1); 91605bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng } 91705bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng 91867eaa08f2b71aa8aec8cdf4c7d970db4cad58adaEvan Cheng static unsigned getHashValue(const MachineInstr* const &MI); 91905bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng 92005bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng static bool isEqual(const MachineInstr* const &LHS, 92105bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng const MachineInstr* const &RHS) { 92205bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng if (RHS == getEmptyKey() || RHS == getTombstoneKey() || 92305bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng LHS == getEmptyKey() || LHS == getTombstoneKey()) 92405bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng return LHS == RHS; 92505bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng return LHS->isIdenticalTo(RHS, MachineInstr::IgnoreVRegDefs); 92605bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng } 92705bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng}; 92805bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng 929b05497e0ca1ba2e7f57b792cc160e5d1c8579582Chris Lattner//===----------------------------------------------------------------------===// 930593da4acc56d4c591ad688e6605b04d0825c867eVikram S. Adve// Debugging Support 931593da4acc56d4c591ad688e6605b04d0825c867eVikram S. Adve 932cb3718832375a581c5ea23f15918f3ea447a446cOwen Andersoninline raw_ostream& operator<<(raw_ostream &OS, const MachineInstr &MI) { 933cb3718832375a581c5ea23f15918f3ea447a446cOwen Anderson MI.print(OS); 934cb3718832375a581c5ea23f15918f3ea447a446cOwen Anderson return OS; 935cb3718832375a581c5ea23f15918f3ea447a446cOwen Anderson} 936cb3718832375a581c5ea23f15918f3ea447a446cOwen Anderson 937d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke} // End llvm namespace 938d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke 93923ee550765232e22d0daf6407141ecef4c55c06fVikram S. Adve#endif 940