MachineInstrBuilder.h revision 5d7802ceccdaaaec1b7612ef4adb90dbaa278ece
1//===-- CodeGen/MachineInstBuilder.h - Simplify creation of MIs -*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file exposes a function named BuildMI, which is useful for dramatically 11// simplifying how MachineInstr's are created. It allows use of code like this: 12// 13// M = BuildMI(X86::ADDrr8, 2).addReg(argVal1).addReg(argVal2); 14// 15//===----------------------------------------------------------------------===// 16 17#ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H 18#define LLVM_CODEGEN_MACHINEINSTRBUILDER_H 19 20#include "llvm/CodeGen/MachineFunction.h" 21#include "llvm/Support/ErrorHandling.h" 22 23namespace llvm { 24 25class MCInstrDesc; 26class MDNode; 27 28namespace RegState { 29 enum { 30 Define = 0x2, 31 Implicit = 0x4, 32 Kill = 0x8, 33 Dead = 0x10, 34 Undef = 0x20, 35 EarlyClobber = 0x40, 36 Debug = 0x80, 37 InternalRead = 0x100, 38 DefineNoRead = Define | Undef, 39 ImplicitDefine = Implicit | Define, 40 ImplicitKill = Implicit | Kill 41 }; 42} 43 44class MachineInstrBuilder { 45 MachineInstr *MI; 46public: 47 MachineInstrBuilder() : MI(0) {} 48 explicit MachineInstrBuilder(MachineInstr *mi) : MI(mi) {} 49 50 /// Allow automatic conversion to the machine instruction we are working on. 51 /// 52 operator MachineInstr*() const { return MI; } 53 MachineInstr *operator->() const { return MI; } 54 operator MachineBasicBlock::iterator() const { return MI; } 55 56 /// addReg - Add a new virtual register operand... 57 /// 58 const 59 MachineInstrBuilder &addReg(unsigned RegNo, unsigned flags = 0, 60 unsigned SubReg = 0) const { 61 assert((flags & 0x1) == 0 && 62 "Passing in 'true' to addReg is forbidden! Use enums instead."); 63 MI->addOperand(MachineOperand::CreateReg(RegNo, 64 flags & RegState::Define, 65 flags & RegState::Implicit, 66 flags & RegState::Kill, 67 flags & RegState::Dead, 68 flags & RegState::Undef, 69 flags & RegState::EarlyClobber, 70 SubReg, 71 flags & RegState::Debug, 72 flags & RegState::InternalRead)); 73 return *this; 74 } 75 76 /// addImm - Add a new immediate operand. 77 /// 78 const MachineInstrBuilder &addImm(int64_t Val) const { 79 MI->addOperand(MachineOperand::CreateImm(Val)); 80 return *this; 81 } 82 83 const MachineInstrBuilder &addCImm(const ConstantInt *Val) const { 84 MI->addOperand(MachineOperand::CreateCImm(Val)); 85 return *this; 86 } 87 88 const MachineInstrBuilder &addFPImm(const ConstantFP *Val) const { 89 MI->addOperand(MachineOperand::CreateFPImm(Val)); 90 return *this; 91 } 92 93 const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB, 94 unsigned char TargetFlags = 0) const { 95 MI->addOperand(MachineOperand::CreateMBB(MBB, TargetFlags)); 96 return *this; 97 } 98 99 const MachineInstrBuilder &addFrameIndex(int Idx) const { 100 MI->addOperand(MachineOperand::CreateFI(Idx)); 101 return *this; 102 } 103 104 const MachineInstrBuilder &addConstantPoolIndex(unsigned Idx, 105 int Offset = 0, 106 unsigned char TargetFlags = 0) const { 107 MI->addOperand(MachineOperand::CreateCPI(Idx, Offset, TargetFlags)); 108 return *this; 109 } 110 111 const MachineInstrBuilder &addTargetIndex(unsigned Idx, int64_t Offset = 0, 112 unsigned char TargetFlags = 0) const { 113 MI->addOperand(MachineOperand::CreateTargetIndex(Idx, Offset, TargetFlags)); 114 return *this; 115 } 116 117 const MachineInstrBuilder &addJumpTableIndex(unsigned Idx, 118 unsigned char TargetFlags = 0) const { 119 MI->addOperand(MachineOperand::CreateJTI(Idx, TargetFlags)); 120 return *this; 121 } 122 123 const MachineInstrBuilder &addGlobalAddress(const GlobalValue *GV, 124 int64_t Offset = 0, 125 unsigned char TargetFlags = 0) const { 126 MI->addOperand(MachineOperand::CreateGA(GV, Offset, TargetFlags)); 127 return *this; 128 } 129 130 const MachineInstrBuilder &addExternalSymbol(const char *FnName, 131 unsigned char TargetFlags = 0) const { 132 MI->addOperand(MachineOperand::CreateES(FnName, TargetFlags)); 133 return *this; 134 } 135 136 const MachineInstrBuilder &addRegMask(const uint32_t *Mask) const { 137 MI->addOperand(MachineOperand::CreateRegMask(Mask)); 138 return *this; 139 } 140 141 const MachineInstrBuilder &addMemOperand(MachineMemOperand *MMO) const { 142 MI->addMemOperand(*MI->getParent()->getParent(), MMO); 143 return *this; 144 } 145 146 const MachineInstrBuilder &setMemRefs(MachineInstr::mmo_iterator b, 147 MachineInstr::mmo_iterator e) const { 148 MI->setMemRefs(b, e); 149 return *this; 150 } 151 152 153 const MachineInstrBuilder &addOperand(const MachineOperand &MO) const { 154 MI->addOperand(MO); 155 return *this; 156 } 157 158 const MachineInstrBuilder &addMetadata(const MDNode *MD) const { 159 MI->addOperand(MachineOperand::CreateMetadata(MD)); 160 return *this; 161 } 162 163 const MachineInstrBuilder &addSym(MCSymbol *Sym) const { 164 MI->addOperand(MachineOperand::CreateMCSymbol(Sym)); 165 return *this; 166 } 167 168 const MachineInstrBuilder &setMIFlags(unsigned Flags) const { 169 MI->setFlags(Flags); 170 return *this; 171 } 172 173 const MachineInstrBuilder &setMIFlag(MachineInstr::MIFlag Flag) const { 174 MI->setFlag(Flag); 175 return *this; 176 } 177 178 // Add a displacement from an existing MachineOperand with an added offset. 179 const MachineInstrBuilder &addDisp(const MachineOperand &Disp, int64_t off, 180 unsigned char TargetFlags = 0) const { 181 switch (Disp.getType()) { 182 default: 183 llvm_unreachable("Unhandled operand type in addDisp()"); 184 case MachineOperand::MO_Immediate: 185 return addImm(Disp.getImm() + off); 186 case MachineOperand::MO_GlobalAddress: { 187 // If caller specifies new TargetFlags then use it, otherwise the 188 // default behavior is to copy the target flags from the existing 189 // MachineOperand. This means if the caller wants to clear the 190 // target flags it needs to do so explicitly. 191 if (TargetFlags) 192 return addGlobalAddress(Disp.getGlobal(), Disp.getOffset() + off, 193 TargetFlags); 194 return addGlobalAddress(Disp.getGlobal(), Disp.getOffset() + off, 195 Disp.getTargetFlags()); 196 } 197 } 198 } 199}; 200 201/// BuildMI - Builder interface. Specify how to create the initial instruction 202/// itself. 203/// 204inline MachineInstrBuilder BuildMI(MachineFunction &MF, 205 DebugLoc DL, 206 const MCInstrDesc &MCID) { 207 return MachineInstrBuilder(MF.CreateMachineInstr(MCID, DL)); 208} 209 210/// BuildMI - This version of the builder sets up the first operand as a 211/// destination virtual register. 212/// 213inline MachineInstrBuilder BuildMI(MachineFunction &MF, 214 DebugLoc DL, 215 const MCInstrDesc &MCID, 216 unsigned DestReg) { 217 return MachineInstrBuilder(MF.CreateMachineInstr(MCID, DL)) 218 .addReg(DestReg, RegState::Define); 219} 220 221/// BuildMI - This version of the builder inserts the newly-built 222/// instruction before the given position in the given MachineBasicBlock, and 223/// sets up the first operand as a destination virtual register. 224/// 225inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, 226 MachineBasicBlock::iterator I, 227 DebugLoc DL, 228 const MCInstrDesc &MCID, 229 unsigned DestReg) { 230 MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL); 231 BB.insert(I, MI); 232 return MachineInstrBuilder(MI).addReg(DestReg, RegState::Define); 233} 234 235inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, 236 MachineBasicBlock::instr_iterator I, 237 DebugLoc DL, 238 const MCInstrDesc &MCID, 239 unsigned DestReg) { 240 MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL); 241 BB.insert(I, MI); 242 return MachineInstrBuilder(MI).addReg(DestReg, RegState::Define); 243} 244 245inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, 246 MachineInstr *I, 247 DebugLoc DL, 248 const MCInstrDesc &MCID, 249 unsigned DestReg) { 250 if (I->isInsideBundle()) { 251 MachineBasicBlock::instr_iterator MII = I; 252 return BuildMI(BB, MII, DL, MCID, DestReg); 253 } 254 255 MachineBasicBlock::iterator MII = I; 256 return BuildMI(BB, MII, DL, MCID, DestReg); 257} 258 259/// BuildMI - This version of the builder inserts the newly-built 260/// instruction before the given position in the given MachineBasicBlock, and 261/// does NOT take a destination register. 262/// 263inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, 264 MachineBasicBlock::iterator I, 265 DebugLoc DL, 266 const MCInstrDesc &MCID) { 267 MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL); 268 BB.insert(I, MI); 269 return MachineInstrBuilder(MI); 270} 271 272inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, 273 MachineBasicBlock::instr_iterator I, 274 DebugLoc DL, 275 const MCInstrDesc &MCID) { 276 MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL); 277 BB.insert(I, MI); 278 return MachineInstrBuilder(MI); 279} 280 281inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, 282 MachineInstr *I, 283 DebugLoc DL, 284 const MCInstrDesc &MCID) { 285 if (I->isInsideBundle()) { 286 MachineBasicBlock::instr_iterator MII = I; 287 return BuildMI(BB, MII, DL, MCID); 288 } 289 290 MachineBasicBlock::iterator MII = I; 291 return BuildMI(BB, MII, DL, MCID); 292} 293 294/// BuildMI - This version of the builder inserts the newly-built 295/// instruction at the end of the given MachineBasicBlock, and does NOT take a 296/// destination register. 297/// 298inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, 299 DebugLoc DL, 300 const MCInstrDesc &MCID) { 301 return BuildMI(*BB, BB->end(), DL, MCID); 302} 303 304/// BuildMI - This version of the builder inserts the newly-built 305/// instruction at the end of the given MachineBasicBlock, and sets up the first 306/// operand as a destination virtual register. 307/// 308inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, 309 DebugLoc DL, 310 const MCInstrDesc &MCID, 311 unsigned DestReg) { 312 return BuildMI(*BB, BB->end(), DL, MCID, DestReg); 313} 314 315inline unsigned getDefRegState(bool B) { 316 return B ? RegState::Define : 0; 317} 318inline unsigned getImplRegState(bool B) { 319 return B ? RegState::Implicit : 0; 320} 321inline unsigned getKillRegState(bool B) { 322 return B ? RegState::Kill : 0; 323} 324inline unsigned getDeadRegState(bool B) { 325 return B ? RegState::Dead : 0; 326} 327inline unsigned getUndefRegState(bool B) { 328 return B ? RegState::Undef : 0; 329} 330inline unsigned getInternalReadRegState(bool B) { 331 return B ? RegState::InternalRead : 0; 332} 333 334 335/// Helper class for constructing bundles of MachineInstrs. 336/// 337/// MIBundleBuilder can create a bundle from scratch by inserting new 338/// MachineInstrs one at a time, or it can create a bundle from a sequence of 339/// existing MachineInstrs in a basic block. 340class MIBundleBuilder { 341 MachineBasicBlock &MBB; 342 MachineBasicBlock::instr_iterator Begin; 343 MachineBasicBlock::instr_iterator End; 344 345public: 346 /// Create an MIBundleBuilder that inserts instructions into a new bundle in 347 /// BB above the bundle or instruction at Pos. 348 MIBundleBuilder(MachineBasicBlock &BB, 349 MachineBasicBlock::iterator Pos) 350 : MBB(BB), Begin(Pos.getInstrIterator()), End(Begin) {} 351 352 /// Create a bundle from the sequence of instructions between B and E. 353 MIBundleBuilder(MachineBasicBlock &BB, 354 MachineBasicBlock::iterator B, 355 MachineBasicBlock::iterator E) 356 : MBB(BB), Begin(B.getInstrIterator()), End(E.getInstrIterator()) { 357 assert(B != E && "No instructions to bundle"); 358 ++B; 359 while (B != E) { 360 MachineInstr *MI = B; 361 ++B; 362 MI->bundleWithPred(); 363 } 364 } 365 366 /// Create an MIBundleBuilder representing an existing instruction or bundle 367 /// that has MI as its head. 368 explicit MIBundleBuilder(MachineInstr *MI) 369 : MBB(*MI->getParent()), Begin(MI) { 370 MachineBasicBlock::iterator I = MI; 371 ++I; 372 End = I.getInstrIterator(); 373 } 374 375 /// Return a reference to the basic block containing this bundle. 376 MachineBasicBlock &getMBB() const { return MBB; } 377 378 /// Return true if no instructions have been inserted in this bundle yet. 379 /// Empty bundles aren't representable in a MachineBasicBlock. 380 bool empty() const { return Begin == End; } 381 382 /// Return an iterator to the first bundled instruction. 383 MachineBasicBlock::instr_iterator begin() const { return Begin; } 384 385 /// Return an iterator beyond the last bundled instruction. 386 MachineBasicBlock::instr_iterator end() const { return End; } 387 388 /// Insert MI into this bundle before I which must point to an instruction in 389 /// the bundle, or end(). 390 MIBundleBuilder &insert(MachineBasicBlock::instr_iterator I, 391 MachineInstr *MI) { 392 MBB.insert(I, MI); 393 if (I == Begin) { 394 if (!empty()) 395 MI->bundleWithSucc(); 396 Begin = MI; 397 return *this; 398 } 399 if (I == End) { 400 MI->bundleWithPred(); 401 return *this; 402 } 403 // MI was inserted in the middle of the bundle, so its neighbors' flags are 404 // already fine. Update MI's bundle flags manually. 405 MI->setFlag(MachineInstr::BundledPred); 406 MI->setFlag(MachineInstr::BundledSucc); 407 return *this; 408 } 409 410 /// Insert MI into MBB by prepending it to the instructions in the bundle. 411 /// MI will become the first instruction in the bundle. 412 MIBundleBuilder &prepend(MachineInstr *MI) { 413 return insert(begin(), MI); 414 } 415 416 /// Insert MI into MBB by appending it to the instructions in the bundle. 417 /// MI will become the last instruction in the bundle. 418 MIBundleBuilder &append(MachineInstr *MI) { 419 return insert(end(), MI); 420 } 421}; 422 423} // End llvm namespace 424 425#endif 426