MachineInstrBuilder.h revision 6559bb96a9901af21c6037675f9508373773bd35
1//===-- CodeGen/MachineInstBuilder.h - Simplify creation of MIs -*- C++ -*-===// 2// 3// This file exposes a function named BuildMI, which is useful for dramatically 4// simplifying how MachineInstr's are created. Instead of using code like this: 5// 6// M = new MachineInstr(X86::ADDrr32); 7// M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, argVal1); 8// M->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, argVal2); 9// 10// we can now use code like this: 11// 12// M = BuildMI(X86::ADDrr8, 2).addReg(argVal1).addReg(argVal2); 13// 14//===----------------------------------------------------------------------===// 15 16#ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H 17#define LLVM_CODEGEN_MACHINEINSTRBUILDER_H 18 19#include "llvm/CodeGen/MachineInstr.h" 20 21struct MachineInstrBuilder { 22 MachineInstr *MI; 23 24 MachineInstrBuilder(MachineInstr *mi) : MI(mi) {} 25 26 /// Allow automatic conversion to the machine instruction we are working on. 27 /// 28 operator MachineInstr*() const { return MI; } 29 30 /// addReg - Add a new virtual register operand... 31 /// 32 MachineInstrBuilder &addReg(int RegNo, bool isDef = false) { 33 MI->addRegOperand(RegNo, isDef); 34 return *this; 35 } 36 37 /// addReg - Add an LLVM value that is to be used as a register... 38 /// 39 MachineInstrBuilder &addReg(Value *V, bool isDef = false, bool isDNU = false){ 40 MI->addRegOperand(V, isDef, isDNU); 41 return *this; 42 } 43 44 /// addClobber - Assert that this MI is going to clobber a specific 45 /// register. Useful for instructions that always clobber certain hard regs. 46 /// (Same as addReg(RegNo, true) but shorter and more obvious). 47 /// 48 MachineInstrBuilder &addClobber(int RegNo) { 49 MI->addRegOperand(RegNo, true); 50 return *this; 51 } 52 53 /// addPCDisp - Add an LLVM value to be treated as a PC relative 54 /// displacement... 55 /// 56 MachineInstrBuilder &addPCDisp(Value *V) { 57 MI->addPCDispOperand(V); 58 return *this; 59 } 60 61 /// addMReg - Add a machine register operand... 62 /// 63 MachineInstrBuilder &addMReg(int Reg, bool isDef=false) { 64 MI->addMachineRegOperand(Reg, isDef); 65 return *this; 66 } 67 68 /// addSImm - Add a new sign extended immediate operand... 69 /// 70 MachineInstrBuilder &addSImm(int64_t val) { 71 MI->addSignExtImmOperand(val); 72 return *this; 73 } 74 75 /// addZImm - Add a new zero extended immediate operand... 76 /// 77 MachineInstrBuilder &addZImm(int64_t Val) { 78 MI->addZeroExtImmOperand(Val); 79 return *this; 80 } 81}; 82 83/// BuildMI - Builder interface. Specify how to create the initial instruction 84/// itself. NumOperands is the number of operands to the machine instruction to 85/// allow for memory efficient representation of machine instructions. 86/// 87inline MachineInstrBuilder BuildMI(MachineOpCode Opcode, unsigned NumOperands) { 88 return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands, true, true)); 89} 90 91/// BuildMI - This version of the builder inserts the built MachineInstr into 92/// the specified MachineBasicBlock. 93/// 94inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, MachineOpCode Opcode, 95 unsigned NumOperands) { 96 return MachineInstrBuilder(new MachineInstr(BB, Opcode, NumOperands)); 97} 98 99/// BuildMI - This version of the builder inserts the built MachineInstr into 100/// the specified MachineBasicBlock, and also sets up the first "operand" as a 101/// destination virtual register. NumOperands is the number of additional add* 102/// calls that are expected, it does not include the destination register. 103/// 104inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, MachineOpCode Opcode, 105 unsigned NumOperands, unsigned DestReg) { 106 return MachineInstrBuilder(new MachineInstr(BB, Opcode, 107 NumOperands+1)).addReg(DestReg, 108 true); 109} 110 111#endif 112