MachineInstrBuilder.h revision ca4f6ebefc4dc55d13a0182a0be5b02e92fc63ea 
1//===-- CodeGen/MachineInstBuilder.h - Simplify creation of MIs -*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file exposes a function named BuildMI, which is useful for dramatically
11// simplifying how MachineInstr's are created.  Instead of using code like this:
12//
13//   M = new MachineInstr(X86::ADDrr8);
14//   M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, argVal1);
15//   M->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, argVal2);
16//
17// we can now use code like this:
18//
19//   M = BuildMI(X86::ADDrr8, 2).addReg(argVal1).addReg(argVal2);
20//
21//===----------------------------------------------------------------------===//
22
23#ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H
24#define LLVM_CODEGEN_MACHINEINSTRBUILDER_H
25
26#include "llvm/CodeGen/MachineBasicBlock.h"
27
28namespace llvm {
29
30class MachineInstrBuilder {
31  MachineInstr *MI;
32public:
33  MachineInstrBuilder(MachineInstr *mi) : MI(mi) {}
34
35  /// Allow automatic conversion to the machine instruction we are working on.
36  ///
37  operator MachineInstr*() const { return MI; }
38  operator MachineBasicBlock::iterator() const { return MI; }
39
40  /// addReg - Add a new virtual register operand...
41  ///
42  const MachineInstrBuilder &addReg(
43    int RegNo,
44    MachineOperand::UseType Ty = MachineOperand::Use) const {
45    MI->addRegOperand(RegNo, Ty);
46    return *this;
47  }
48
49  /// addReg - Add an LLVM value that is to be used as a register...
50  ///
51  const MachineInstrBuilder &addReg(
52    Value *V,
53    MachineOperand::UseType Ty = MachineOperand::Use) const {
54    MI->addRegOperand(V, Ty);
55    return *this;
56  }
57
58  /// addReg - Add an LLVM value that is to be used as a register...
59  ///
60  const MachineInstrBuilder &addCCReg(
61    Value *V,
62    MachineOperand::UseType Ty = MachineOperand::Use) const {
63    MI->addCCRegOperand(V, Ty);
64    return *this;
65  }
66
67  /// addRegDef - Add an LLVM value that is to be defined as a register... this
68  /// is the same as addReg(V, MachineOperand::Def).
69  ///
70  const MachineInstrBuilder &addRegDef(Value *V) const {
71    return addReg(V, MachineOperand::Def);
72  }
73
74  /// addPCDisp - Add an LLVM value to be treated as a PC relative
75  /// displacement...
76  ///
77  const MachineInstrBuilder &addPCDisp(Value *V) const {
78    MI->addPCDispOperand(V);
79    return *this;
80  }
81
82  /// addMReg - Add a machine register operand...
83  ///
84  const MachineInstrBuilder &addMReg(int Reg, MachineOperand::UseType Ty
85                                        = MachineOperand::Use) const {
86    MI->addMachineRegOperand(Reg, Ty);
87    return *this;
88  }
89
90  /// addImm - Add a new immediate operand.
91  ///
92  const MachineInstrBuilder &addImm(int Val) const {
93    MI->addZeroExtImmOperand(Val);
94    return *this;
95  }
96
97  /// addSImm - Add a new sign extended immediate operand...
98  ///
99  const MachineInstrBuilder &addSImm(int val) const {
100    MI->addSignExtImmOperand(val);
101    return *this;
102  }
103
104  /// addZImm - Add a new zero extended immediate operand...
105  ///
106  const MachineInstrBuilder &addZImm(unsigned Val) const {
107    MI->addZeroExtImmOperand(Val);
108    return *this;
109  }
110
111  const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB) const {
112    MI->addMachineBasicBlockOperand(MBB);
113    return *this;
114  }
115
116  const MachineInstrBuilder &addFrameIndex(unsigned Idx) const {
117    MI->addFrameIndexOperand(Idx);
118    return *this;
119  }
120
121  const MachineInstrBuilder &addConstantPoolIndex(unsigned Idx) const {
122    MI->addConstantPoolIndexOperand(Idx);
123    return *this;
124  }
125
126  const MachineInstrBuilder &addGlobalAddress(GlobalValue *GV,
127                                              bool isPCRelative = false, int Offset = 0) const {
128    MI->addGlobalAddressOperand(GV, isPCRelative, Offset);
129    return *this;
130  }
131
132  const MachineInstrBuilder &addExternalSymbol(const std::string &Name,
133                                               bool isPCRelative = false) const{
134    MI->addExternalSymbolOperand(Name, isPCRelative);
135    return *this;
136  }
137};
138
139/// BuildMI - Builder interface.  Specify how to create the initial instruction
140/// itself.  NumOperands is the number of operands to the machine instruction to
141/// allow for memory efficient representation of machine instructions.
142///
143inline MachineInstrBuilder BuildMI(int Opcode, unsigned NumOperands) {
144  return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands, true, true));
145}
146
147/// BuildMI - This version of the builder sets up the first operand as a
148/// destination virtual register.  NumOperands is the number of additional add*
149/// calls that are expected, not including the destination register.
150///
151inline MachineInstrBuilder BuildMI(
152  int Opcode, unsigned NumOperands,
153  unsigned DestReg,
154  MachineOperand::UseType useType = MachineOperand::Def) {
155  return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands+1,
156                                   true, true)).addReg(DestReg, useType);
157}
158
159/// BuildMI - This version of the builder inserts the newly-built
160/// instruction before the given position in the given MachineBasicBlock, and
161/// sets up the first operand as a destination virtual register.
162/// NumOperands is the number of additional add* calls that are expected,
163/// not including the destination register.
164///
165inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
166                                   MachineBasicBlock::iterator I,
167                                   int Opcode, unsigned NumOperands,
168                                   unsigned DestReg) {
169  MachineInstr *MI = new MachineInstr(Opcode, NumOperands+1, true, true);
170  BB.insert(I, MI);
171  return MachineInstrBuilder(MI).addReg(DestReg, MachineOperand::Def);
172}
173
174/// BuildMI - This version of the builder inserts the newly-built
175/// instruction before the given position in the given MachineBasicBlock, and
176/// does NOT take a destination register.
177///
178inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
179                                   MachineBasicBlock::iterator I,
180                                   int Opcode, unsigned NumOperands) {
181  MachineInstr *MI = new MachineInstr(Opcode, NumOperands, true, true);
182  BB.insert(I, MI);
183  return MachineInstrBuilder(MI);
184}
185
186/// BuildMI - This version of the builder inserts the newly-built
187/// instruction at the end of the given MachineBasicBlock, and does NOT take a
188/// destination register.
189///
190inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, int Opcode,
191                                   unsigned NumOperands) {
192  return BuildMI(*BB, BB->end(), Opcode, NumOperands);
193}
194
195/// BuildMI - This version of the builder inserts the newly-built
196/// instruction at the end of the given MachineBasicBlock, and sets up the first
197/// operand as a destination virtual register. NumOperands is the number of
198/// additional add* calls that are expected, not including the destination
199/// register.
200///
201inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, int Opcode,
202                                   unsigned NumOperands, unsigned DestReg) {
203  return BuildMI(*BB, BB->end(), Opcode, NumOperands, DestReg);
204}
205
206} // End llvm namespace
207
208#endif
209