MachineInstrBuilder.h revision ccdcdf3e2e5e9e30e0e2a99e40ac7199afcd9025
1//===-- CodeGen/MachineInstBuilder.h - Simplify creation of MIs -*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file exposes a function named BuildMI, which is useful for dramatically 11// simplifying how MachineInstr's are created. Instead of using code like this: 12// 13// M = new MachineInstr(X86::ADDrr8); 14// M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, argVal1); 15// M->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, argVal2); 16// 17// we can now use code like this: 18// 19// M = BuildMI(X86::ADDrr8, 2).addReg(argVal1).addReg(argVal2); 20// 21//===----------------------------------------------------------------------===// 22 23#ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H 24#define LLVM_CODEGEN_MACHINEINSTRBUILDER_H 25 26#include "llvm/CodeGen/MachineBasicBlock.h" 27 28namespace llvm { 29 30class MachineInstrBuilder { 31 MachineInstr *MI; 32public: 33 MachineInstrBuilder(MachineInstr *mi) : MI(mi) {} 34 35 /// Allow automatic conversion to the machine instruction we are working on. 36 /// 37 operator MachineInstr*() const { return MI; } 38 operator MachineBasicBlock::iterator() const { return MI; } 39 40 /// addReg - Add a new virtual register operand... 41 /// 42 const MachineInstrBuilder &addReg( 43 int RegNo, 44 MachineOperand::UseType Ty = MachineOperand::Use) const { 45 MI->addRegOperand(RegNo, Ty); 46 return *this; 47 } 48 49 /// addReg - Add an LLVM value that is to be used as a register... 50 /// 51 const MachineInstrBuilder &addReg( 52 Value *V, 53 MachineOperand::UseType Ty = MachineOperand::Use) const { 54 MI->addRegOperand(V, Ty); 55 return *this; 56 } 57 58 /// addReg - Add an LLVM value that is to be used as a register... 59 /// 60 const MachineInstrBuilder &addCCReg( 61 Value *V, 62 MachineOperand::UseType Ty = MachineOperand::Use) const { 63 MI->addCCRegOperand(V, Ty); 64 return *this; 65 } 66 67 /// addRegDef - Add an LLVM value that is to be defined as a register... this 68 /// is the same as addReg(V, MachineOperand::Def). 69 /// 70 const MachineInstrBuilder &addRegDef(Value *V) const { 71 return addReg(V, MachineOperand::Def); 72 } 73 74 /// addPCDisp - Add an LLVM value to be treated as a PC relative 75 /// displacement... 76 /// 77 const MachineInstrBuilder &addPCDisp(Value *V) const { 78 MI->addPCDispOperand(V); 79 return *this; 80 } 81 82 /// addMReg - Add a machine register operand... 83 /// 84 const MachineInstrBuilder &addMReg(int Reg, MachineOperand::UseType Ty 85 = MachineOperand::Use) const { 86 MI->addMachineRegOperand(Reg, Ty); 87 return *this; 88 } 89 90 /// addImm - Add a new immediate operand. 91 /// 92 const MachineInstrBuilder &addImm(int Val) const { 93 MI->addZeroExtImmOperand(Val); 94 return *this; 95 } 96 97 /// addSImm - Add a new sign extended immediate operand... 98 /// 99 const MachineInstrBuilder &addSImm(int val) const { 100 MI->addSignExtImmOperand(val); 101 return *this; 102 } 103 104 /// addZImm - Add a new zero extended immediate operand... 105 /// 106 const MachineInstrBuilder &addZImm(unsigned Val) const { 107 MI->addZeroExtImmOperand(Val); 108 return *this; 109 } 110 111 /// addImm64 - Add a new 64-bit immediate operand... 112 /// 113 const MachineInstrBuilder &addImm64(uint64_t Val) const { 114 MI->addZeroExtImm64Operand(Val); 115 return *this; 116 } 117 118 const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB) const { 119 MI->addMachineBasicBlockOperand(MBB); 120 return *this; 121 } 122 123 const MachineInstrBuilder &addFrameIndex(unsigned Idx) const { 124 MI->addFrameIndexOperand(Idx); 125 return *this; 126 } 127 128 const MachineInstrBuilder &addConstantPoolIndex(unsigned Idx, 129 int Offset = 0) const { 130 MI->addConstantPoolIndexOperand(Idx, Offset); 131 return *this; 132 } 133 134 const MachineInstrBuilder &addJumpTableIndex(unsigned Idx) const { 135 MI->addJumpTableIndexOperand(Idx); 136 return *this; 137 } 138 139 const MachineInstrBuilder &addGlobalAddress(GlobalValue *GV, 140 bool isPCRelative = false, 141 int Offset = 0) const { 142 MI->addGlobalAddressOperand(GV, isPCRelative, Offset); 143 return *this; 144 } 145 146 const MachineInstrBuilder &addExternalSymbol(const char *FnName, 147 bool isPCRelative = false) const{ 148 MI->addExternalSymbolOperand(FnName, isPCRelative); 149 return *this; 150 } 151}; 152 153/// BuildMI - Builder interface. Specify how to create the initial instruction 154/// itself. NumOperands is the number of operands to the machine instruction to 155/// allow for memory efficient representation of machine instructions. 156/// 157inline MachineInstrBuilder BuildMI(int Opcode, unsigned NumOperands) { 158 return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands, true, true)); 159} 160 161/// BuildMI - This version of the builder sets up the first operand as a 162/// destination virtual register. NumOperands is the number of additional add* 163/// calls that are expected, not including the destination register. 164/// 165inline MachineInstrBuilder BuildMI( 166 int Opcode, unsigned NumOperands, 167 unsigned DestReg, 168 MachineOperand::UseType useType = MachineOperand::Def) { 169 return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands+1, 170 true, true)).addReg(DestReg, useType); 171} 172 173/// BuildMI - This version of the builder inserts the newly-built 174/// instruction before the given position in the given MachineBasicBlock, and 175/// sets up the first operand as a destination virtual register. 176/// NumOperands is the number of additional add* calls that are expected, 177/// not including the destination register. 178/// 179inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, 180 MachineBasicBlock::iterator I, 181 int Opcode, unsigned NumOperands, 182 unsigned DestReg) { 183 MachineInstr *MI = new MachineInstr(Opcode, NumOperands+1, true, true); 184 BB.insert(I, MI); 185 return MachineInstrBuilder(MI).addReg(DestReg, MachineOperand::Def); 186} 187 188/// BuildMI - This version of the builder inserts the newly-built 189/// instruction before the given position in the given MachineBasicBlock, and 190/// does NOT take a destination register. 191/// 192inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, 193 MachineBasicBlock::iterator I, 194 int Opcode, unsigned NumOperands) { 195 MachineInstr *MI = new MachineInstr(Opcode, NumOperands, true, true); 196 BB.insert(I, MI); 197 return MachineInstrBuilder(MI); 198} 199 200/// BuildMI - This version of the builder inserts the newly-built 201/// instruction at the end of the given MachineBasicBlock, and does NOT take a 202/// destination register. 203/// 204inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, int Opcode, 205 unsigned NumOperands) { 206 return BuildMI(*BB, BB->end(), Opcode, NumOperands); 207} 208 209/// BuildMI - This version of the builder inserts the newly-built 210/// instruction at the end of the given MachineBasicBlock, and sets up the first 211/// operand as a destination virtual register. NumOperands is the number of 212/// additional add* calls that are expected, not including the destination 213/// register. 214/// 215inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, int Opcode, 216 unsigned NumOperands, unsigned DestReg) { 217 return BuildMI(*BB, BB->end(), Opcode, NumOperands, DestReg); 218} 219 220} // End llvm namespace 221 222#endif 223