MachineOperand.h revision 938200859ec714f59f8f93acceb999e212e9c539
1//===-- llvm/CodeGen/MachineOperand.h - MachineOperand class ----*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file contains the declaration of the MachineOperand class. 11// 12//===----------------------------------------------------------------------===// 13 14#ifndef LLVM_CODEGEN_MACHINEOPERAND_H 15#define LLVM_CODEGEN_MACHINEOPERAND_H 16 17#include "llvm/Support/DataTypes.h" 18#include <cassert> 19 20namespace llvm { 21 22class BlockAddress; 23class ConstantFP; 24class ConstantInt; 25class GlobalValue; 26class MachineBasicBlock; 27class MachineInstr; 28class MachineRegisterInfo; 29class MDNode; 30class TargetMachine; 31class TargetRegisterInfo; 32class raw_ostream; 33class MCSymbol; 34 35/// MachineOperand class - Representation of each machine instruction operand. 36/// 37class MachineOperand { 38public: 39 enum MachineOperandType { 40 MO_Register, ///< Register operand. 41 MO_Immediate, ///< Immediate operand 42 MO_CImmediate, ///< Immediate >64bit operand 43 MO_FPImmediate, ///< Floating-point immediate operand 44 MO_MachineBasicBlock, ///< MachineBasicBlock reference 45 MO_FrameIndex, ///< Abstract Stack Frame Index 46 MO_ConstantPoolIndex, ///< Address of indexed Constant in Constant Pool 47 MO_JumpTableIndex, ///< Address of indexed Jump Table for switch 48 MO_ExternalSymbol, ///< Name of external global symbol 49 MO_GlobalAddress, ///< Address of a global value 50 MO_BlockAddress, ///< Address of a basic block 51 MO_RegisterMask, ///< Mask of preserved registers. 52 MO_Metadata, ///< Metadata reference (for debug info) 53 MO_MCSymbol ///< MCSymbol reference (for debug/eh info) 54 }; 55 56private: 57 /// OpKind - Specify what kind of operand this is. This discriminates the 58 /// union. 59 unsigned char OpKind; // MachineOperandType 60 61 /// SubReg - Subregister number, only valid for MO_Register. A value of 0 62 /// indicates the MO_Register has no subReg. 63 unsigned char SubReg; 64 65 /// TargetFlags - This is a set of target-specific operand flags. 66 unsigned char TargetFlags; 67 68 /// IsDef/IsImp/IsKill/IsDead flags - These are only valid for MO_Register 69 /// operands. 70 71 /// IsDef - True if this is a def, false if this is a use of the register. 72 /// 73 bool IsDef : 1; 74 75 /// IsImp - True if this is an implicit def or use, false if it is explicit. 76 /// 77 bool IsImp : 1; 78 79 /// IsKill - True if this instruction is the last use of the register on this 80 /// path through the function. This is only valid on uses of registers. 81 bool IsKill : 1; 82 83 /// IsDead - True if this register is never used by a subsequent instruction. 84 /// This is only valid on definitions of registers. 85 bool IsDead : 1; 86 87 /// IsUndef - True if this register operand reads an "undef" value, i.e. the 88 /// read value doesn't matter. This flag can be set on both use and def 89 /// operands. On a sub-register def operand, it refers to the part of the 90 /// register that isn't written. On a full-register def operand, it is a 91 /// noop. See readsReg(). 92 /// 93 /// This is only valid on registers. 94 /// 95 /// Note that an instruction may have multiple <undef> operands referring to 96 /// the same register. In that case, the instruction may depend on those 97 /// operands reading the same dont-care value. For example: 98 /// 99 /// %vreg1<def> = XOR %vreg2<undef>, %vreg2<undef> 100 /// 101 /// Any register can be used for %vreg2, and its value doesn't matter, but 102 /// the two operands must be the same register. 103 /// 104 bool IsUndef : 1; 105 106 /// IsInternalRead - True if this operand reads a value that was defined 107 /// inside the same instruction or bundle. This flag can be set on both use 108 /// and def operands. On a sub-register def operand, it refers to the part 109 /// of the register that isn't written. On a full-register def operand, it 110 /// is a noop. 111 /// 112 /// When this flag is set, the instruction bundle must contain at least one 113 /// other def of the register. If multiple instructions in the bundle define 114 /// the register, the meaning is target-defined. 115 bool IsInternalRead : 1; 116 117 /// IsEarlyClobber - True if this MO_Register 'def' operand is written to 118 /// by the MachineInstr before all input registers are read. This is used to 119 /// model the GCC inline asm '&' constraint modifier. 120 bool IsEarlyClobber : 1; 121 122 /// IsDebug - True if this MO_Register 'use' operand is in a debug pseudo, 123 /// not a real instruction. Such uses should be ignored during codegen. 124 bool IsDebug : 1; 125 126 /// SmallContents - This really should be part of the Contents union, but 127 /// lives out here so we can get a better packed struct. 128 /// MO_Register: Register number. 129 /// OffsetedInfo: Low bits of offset. 130 union { 131 unsigned RegNo; // For MO_Register. 132 unsigned OffsetLo; // Matches Contents.OffsetedInfo.OffsetHi. 133 } SmallContents; 134 135 /// ParentMI - This is the instruction that this operand is embedded into. 136 /// This is valid for all operand types, when the operand is in an instr. 137 MachineInstr *ParentMI; 138 139 /// Contents union - This contains the payload for the various operand types. 140 union { 141 MachineBasicBlock *MBB; // For MO_MachineBasicBlock. 142 const ConstantFP *CFP; // For MO_FPImmediate. 143 const ConstantInt *CI; // For MO_CImmediate. Integers > 64bit. 144 int64_t ImmVal; // For MO_Immediate. 145 const uint32_t *RegMask; // For MO_RegisterMask. 146 const MDNode *MD; // For MO_Metadata. 147 MCSymbol *Sym; // For MO_MCSymbol 148 149 struct { // For MO_Register. 150 // Register number is in SmallContents.RegNo. 151 MachineOperand **Prev; // Access list for register. 152 MachineOperand *Next; 153 } Reg; 154 155 /// OffsetedInfo - This struct contains the offset and an object identifier. 156 /// this represent the object as with an optional offset from it. 157 struct { 158 union { 159 int Index; // For MO_*Index - The index itself. 160 const char *SymbolName; // For MO_ExternalSymbol. 161 const GlobalValue *GV; // For MO_GlobalAddress. 162 const BlockAddress *BA; // For MO_BlockAddress. 163 } Val; 164 // Low bits of offset are in SmallContents.OffsetLo. 165 int OffsetHi; // An offset from the object, high 32 bits. 166 } OffsetedInfo; 167 } Contents; 168 169 explicit MachineOperand(MachineOperandType K) : OpKind(K), ParentMI(0) { 170 TargetFlags = 0; 171 } 172public: 173 /// getType - Returns the MachineOperandType for this operand. 174 /// 175 MachineOperandType getType() const { return (MachineOperandType)OpKind; } 176 177 unsigned char getTargetFlags() const { return TargetFlags; } 178 void setTargetFlags(unsigned char F) { TargetFlags = F; } 179 void addTargetFlag(unsigned char F) { TargetFlags |= F; } 180 181 182 /// getParent - Return the instruction that this operand belongs to. 183 /// 184 MachineInstr *getParent() { return ParentMI; } 185 const MachineInstr *getParent() const { return ParentMI; } 186 187 /// clearParent - Reset the parent pointer. 188 /// 189 /// The MachineOperand copy constructor also copies ParentMI, expecting the 190 /// original to be deleted. If a MachineOperand is ever stored outside a 191 /// MachineInstr, the parent pointer must be cleared. 192 /// 193 /// Never call clearParent() on an operand in a MachineInstr. 194 /// 195 void clearParent() { ParentMI = 0; } 196 197 void print(raw_ostream &os, const TargetMachine *TM = 0) const; 198 199 //===--------------------------------------------------------------------===// 200 // Accessors that tell you what kind of MachineOperand you're looking at. 201 //===--------------------------------------------------------------------===// 202 203 /// isReg - Tests if this is a MO_Register operand. 204 bool isReg() const { return OpKind == MO_Register; } 205 /// isImm - Tests if this is a MO_Immediate operand. 206 bool isImm() const { return OpKind == MO_Immediate; } 207 /// isCImm - Test if t his is a MO_CImmediate operand. 208 bool isCImm() const { return OpKind == MO_CImmediate; } 209 /// isFPImm - Tests if this is a MO_FPImmediate operand. 210 bool isFPImm() const { return OpKind == MO_FPImmediate; } 211 /// isMBB - Tests if this is a MO_MachineBasicBlock operand. 212 bool isMBB() const { return OpKind == MO_MachineBasicBlock; } 213 /// isFI - Tests if this is a MO_FrameIndex operand. 214 bool isFI() const { return OpKind == MO_FrameIndex; } 215 /// isCPI - Tests if this is a MO_ConstantPoolIndex operand. 216 bool isCPI() const { return OpKind == MO_ConstantPoolIndex; } 217 /// isJTI - Tests if this is a MO_JumpTableIndex operand. 218 bool isJTI() const { return OpKind == MO_JumpTableIndex; } 219 /// isGlobal - Tests if this is a MO_GlobalAddress operand. 220 bool isGlobal() const { return OpKind == MO_GlobalAddress; } 221 /// isSymbol - Tests if this is a MO_ExternalSymbol operand. 222 bool isSymbol() const { return OpKind == MO_ExternalSymbol; } 223 /// isBlockAddress - Tests if this is a MO_BlockAddress operand. 224 bool isBlockAddress() const { return OpKind == MO_BlockAddress; } 225 /// isRegMask - Tests if this is a MO_RegisterMask operand. 226 bool isRegMask() const { return OpKind == MO_RegisterMask; } 227 /// isMetadata - Tests if this is a MO_Metadata operand. 228 bool isMetadata() const { return OpKind == MO_Metadata; } 229 bool isMCSymbol() const { return OpKind == MO_MCSymbol; } 230 231 232 //===--------------------------------------------------------------------===// 233 // Accessors for Register Operands 234 //===--------------------------------------------------------------------===// 235 236 /// getReg - Returns the register number. 237 unsigned getReg() const { 238 assert(isReg() && "This is not a register operand!"); 239 return SmallContents.RegNo; 240 } 241 242 unsigned getSubReg() const { 243 assert(isReg() && "Wrong MachineOperand accessor"); 244 return (unsigned)SubReg; 245 } 246 247 bool isUse() const { 248 assert(isReg() && "Wrong MachineOperand accessor"); 249 return !IsDef; 250 } 251 252 bool isDef() const { 253 assert(isReg() && "Wrong MachineOperand accessor"); 254 return IsDef; 255 } 256 257 bool isImplicit() const { 258 assert(isReg() && "Wrong MachineOperand accessor"); 259 return IsImp; 260 } 261 262 bool isDead() const { 263 assert(isReg() && "Wrong MachineOperand accessor"); 264 return IsDead; 265 } 266 267 bool isKill() const { 268 assert(isReg() && "Wrong MachineOperand accessor"); 269 return IsKill; 270 } 271 272 bool isUndef() const { 273 assert(isReg() && "Wrong MachineOperand accessor"); 274 return IsUndef; 275 } 276 277 bool isInternalRead() const { 278 assert(isReg() && "Wrong MachineOperand accessor"); 279 return IsInternalRead; 280 } 281 282 bool isEarlyClobber() const { 283 assert(isReg() && "Wrong MachineOperand accessor"); 284 return IsEarlyClobber; 285 } 286 287 bool isDebug() const { 288 assert(isReg() && "Wrong MachineOperand accessor"); 289 return IsDebug; 290 } 291 292 /// readsReg - Returns true if this operand reads the previous value of its 293 /// register. A use operand with the <undef> flag set doesn't read its 294 /// register. A sub-register def implicitly reads the other parts of the 295 /// register being redefined unless the <undef> flag is set. 296 /// 297 /// This refers to reading the register value from before the current 298 /// instruction or bundle. Internal bundle reads are not included. 299 bool readsReg() const { 300 assert(isReg() && "Wrong MachineOperand accessor"); 301 return !isUndef() && !isInternalRead() && (isUse() || getSubReg()); 302 } 303 304 /// getNextOperandForReg - Return the next MachineOperand in the function that 305 /// uses or defines this register. 306 MachineOperand *getNextOperandForReg() const { 307 assert(isReg() && "This is not a register operand!"); 308 return Contents.Reg.Next; 309 } 310 311 //===--------------------------------------------------------------------===// 312 // Mutators for Register Operands 313 //===--------------------------------------------------------------------===// 314 315 /// Change the register this operand corresponds to. 316 /// 317 void setReg(unsigned Reg); 318 319 void setSubReg(unsigned subReg) { 320 assert(isReg() && "Wrong MachineOperand accessor"); 321 SubReg = (unsigned char)subReg; 322 } 323 324 /// substVirtReg - Substitute the current register with the virtual 325 /// subregister Reg:SubReg. Take any existing SubReg index into account, 326 /// using TargetRegisterInfo to compose the subreg indices if necessary. 327 /// Reg must be a virtual register, SubIdx can be 0. 328 /// 329 void substVirtReg(unsigned Reg, unsigned SubIdx, const TargetRegisterInfo&); 330 331 /// substPhysReg - Substitute the current register with the physical register 332 /// Reg, taking any existing SubReg into account. For instance, 333 /// substPhysReg(%EAX) will change %reg1024:sub_8bit to %AL. 334 /// 335 void substPhysReg(unsigned Reg, const TargetRegisterInfo&); 336 337 void setIsUse(bool Val = true) { 338 assert(isReg() && "Wrong MachineOperand accessor"); 339 assert((Val || !isDebug()) && "Marking a debug operation as def"); 340 IsDef = !Val; 341 } 342 343 void setIsDef(bool Val = true) { 344 assert(isReg() && "Wrong MachineOperand accessor"); 345 assert((!Val || !isDebug()) && "Marking a debug operation as def"); 346 IsDef = Val; 347 } 348 349 void setImplicit(bool Val = true) { 350 assert(isReg() && "Wrong MachineOperand accessor"); 351 IsImp = Val; 352 } 353 354 void setIsKill(bool Val = true) { 355 assert(isReg() && !IsDef && "Wrong MachineOperand accessor"); 356 assert((!Val || !isDebug()) && "Marking a debug operation as kill"); 357 IsKill = Val; 358 } 359 360 void setIsDead(bool Val = true) { 361 assert(isReg() && IsDef && "Wrong MachineOperand accessor"); 362 IsDead = Val; 363 } 364 365 void setIsUndef(bool Val = true) { 366 assert(isReg() && "Wrong MachineOperand accessor"); 367 IsUndef = Val; 368 } 369 370 void setIsInternalRead(bool Val = true) { 371 assert(isReg() && "Wrong MachineOperand accessor"); 372 IsInternalRead = Val; 373 } 374 375 void setIsEarlyClobber(bool Val = true) { 376 assert(isReg() && IsDef && "Wrong MachineOperand accessor"); 377 IsEarlyClobber = Val; 378 } 379 380 void setIsDebug(bool Val = true) { 381 assert(isReg() && IsDef && "Wrong MachineOperand accessor"); 382 IsDebug = Val; 383 } 384 385 //===--------------------------------------------------------------------===// 386 // Accessors for various operand types. 387 //===--------------------------------------------------------------------===// 388 389 int64_t getImm() const { 390 assert(isImm() && "Wrong MachineOperand accessor"); 391 return Contents.ImmVal; 392 } 393 394 const ConstantInt *getCImm() const { 395 assert(isCImm() && "Wrong MachineOperand accessor"); 396 return Contents.CI; 397 } 398 399 const ConstantFP *getFPImm() const { 400 assert(isFPImm() && "Wrong MachineOperand accessor"); 401 return Contents.CFP; 402 } 403 404 MachineBasicBlock *getMBB() const { 405 assert(isMBB() && "Wrong MachineOperand accessor"); 406 return Contents.MBB; 407 } 408 409 int getIndex() const { 410 assert((isFI() || isCPI() || isJTI()) && 411 "Wrong MachineOperand accessor"); 412 return Contents.OffsetedInfo.Val.Index; 413 } 414 415 const GlobalValue *getGlobal() const { 416 assert(isGlobal() && "Wrong MachineOperand accessor"); 417 return Contents.OffsetedInfo.Val.GV; 418 } 419 420 const BlockAddress *getBlockAddress() const { 421 assert(isBlockAddress() && "Wrong MachineOperand accessor"); 422 return Contents.OffsetedInfo.Val.BA; 423 } 424 425 MCSymbol *getMCSymbol() const { 426 assert(isMCSymbol() && "Wrong MachineOperand accessor"); 427 return Contents.Sym; 428 } 429 430 /// getOffset - Return the offset from the symbol in this operand. This always 431 /// returns 0 for ExternalSymbol operands. 432 int64_t getOffset() const { 433 assert((isGlobal() || isSymbol() || isCPI() || isBlockAddress()) && 434 "Wrong MachineOperand accessor"); 435 return (int64_t(Contents.OffsetedInfo.OffsetHi) << 32) | 436 SmallContents.OffsetLo; 437 } 438 439 const char *getSymbolName() const { 440 assert(isSymbol() && "Wrong MachineOperand accessor"); 441 return Contents.OffsetedInfo.Val.SymbolName; 442 } 443 444 /// clobbersPhysReg - Returns true if this RegMask clobbers PhysReg. 445 /// It is sometimes necessary to detach the register mask pointer from its 446 /// machine operand. This static method can be used for such detached bit 447 /// mask pointers. clobbersPhysReg - Returns true if this RegMask operand 448 /// clobbers PhysReg. 449 static bool clobbersPhysReg(const uint32_t *RegMask, unsigned PhysReg) { 450 // See TargetRegisterInfo.h. 451 assert(PhysReg < (1u << 30) && "Not a physical register"); 452 return !(RegMask[PhysReg / 32] & (1u << PhysReg % 32)); 453 } 454 455 /// clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg. 456 bool clobbersPhysReg(unsigned PhysReg) const { 457 return clobbersPhysReg(getRegMask(), PhysReg); 458 } 459 460 /// getRegMask - Returns a bit mask of registers preserved by this RegMask 461 /// operand. 462 const uint32_t *getRegMask() const { 463 assert(isRegMask() && "Wrong MachineOperand accessor"); 464 return Contents.RegMask; 465 } 466 467 const MDNode *getMetadata() const { 468 assert(isMetadata() && "Wrong MachineOperand accessor"); 469 return Contents.MD; 470 } 471 472 //===--------------------------------------------------------------------===// 473 // Mutators for various operand types. 474 //===--------------------------------------------------------------------===// 475 476 void setImm(int64_t immVal) { 477 assert(isImm() && "Wrong MachineOperand mutator"); 478 Contents.ImmVal = immVal; 479 } 480 481 void setOffset(int64_t Offset) { 482 assert((isGlobal() || isSymbol() || isCPI() || isBlockAddress()) && 483 "Wrong MachineOperand accessor"); 484 SmallContents.OffsetLo = unsigned(Offset); 485 Contents.OffsetedInfo.OffsetHi = int(Offset >> 32); 486 } 487 488 void setIndex(int Idx) { 489 assert((isFI() || isCPI() || isJTI()) && 490 "Wrong MachineOperand accessor"); 491 Contents.OffsetedInfo.Val.Index = Idx; 492 } 493 494 void setMBB(MachineBasicBlock *MBB) { 495 assert(isMBB() && "Wrong MachineOperand accessor"); 496 Contents.MBB = MBB; 497 } 498 499 //===--------------------------------------------------------------------===// 500 // Other methods. 501 //===--------------------------------------------------------------------===// 502 503 /// isIdenticalTo - Return true if this operand is identical to the specified 504 /// operand. Note: This method ignores isKill and isDead properties. 505 bool isIdenticalTo(const MachineOperand &Other) const; 506 507 /// ChangeToImmediate - Replace this operand with a new immediate operand of 508 /// the specified value. If an operand is known to be an immediate already, 509 /// the setImm method should be used. 510 void ChangeToImmediate(int64_t ImmVal); 511 512 /// ChangeToRegister - Replace this operand with a new register operand of 513 /// the specified value. If an operand is known to be an register already, 514 /// the setReg method should be used. 515 void ChangeToRegister(unsigned Reg, bool isDef, bool isImp = false, 516 bool isKill = false, bool isDead = false, 517 bool isUndef = false, bool isDebug = false); 518 519 //===--------------------------------------------------------------------===// 520 // Construction methods. 521 //===--------------------------------------------------------------------===// 522 523 static MachineOperand CreateImm(int64_t Val) { 524 MachineOperand Op(MachineOperand::MO_Immediate); 525 Op.setImm(Val); 526 return Op; 527 } 528 529 static MachineOperand CreateCImm(const ConstantInt *CI) { 530 MachineOperand Op(MachineOperand::MO_CImmediate); 531 Op.Contents.CI = CI; 532 return Op; 533 } 534 535 static MachineOperand CreateFPImm(const ConstantFP *CFP) { 536 MachineOperand Op(MachineOperand::MO_FPImmediate); 537 Op.Contents.CFP = CFP; 538 return Op; 539 } 540 541 static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp = false, 542 bool isKill = false, bool isDead = false, 543 bool isUndef = false, 544 bool isEarlyClobber = false, 545 unsigned SubReg = 0, 546 bool isDebug = false) { 547 MachineOperand Op(MachineOperand::MO_Register); 548 Op.IsDef = isDef; 549 Op.IsImp = isImp; 550 Op.IsKill = isKill; 551 Op.IsDead = isDead; 552 Op.IsUndef = isUndef; 553 Op.IsInternalRead = false; 554 Op.IsEarlyClobber = isEarlyClobber; 555 Op.IsDebug = isDebug; 556 Op.SmallContents.RegNo = Reg; 557 Op.Contents.Reg.Prev = 0; 558 Op.Contents.Reg.Next = 0; 559 Op.SubReg = SubReg; 560 return Op; 561 } 562 static MachineOperand CreateMBB(MachineBasicBlock *MBB, 563 unsigned char TargetFlags = 0) { 564 MachineOperand Op(MachineOperand::MO_MachineBasicBlock); 565 Op.setMBB(MBB); 566 Op.setTargetFlags(TargetFlags); 567 return Op; 568 } 569 static MachineOperand CreateFI(int Idx) { 570 MachineOperand Op(MachineOperand::MO_FrameIndex); 571 Op.setIndex(Idx); 572 return Op; 573 } 574 static MachineOperand CreateCPI(unsigned Idx, int Offset, 575 unsigned char TargetFlags = 0) { 576 MachineOperand Op(MachineOperand::MO_ConstantPoolIndex); 577 Op.setIndex(Idx); 578 Op.setOffset(Offset); 579 Op.setTargetFlags(TargetFlags); 580 return Op; 581 } 582 static MachineOperand CreateJTI(unsigned Idx, 583 unsigned char TargetFlags = 0) { 584 MachineOperand Op(MachineOperand::MO_JumpTableIndex); 585 Op.setIndex(Idx); 586 Op.setTargetFlags(TargetFlags); 587 return Op; 588 } 589 static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset, 590 unsigned char TargetFlags = 0) { 591 MachineOperand Op(MachineOperand::MO_GlobalAddress); 592 Op.Contents.OffsetedInfo.Val.GV = GV; 593 Op.setOffset(Offset); 594 Op.setTargetFlags(TargetFlags); 595 return Op; 596 } 597 static MachineOperand CreateES(const char *SymName, 598 unsigned char TargetFlags = 0) { 599 MachineOperand Op(MachineOperand::MO_ExternalSymbol); 600 Op.Contents.OffsetedInfo.Val.SymbolName = SymName; 601 Op.setOffset(0); // Offset is always 0. 602 Op.setTargetFlags(TargetFlags); 603 return Op; 604 } 605 static MachineOperand CreateBA(const BlockAddress *BA, 606 unsigned char TargetFlags = 0) { 607 MachineOperand Op(MachineOperand::MO_BlockAddress); 608 Op.Contents.OffsetedInfo.Val.BA = BA; 609 Op.setOffset(0); // Offset is always 0. 610 Op.setTargetFlags(TargetFlags); 611 return Op; 612 } 613 /// CreateRegMask - Creates a register mask operand referencing Mask. The 614 /// operand does not take ownership of the memory referenced by Mask, it must 615 /// remain valid for the lifetime of the operand. 616 /// 617 /// A RegMask operand represents a set of non-clobbered physical registers on 618 /// an instruction that clobbers many registers, typically a call. The bit 619 /// mask has a bit set for each physreg that is preserved by this 620 /// instruction, as described in the documentation for 621 /// TargetRegisterInfo::getCallPreservedMask(). 622 /// 623 /// Any physreg with a 0 bit in the mask is clobbered by the instruction. 624 /// 625 static MachineOperand CreateRegMask(const uint32_t *Mask) { 626 assert(Mask && "Missing register mask"); 627 MachineOperand Op(MachineOperand::MO_RegisterMask); 628 Op.Contents.RegMask = Mask; 629 return Op; 630 } 631 static MachineOperand CreateMetadata(const MDNode *Meta) { 632 MachineOperand Op(MachineOperand::MO_Metadata); 633 Op.Contents.MD = Meta; 634 return Op; 635 } 636 637 static MachineOperand CreateMCSymbol(MCSymbol *Sym) { 638 MachineOperand Op(MachineOperand::MO_MCSymbol); 639 Op.Contents.Sym = Sym; 640 return Op; 641 } 642 643 friend class MachineInstr; 644 friend class MachineRegisterInfo; 645private: 646 //===--------------------------------------------------------------------===// 647 // Methods for handling register use/def lists. 648 //===--------------------------------------------------------------------===// 649 650 /// isOnRegUseList - Return true if this operand is on a register use/def list 651 /// or false if not. This can only be called for register operands that are 652 /// part of a machine instruction. 653 bool isOnRegUseList() const { 654 assert(isReg() && "Can only add reg operand to use lists"); 655 return Contents.Reg.Prev != 0; 656 } 657 658 /// AddRegOperandToRegInfo - Add this register operand to the specified 659 /// MachineRegisterInfo. If it is null, then the next/prev fields should be 660 /// explicitly nulled out. 661 void AddRegOperandToRegInfo(MachineRegisterInfo *RegInfo); 662 663 /// RemoveRegOperandFromRegInfo - Remove this register operand from the 664 /// MachineRegisterInfo it is linked with. 665 void RemoveRegOperandFromRegInfo(); 666}; 667 668inline raw_ostream &operator<<(raw_ostream &OS, const MachineOperand& MO) { 669 MO.print(OS, 0); 670 return OS; 671} 672 673} // End llvm namespace 674 675#endif 676