1//===-- llvm/InlineAsm.h - Class to represent inline asm strings-*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This class represents the inline asm strings, which are Value*'s that are
11// used as the callee operand of call instructions.  InlineAsm's are uniqued
12// like constants, and created via InlineAsm::get(...).
13//
14//===----------------------------------------------------------------------===//
15
16#ifndef LLVM_IR_INLINEASM_H
17#define LLVM_IR_INLINEASM_H
18
19#include "llvm/ADT/StringRef.h"
20#include "llvm/IR/Value.h"
21#include <vector>
22
23namespace llvm {
24
25class PointerType;
26class FunctionType;
27class Module;
28struct InlineAsmKeyType;
29template<class ValType, class ValRefType, class TypeClass, class ConstantClass,
30         bool HasLargeKey>
31class ConstantUniqueMap;
32template<class ConstantClass, class TypeClass, class ValType>
33struct ConstantCreator;
34
35class InlineAsm : public Value {
36public:
37  enum AsmDialect {
38    AD_ATT,
39    AD_Intel
40  };
41
42private:
43  friend struct ConstantCreator<InlineAsm, PointerType, InlineAsmKeyType>;
44  friend class ConstantUniqueMap<InlineAsmKeyType, const InlineAsmKeyType&,
45                                 PointerType, InlineAsm, false>;
46
47  InlineAsm(const InlineAsm &) LLVM_DELETED_FUNCTION;
48  void operator=(const InlineAsm&) LLVM_DELETED_FUNCTION;
49
50  std::string AsmString, Constraints;
51  bool HasSideEffects;
52  bool IsAlignStack;
53  AsmDialect Dialect;
54
55  InlineAsm(PointerType *Ty, const std::string &AsmString,
56            const std::string &Constraints, bool hasSideEffects,
57            bool isAlignStack, AsmDialect asmDialect);
58  virtual ~InlineAsm();
59
60  /// When the ConstantUniqueMap merges two types and makes two InlineAsms
61  /// identical, it destroys one of them with this method.
62  void destroyConstant();
63public:
64
65  /// InlineAsm::get - Return the specified uniqued inline asm string.
66  ///
67  static InlineAsm *get(FunctionType *Ty, StringRef AsmString,
68                        StringRef Constraints, bool hasSideEffects,
69                        bool isAlignStack = false,
70                        AsmDialect asmDialect = AD_ATT);
71
72  bool hasSideEffects() const { return HasSideEffects; }
73  bool isAlignStack() const { return IsAlignStack; }
74  AsmDialect getDialect() const { return Dialect; }
75
76  /// getType - InlineAsm's are always pointers.
77  ///
78  PointerType *getType() const {
79    return reinterpret_cast<PointerType*>(Value::getType());
80  }
81
82  /// getFunctionType - InlineAsm's are always pointers to functions.
83  ///
84  FunctionType *getFunctionType() const;
85
86  const std::string &getAsmString() const { return AsmString; }
87  const std::string &getConstraintString() const { return Constraints; }
88
89  /// Verify - This static method can be used by the parser to check to see if
90  /// the specified constraint string is legal for the type.  This returns true
91  /// if legal, false if not.
92  ///
93  static bool Verify(FunctionType *Ty, StringRef Constraints);
94
95  // Constraint String Parsing
96  enum ConstraintPrefix {
97    isInput,            // 'x'
98    isOutput,           // '=x'
99    isClobber           // '~x'
100  };
101
102  typedef std::vector<std::string> ConstraintCodeVector;
103
104  struct SubConstraintInfo {
105    /// MatchingInput - If this is not -1, this is an output constraint where an
106    /// input constraint is required to match it (e.g. "0").  The value is the
107    /// constraint number that matches this one (for example, if this is
108    /// constraint #0 and constraint #4 has the value "0", this will be 4).
109    signed char MatchingInput;
110    /// Code - The constraint code, either the register name (in braces) or the
111    /// constraint letter/number.
112    ConstraintCodeVector Codes;
113    /// Default constructor.
114    SubConstraintInfo() : MatchingInput(-1) {}
115  };
116
117  typedef std::vector<SubConstraintInfo> SubConstraintInfoVector;
118  struct ConstraintInfo;
119  typedef std::vector<ConstraintInfo> ConstraintInfoVector;
120
121  struct ConstraintInfo {
122    /// Type - The basic type of the constraint: input/output/clobber
123    ///
124    ConstraintPrefix Type;
125
126    /// isEarlyClobber - "&": output operand writes result before inputs are all
127    /// read.  This is only ever set for an output operand.
128    bool isEarlyClobber;
129
130    /// MatchingInput - If this is not -1, this is an output constraint where an
131    /// input constraint is required to match it (e.g. "0").  The value is the
132    /// constraint number that matches this one (for example, if this is
133    /// constraint #0 and constraint #4 has the value "0", this will be 4).
134    signed char MatchingInput;
135
136    /// hasMatchingInput - Return true if this is an output constraint that has
137    /// a matching input constraint.
138    bool hasMatchingInput() const { return MatchingInput != -1; }
139
140    /// isCommutative - This is set to true for a constraint that is commutative
141    /// with the next operand.
142    bool isCommutative;
143
144    /// isIndirect - True if this operand is an indirect operand.  This means
145    /// that the address of the source or destination is present in the call
146    /// instruction, instead of it being returned or passed in explicitly.  This
147    /// is represented with a '*' in the asm string.
148    bool isIndirect;
149
150    /// Code - The constraint code, either the register name (in braces) or the
151    /// constraint letter/number.
152    ConstraintCodeVector Codes;
153
154    /// isMultipleAlternative - '|': has multiple-alternative constraints.
155    bool isMultipleAlternative;
156
157    /// multipleAlternatives - If there are multiple alternative constraints,
158    /// this array will contain them.  Otherwise it will be empty.
159    SubConstraintInfoVector multipleAlternatives;
160
161    /// The currently selected alternative constraint index.
162    unsigned currentAlternativeIndex;
163
164    ///Default constructor.
165    ConstraintInfo();
166
167    /// Parse - Analyze the specified string (e.g. "=*&{eax}") and fill in the
168    /// fields in this structure.  If the constraint string is not understood,
169    /// return true, otherwise return false.
170    bool Parse(StringRef Str, ConstraintInfoVector &ConstraintsSoFar);
171
172    /// selectAlternative - Point this constraint to the alternative constraint
173    /// indicated by the index.
174    void selectAlternative(unsigned index);
175  };
176
177  /// ParseConstraints - Split up the constraint string into the specific
178  /// constraints and their prefixes.  If this returns an empty vector, and if
179  /// the constraint string itself isn't empty, there was an error parsing.
180  static ConstraintInfoVector ParseConstraints(StringRef ConstraintString);
181
182  /// ParseConstraints - Parse the constraints of this inlineasm object,
183  /// returning them the same way that ParseConstraints(str) does.
184  ConstraintInfoVector ParseConstraints() const {
185    return ParseConstraints(Constraints);
186  }
187
188  // Methods for support type inquiry through isa, cast, and dyn_cast:
189  static inline bool classof(const Value *V) {
190    return V->getValueID() == Value::InlineAsmVal;
191  }
192
193
194  // These are helper methods for dealing with flags in the INLINEASM SDNode
195  // in the backend.
196
197  enum : uint32_t {
198    // Fixed operands on an INLINEASM SDNode.
199    Op_InputChain = 0,
200    Op_AsmString = 1,
201    Op_MDNode = 2,
202    Op_ExtraInfo = 3,    // HasSideEffects, IsAlignStack, AsmDialect.
203    Op_FirstOperand = 4,
204
205    // Fixed operands on an INLINEASM MachineInstr.
206    MIOp_AsmString = 0,
207    MIOp_ExtraInfo = 1,    // HasSideEffects, IsAlignStack, AsmDialect.
208    MIOp_FirstOperand = 2,
209
210    // Interpretation of the MIOp_ExtraInfo bit field.
211    Extra_HasSideEffects = 1,
212    Extra_IsAlignStack = 2,
213    Extra_AsmDialect = 4,
214    Extra_MayLoad = 8,
215    Extra_MayStore = 16,
216
217    // Inline asm operands map to multiple SDNode / MachineInstr operands.
218    // The first operand is an immediate describing the asm operand, the low
219    // bits is the kind:
220    Kind_RegUse = 1,             // Input register, "r".
221    Kind_RegDef = 2,             // Output register, "=r".
222    Kind_RegDefEarlyClobber = 3, // Early-clobber output register, "=&r".
223    Kind_Clobber = 4,            // Clobbered register, "~r".
224    Kind_Imm = 5,                // Immediate.
225    Kind_Mem = 6,                // Memory operand, "m".
226
227    Flag_MatchingOperand = 0x80000000
228  };
229
230  static unsigned getFlagWord(unsigned Kind, unsigned NumOps) {
231    assert(((NumOps << 3) & ~0xffff) == 0 && "Too many inline asm operands!");
232    assert(Kind >= Kind_RegUse && Kind <= Kind_Mem && "Invalid Kind");
233    return Kind | (NumOps << 3);
234  }
235
236  /// getFlagWordForMatchingOp - Augment an existing flag word returned by
237  /// getFlagWord with information indicating that this input operand is tied
238  /// to a previous output operand.
239  static unsigned getFlagWordForMatchingOp(unsigned InputFlag,
240                                           unsigned MatchedOperandNo) {
241    assert(MatchedOperandNo <= 0x7fff && "Too big matched operand");
242    assert((InputFlag & ~0xffff) == 0 && "High bits already contain data");
243    return InputFlag | Flag_MatchingOperand | (MatchedOperandNo << 16);
244  }
245
246  /// getFlagWordForRegClass - Augment an existing flag word returned by
247  /// getFlagWord with the required register class for the following register
248  /// operands.
249  /// A tied use operand cannot have a register class, use the register class
250  /// from the def operand instead.
251  static unsigned getFlagWordForRegClass(unsigned InputFlag, unsigned RC) {
252    // Store RC + 1, reserve the value 0 to mean 'no register class'.
253    ++RC;
254    assert(RC <= 0x7fff && "Too large register class ID");
255    assert((InputFlag & ~0xffff) == 0 && "High bits already contain data");
256    return InputFlag | (RC << 16);
257  }
258
259  static unsigned getKind(unsigned Flags) {
260    return Flags & 7;
261  }
262
263  static bool isRegDefKind(unsigned Flag){ return getKind(Flag) == Kind_RegDef;}
264  static bool isImmKind(unsigned Flag) { return getKind(Flag) == Kind_Imm; }
265  static bool isMemKind(unsigned Flag) { return getKind(Flag) == Kind_Mem; }
266  static bool isRegDefEarlyClobberKind(unsigned Flag) {
267    return getKind(Flag) == Kind_RegDefEarlyClobber;
268  }
269  static bool isClobberKind(unsigned Flag) {
270    return getKind(Flag) == Kind_Clobber;
271  }
272
273  /// getNumOperandRegisters - Extract the number of registers field from the
274  /// inline asm operand flag.
275  static unsigned getNumOperandRegisters(unsigned Flag) {
276    return (Flag & 0xffff) >> 3;
277  }
278
279  /// isUseOperandTiedToDef - Return true if the flag of the inline asm
280  /// operand indicates it is an use operand that's matched to a def operand.
281  static bool isUseOperandTiedToDef(unsigned Flag, unsigned &Idx) {
282    if ((Flag & Flag_MatchingOperand) == 0)
283      return false;
284    Idx = (Flag & ~Flag_MatchingOperand) >> 16;
285    return true;
286  }
287
288  /// hasRegClassConstraint - Returns true if the flag contains a register
289  /// class constraint.  Sets RC to the register class ID.
290  static bool hasRegClassConstraint(unsigned Flag, unsigned &RC) {
291    if (Flag & Flag_MatchingOperand)
292      return false;
293    unsigned High = Flag >> 16;
294    // getFlagWordForRegClass() uses 0 to mean no register class, and otherwise
295    // stores RC + 1.
296    if (!High)
297      return false;
298    RC = High - 1;
299    return true;
300  }
301
302};
303
304} // End llvm namespace
305
306#endif
307