IntrinsicsAArch64.td revision beb6afa84397a27e48a9d72ac1d588bc6fcaf564
1//===- IntrinsicsAArch64.td - Defines AArch64 intrinsics -----------*- tablegen -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines all of the AArch64-specific intrinsics.
11//
12//===----------------------------------------------------------------------===//
13
14//===----------------------------------------------------------------------===//
15// Advanced SIMD (NEON)
16
17let TargetPrefix = "aarch64" in {  // All intrinsics start with "llvm.aarch64.".
18
19// Vector Absolute Compare (Floating Point)
20def int_aarch64_neon_vacgeq :
21  Intrinsic<[llvm_v2i64_ty], [llvm_v2f64_ty, llvm_v2f64_ty], [IntrNoMem]>;
22def int_aarch64_neon_vacgtq :
23  Intrinsic<[llvm_v2i64_ty], [llvm_v2f64_ty, llvm_v2f64_ty], [IntrNoMem]>;
24
25// Vector maxNum (Floating Point)
26def int_aarch64_neon_vmaxnm : Neon_2Arg_Intrinsic;
27
28// Vector minNum (Floating Point)
29def int_aarch64_neon_vminnm : Neon_2Arg_Intrinsic;
30
31// Vector Pairwise maxNum (Floating Point)
32def int_aarch64_neon_vpmaxnm : Neon_2Arg_Intrinsic;
33
34// Vector Pairwise minNum (Floating Point)
35def int_aarch64_neon_vpminnm : Neon_2Arg_Intrinsic;
36
37// Vector Multiply Extended (Floating Point)
38def int_aarch64_neon_vmulx : Neon_2Arg_Intrinsic;
39
40class Neon_N2V_Intrinsic
41  : Intrinsic<[llvm_anyvector_ty], [LLVMMatchType<0>, llvm_i32_ty],
42              [IntrNoMem]>;
43class Neon_N3V_Intrinsic
44  : Intrinsic<[llvm_anyvector_ty],
45              [LLVMMatchType<0>, LLVMMatchType<0>, llvm_i32_ty],
46              [IntrNoMem]>;
47class Neon_N2V_Narrow_Intrinsic
48  : Intrinsic<[llvm_anyvector_ty],
49              [LLVMExtendedElementVectorType<0>, llvm_i32_ty],
50              [IntrNoMem]>;
51
52// Vector rounding shift right by immediate (Signed)
53def int_aarch64_neon_vsrshr : Neon_N2V_Intrinsic;
54def int_aarch64_neon_vurshr : Neon_N2V_Intrinsic;
55def int_aarch64_neon_vsqshlu : Neon_N2V_Intrinsic;
56
57def int_aarch64_neon_vsri : Neon_N3V_Intrinsic;
58def int_aarch64_neon_vsli : Neon_N3V_Intrinsic;
59
60def int_aarch64_neon_vsqshrun : Neon_N2V_Narrow_Intrinsic;
61def int_aarch64_neon_vrshrn : Neon_N2V_Narrow_Intrinsic;
62def int_aarch64_neon_vsqrshrun : Neon_N2V_Narrow_Intrinsic;
63def int_aarch64_neon_vsqshrn : Neon_N2V_Narrow_Intrinsic;
64def int_aarch64_neon_vuqshrn : Neon_N2V_Narrow_Intrinsic;
65def int_aarch64_neon_vsqrshrn : Neon_N2V_Narrow_Intrinsic;
66def int_aarch64_neon_vuqrshrn : Neon_N2V_Narrow_Intrinsic;
67
68// Vector across
69class Neon_Across_Intrinsic
70  : Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
71
72class Neon_2Arg_Across_Float_Intrinsic
73  : Intrinsic<[llvm_anyvector_ty], [llvm_v4f32_ty], [IntrNoMem]>;
74
75def int_aarch64_neon_saddlv : Neon_Across_Intrinsic;
76def int_aarch64_neon_uaddlv : Neon_Across_Intrinsic;
77def int_aarch64_neon_smaxv  : Neon_Across_Intrinsic;
78def int_aarch64_neon_umaxv  : Neon_Across_Intrinsic;
79def int_aarch64_neon_sminv  : Neon_Across_Intrinsic;
80def int_aarch64_neon_uminv  : Neon_Across_Intrinsic;
81def int_aarch64_neon_vaddv  : Neon_Across_Intrinsic;
82def int_aarch64_neon_vmaxv  : Neon_Across_Intrinsic;
83def int_aarch64_neon_vminv  : Neon_Across_Intrinsic;
84def int_aarch64_neon_vmaxnmv : Neon_Across_Intrinsic;
85def int_aarch64_neon_vminnmv : Neon_Across_Intrinsic;
86
87// Scalar Add
88def int_aarch64_neon_vaddds :
89  Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
90def int_aarch64_neon_vadddu :
91  Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
92
93// Scalar Saturating Add (Signed, Unsigned)
94def int_aarch64_neon_vqadds : Neon_2Arg_Intrinsic;
95def int_aarch64_neon_vqaddu : Neon_2Arg_Intrinsic;
96
97// Scalar Sub
98def int_aarch64_neon_vsubds :
99  Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
100def int_aarch64_neon_vsubdu :
101  Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
102
103// Scalar Saturating Sub (Signed, Unsigned)
104def int_aarch64_neon_vqsubs : Neon_2Arg_Intrinsic;
105def int_aarch64_neon_vqsubu : Neon_2Arg_Intrinsic;
106
107// Scalar Shift
108// Scalar Shift Left
109def int_aarch64_neon_vshlds :
110  Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
111def int_aarch64_neon_vshldu :
112  Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
113
114// Scalar Saturating Shift Left
115def int_aarch64_neon_vqshls : Neon_2Arg_Intrinsic;
116def int_aarch64_neon_vqshlu : Neon_2Arg_Intrinsic;
117
118// Scalar Shift Rouding Left
119def int_aarch64_neon_vrshlds :
120  Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
121def int_aarch64_neon_vrshldu :
122  Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
123
124// Scalar Saturating Rounding Shift Left
125def int_aarch64_neon_vqrshls : Neon_2Arg_Intrinsic;
126def int_aarch64_neon_vqrshlu : Neon_2Arg_Intrinsic;
127
128// Scalar Reduce Pairwise Add.
129def int_aarch64_neon_vpadd :
130  Intrinsic<[llvm_v1i64_ty], [llvm_v2i64_ty],[IntrNoMem]>;
131def int_aarch64_neon_vpfadd :
132  Intrinsic<[llvm_v1f32_ty], [llvm_v2f32_ty], [IntrNoMem]>;
133def int_aarch64_neon_vpfaddq :
134  Intrinsic<[llvm_v1f64_ty], [llvm_v2f64_ty], [IntrNoMem]>;
135
136// Scalar Reduce Pairwise Floating Point Max/Min.
137def int_aarch64_neon_vpmax :
138  Intrinsic<[llvm_v1f32_ty], [llvm_v2f32_ty], [IntrNoMem]>;
139def int_aarch64_neon_vpmaxq :
140  Intrinsic<[llvm_v1f64_ty], [llvm_v2f64_ty], [IntrNoMem]>;
141def int_aarch64_neon_vpmin :
142  Intrinsic<[llvm_v1f32_ty], [llvm_v2f32_ty], [IntrNoMem]>;
143def int_aarch64_neon_vpminq :
144  Intrinsic<[llvm_v1f64_ty], [llvm_v2f64_ty], [IntrNoMem]>;
145
146// Scalar Reduce Pairwise Floating Point Maxnm/Minnm.
147def int_aarch64_neon_vpfmaxnm :
148  Intrinsic<[llvm_v1f32_ty], [llvm_v2f32_ty], [IntrNoMem]>;
149def int_aarch64_neon_vpfmaxnmq :
150  Intrinsic<[llvm_v1f64_ty], [llvm_v2f64_ty], [IntrNoMem]>;
151def int_aarch64_neon_vpfminnm :
152  Intrinsic<[llvm_v1f32_ty], [llvm_v2f32_ty], [IntrNoMem]>;
153def int_aarch64_neon_vpfminnmq :
154  Intrinsic<[llvm_v1f64_ty], [llvm_v2f64_ty], [IntrNoMem]>;
155}
156