MCInst.h revision 0437ef6510795353a405cd6e119a2175d65fe0d1 
1//===-- llvm/MC/MCInst.h - MCInst class -------------------------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the declaration of the MCInst and MCOperand classes, which
11// is the basic representation used to represent low-level machine code
12// instructions.
13//
14//===----------------------------------------------------------------------===//
15
16#ifndef LLVM_MC_MCINST_H
17#define LLVM_MC_MCINST_H
18
19#include "llvm/ADT/SmallVector.h"
20#include "llvm/ADT/StringRef.h"
21#include "llvm/Support/DataTypes.h"
22#include "llvm/Support/SMLoc.h"
23
24namespace llvm {
25class raw_ostream;
26class MCAsmInfo;
27class MCInstPrinter;
28class MCExpr;
29class MCInst;
30
31/// MCOperand - Instances of this class represent operands of the MCInst class.
32/// This is a simple discriminated union.
33class MCOperand {
34  enum MachineOperandType {
35    kInvalid,                 ///< Uninitialized.
36    kRegister,                ///< Register operand.
37    kImmediate,               ///< Immediate operand.
38    kFPImmediate,             ///< Floating-point immediate operand.
39    kExpr,                    ///< Relocatable immediate operand.
40    kInst                     ///< Sub-instruction operand.
41  };
42  unsigned char Kind;
43
44  union {
45    unsigned RegVal;
46    int64_t ImmVal;
47    double FPImmVal;
48    const MCExpr *ExprVal;
49    const MCInst *InstVal;
50  };
51public:
52
53  MCOperand() : Kind(kInvalid), FPImmVal(0.0) {}
54
55  bool isValid() const { return Kind != kInvalid; }
56  bool isReg() const { return Kind == kRegister; }
57  bool isImm() const { return Kind == kImmediate; }
58  bool isFPImm() const { return Kind == kFPImmediate; }
59  bool isExpr() const { return Kind == kExpr; }
60  bool isInst() const { return Kind == kInst; }
61
62  /// getReg - Returns the register number.
63  unsigned getReg() const {
64    assert(isReg() && "This is not a register operand!");
65    return RegVal;
66  }
67
68  /// setReg - Set the register number.
69  void setReg(unsigned Reg) {
70    assert(isReg() && "This is not a register operand!");
71    RegVal = Reg;
72  }
73
74  int64_t getImm() const {
75    assert(isImm() && "This is not an immediate");
76    return ImmVal;
77  }
78  void setImm(int64_t Val) {
79    assert(isImm() && "This is not an immediate");
80    ImmVal = Val;
81  }
82
83  double getFPImm() const {
84    assert(isFPImm() && "This is not an FP immediate");
85    return FPImmVal;
86  }
87
88  void setFPImm(double Val) {
89    assert(isFPImm() && "This is not an FP immediate");
90    FPImmVal = Val;
91  }
92
93  const MCExpr *getExpr() const {
94    assert(isExpr() && "This is not an expression");
95    return ExprVal;
96  }
97  void setExpr(const MCExpr *Val) {
98    assert(isExpr() && "This is not an expression");
99    ExprVal = Val;
100  }
101
102  const MCInst *getInst() const {
103    assert(isInst() && "This is not a sub-instruction");
104    return InstVal;
105  }
106  void setInst(const MCInst *Val) {
107    assert(isInst() && "This is not a sub-instruction");
108    InstVal = Val;
109  }
110
111  static MCOperand CreateReg(unsigned Reg) {
112    MCOperand Op;
113    Op.Kind = kRegister;
114    Op.RegVal = Reg;
115    return Op;
116  }
117  static MCOperand CreateImm(int64_t Val) {
118    MCOperand Op;
119    Op.Kind = kImmediate;
120    Op.ImmVal = Val;
121    return Op;
122  }
123  static MCOperand CreateFPImm(double Val) {
124    MCOperand Op;
125    Op.Kind = kFPImmediate;
126    Op.FPImmVal = Val;
127    return Op;
128  }
129  static MCOperand CreateExpr(const MCExpr *Val) {
130    MCOperand Op;
131    Op.Kind = kExpr;
132    Op.ExprVal = Val;
133    return Op;
134  }
135  static MCOperand CreateInst(const MCInst *Val) {
136    MCOperand Op;
137    Op.Kind = kInst;
138    Op.InstVal = Val;
139    return Op;
140  }
141
142  void print(raw_ostream &OS, const MCAsmInfo *MAI) const;
143  void dump() const;
144};
145
146template <> struct isPodLike<MCOperand> { static const bool value = true; };
147
148/// MCInst - Instances of this class represent a single low-level machine
149/// instruction.
150class MCInst {
151  unsigned Opcode;
152  SMLoc Loc;
153  SmallVector<MCOperand, 8> Operands;
154public:
155  MCInst() : Opcode(0) {}
156
157  void setOpcode(unsigned Op) { Opcode = Op; }
158  unsigned getOpcode() const { return Opcode; }
159
160  void setLoc(SMLoc loc) { Loc = loc; }
161  SMLoc getLoc() const { return Loc; }
162
163  const MCOperand &getOperand(unsigned i) const { return Operands[i]; }
164  MCOperand &getOperand(unsigned i) { return Operands[i]; }
165  unsigned getNumOperands() const { return Operands.size(); }
166
167  void addOperand(const MCOperand &Op) {
168    Operands.push_back(Op);
169  }
170
171  void clear() { Operands.clear(); }
172  size_t size() { return Operands.size(); }
173
174  typedef SmallVectorImpl<MCOperand>::iterator iterator;
175  iterator begin() { return Operands.begin(); }
176  iterator end()   { return Operands.end();   }
177  iterator insert(iterator I, const MCOperand &Op) {
178    return Operands.insert(I, Op);
179  }
180
181  void print(raw_ostream &OS, const MCAsmInfo *MAI) const;
182  void dump() const;
183
184  /// \brief Dump the MCInst as prettily as possible using the additional MC
185  /// structures, if given. Operators are separated by the \p Separator
186  /// string.
187  void dump_pretty(raw_ostream &OS, const MCAsmInfo *MAI = 0,
188                   const MCInstPrinter *Printer = 0,
189                   StringRef Separator = " ") const;
190};
191
192inline raw_ostream& operator<<(raw_ostream &OS, const MCOperand &MO) {
193  MO.print(OS, 0);
194  return OS;
195}
196
197inline raw_ostream& operator<<(raw_ostream &OS, const MCInst &MI) {
198  MI.print(OS, 0);
199  return OS;
200}
201
202} // end namespace llvm
203
204#endif
205