MCInst.h revision 475370b036a9e355b51c899465efc00532bb3c41 
1//===-- llvm/MC/MCInst.h - MCInst class -------------------------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the declaration of the MCInst and MCOperand classes, which
11// is the basic representation used to represent low-level machine code
12// instructions.
13//
14//===----------------------------------------------------------------------===//
15
16
17#ifndef LLVM_MC_MCINST_H
18#define LLVM_MC_MCINST_H
19
20#include "llvm/ADT/SmallVector.h"
21
22namespace llvm {
23
24/// MCOperand - Instances of this class represent operands of the MCInst class.
25/// This is a simple discriminated union.
26class MCOperand {
27  enum MachineOperandType {
28    kInvalid,                 ///< Uninitialized.
29    kRegister,                ///< Register operand.
30    kImmediate                ///< Immediate operand.
31  };
32  unsigned char Kind;
33
34  union {
35    unsigned RegVal;
36    uint64_t ImmVal;
37  };
38public:
39
40  MCOperand() : Kind(kInvalid) {}
41  MCOperand(const MCOperand &RHS) { *this = RHS; }
42
43  bool isReg() const { return Kind == kRegister; }
44  bool isImm() const { return Kind == kImmediate; }
45
46  /// getReg - Returns the register number.
47  unsigned getReg() const {
48    assert(isReg() && "This is not a register operand!");
49    return RegVal;
50  }
51
52  /// setReg - Set the register number.
53  void setReg(unsigned Reg) {
54    assert(isReg() && "This is not a register operand!");
55    RegVal = Reg;
56  }
57
58  uint64_t getImm() const {
59    assert(isImm() && "This is not an immediate");
60    return ImmVal;
61  }
62  void setImm(uint64_t Val) {
63    assert(isImm() && "This is not an immediate");
64    ImmVal = Val;
65  }
66
67  void MakeReg(unsigned Reg) {
68    Kind = kRegister;
69    RegVal = Reg;
70  }
71  void MakeImm(uint64_t Val) {
72    Kind = kImmediate;
73    ImmVal = Val;
74  }
75};
76
77
78/// MCInst - Instances of this class represent a single low-level machine
79/// instruction.
80class MCInst {
81  unsigned Opcode;
82  SmallVector<MCOperand, 8> Operands;
83public:
84  MCInst() : Opcode(~0U) {}
85
86
87
88};
89
90
91} // end namespace llvm
92
93#endif
94