MCInst.h revision 8ebf83b2cc67e53ac55d5022dc3866c13df88c69
1//===-- llvm/MC/MCInst.h - MCInst class -------------------------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file contains the declaration of the MCInst and MCOperand classes, which 11// is the basic representation used to represent low-level machine code 12// instructions. 13// 14//===----------------------------------------------------------------------===// 15 16 17#ifndef LLVM_MC_MCINST_H 18#define LLVM_MC_MCINST_H 19 20#include "llvm/ADT/SmallVector.h" 21#include "llvm/Support/DataTypes.h" 22 23namespace llvm { 24 25/// MCOperand - Instances of this class represent operands of the MCInst class. 26/// This is a simple discriminated union. 27class MCOperand { 28 enum MachineOperandType { 29 kInvalid, ///< Uninitialized. 30 kRegister, ///< Register operand. 31 kImmediate ///< Immediate operand. 32 }; 33 unsigned char Kind; 34 35 union { 36 unsigned RegVal; 37 uint64_t ImmVal; 38 }; 39public: 40 41 MCOperand() : Kind(kInvalid) {} 42 MCOperand(const MCOperand &RHS) { *this = RHS; } 43 44 bool isReg() const { return Kind == kRegister; } 45 bool isImm() const { return Kind == kImmediate; } 46 47 /// getReg - Returns the register number. 48 unsigned getReg() const { 49 assert(isReg() && "This is not a register operand!"); 50 return RegVal; 51 } 52 53 /// setReg - Set the register number. 54 void setReg(unsigned Reg) { 55 assert(isReg() && "This is not a register operand!"); 56 RegVal = Reg; 57 } 58 59 uint64_t getImm() const { 60 assert(isImm() && "This is not an immediate"); 61 return ImmVal; 62 } 63 void setImm(uint64_t Val) { 64 assert(isImm() && "This is not an immediate"); 65 ImmVal = Val; 66 } 67 68 void MakeReg(unsigned Reg) { 69 Kind = kRegister; 70 RegVal = Reg; 71 } 72 void MakeImm(uint64_t Val) { 73 Kind = kImmediate; 74 ImmVal = Val; 75 } 76}; 77 78 79/// MCInst - Instances of this class represent a single low-level machine 80/// instruction. 81class MCInst { 82 unsigned Opcode; 83 SmallVector<MCOperand, 8> Operands; 84public: 85 MCInst() : Opcode(~0U) {} 86 87 88 89}; 90 91 92} // end namespace llvm 93 94#endif 95