MCSubtargetInfo.h revision 2661b411ccc81b1fe19194d3f43b2630cbef3f28 
1//==-- llvm/MC/MCSubtargetInfo.h - Subtarget Information ---------*- C++ -*-==//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file describes the subtarget options of a Target machine.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_MC_MCSUBTARGET_H
15#define LLVM_MC_MCSUBTARGET_H
16
17#include "llvm/MC/SubtargetFeature.h"
18#include "llvm/MC/MCInstrItineraries.h"
19#include <string>
20
21namespace llvm {
22
23class StringRef;
24
25//===----------------------------------------------------------------------===//
26///
27/// MCSubtargetInfo - Generic base class for all target subtargets.
28///
29class MCSubtargetInfo {
30  std::string TargetTriple;            // Target triple
31  const SubtargetFeatureKV *ProcFeatures;  // Processor feature list
32  const SubtargetFeatureKV *ProcDesc;  // Processor descriptions
33  const SubtargetInfoKV *ProcSchedModel; // Scheduler machine model
34  const InstrStage *Stages;            // Instruction itinerary stages
35  const unsigned *OperandCycles;       // Itinerary operand cycles
36  const unsigned *ForwardingPaths;     // Forwarding paths
37  unsigned NumFeatures;                // Number of processor features
38  unsigned NumProcs;                   // Number of processors
39  uint64_t FeatureBits;                // Feature bits for current CPU + FS
40
41public:
42  void InitMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS,
43                           const SubtargetFeatureKV *PF,
44                           const SubtargetFeatureKV *PD,
45                           const SubtargetInfoKV *ProcSched,
46                           const InstrStage *IS,
47                           const unsigned *OC, const unsigned *FP,
48                           unsigned NF, unsigned NP);
49
50  /// getTargetTriple - Return the target triple string.
51  StringRef getTargetTriple() const {
52    return TargetTriple;
53  }
54
55  /// getFeatureBits - Return the feature bits.
56  ///
57  uint64_t getFeatureBits() const {
58    return FeatureBits;
59  }
60
61  /// ReInitMCSubtargetInfo - Change CPU (and optionally supplemented with
62  /// feature string), recompute and return feature bits.
63  uint64_t ReInitMCSubtargetInfo(StringRef CPU, StringRef FS);
64
65  /// ToggleFeature - Toggle a feature and returns the re-computed feature
66  /// bits. This version does not change the implied bits.
67  uint64_t ToggleFeature(uint64_t FB);
68
69  /// ToggleFeature - Toggle a feature and returns the re-computed feature
70  /// bits. This version will also change all implied bits.
71  uint64_t ToggleFeature(StringRef FS);
72
73  /// getSchedModelForCPU - Get the machine model of a CPU.
74  ///
75  MCSchedModel *getSchedModelForCPU(StringRef CPU) const;
76
77  /// getInstrItineraryForCPU - Get scheduling itinerary of a CPU.
78  ///
79  InstrItineraryData getInstrItineraryForCPU(StringRef CPU) const;
80};
81
82} // End llvm namespace
83
84#endif
85