MCTargetAsmParser.h revision 36b56886974eae4f9c5ebc96befd3e7bfe5de338 
1//===-- llvm/MC/MCTargetAsmParser.h - Target Assembly Parser ----*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10#ifndef LLVM_MC_TARGETPARSER_H
11#define LLVM_MC_TARGETPARSER_H
12
13#include "llvm/MC/MCExpr.h"
14#include "llvm/MC/MCParser/MCAsmParserExtension.h"
15
16namespace llvm {
17class MCStreamer;
18class StringRef;
19class SMLoc;
20class AsmToken;
21class MCParsedAsmOperand;
22class MCInst;
23template <typename T> class SmallVectorImpl;
24
25enum AsmRewriteKind {
26  AOK_Delete = 0,     // Rewrite should be ignored.
27  AOK_Align,          // Rewrite align as .align.
28  AOK_DotOperator,    // Rewrite a dot operator expression as an immediate.
29                      // E.g., [eax].foo.bar -> [eax].8
30  AOK_Emit,           // Rewrite _emit as .byte.
31  AOK_Imm,            // Rewrite as $$N.
32  AOK_ImmPrefix,      // Add $$ before a parsed Imm.
33  AOK_Input,          // Rewrite in terms of $N.
34  AOK_Output,         // Rewrite in terms of $N.
35  AOK_SizeDirective,  // Add a sizing directive (e.g., dword ptr).
36  AOK_Skip            // Skip emission (e.g., offset/type operators).
37};
38
39const char AsmRewritePrecedence [] = {
40  0, // AOK_Delete
41  1, // AOK_Align
42  1, // AOK_DotOperator
43  1, // AOK_Emit
44  3, // AOK_Imm
45  3, // AOK_ImmPrefix
46  2, // AOK_Input
47  2, // AOK_Output
48  4, // AOK_SizeDirective
49  1  // AOK_Skip
50};
51
52struct AsmRewrite {
53  AsmRewriteKind Kind;
54  SMLoc Loc;
55  unsigned Len;
56  unsigned Val;
57public:
58  AsmRewrite(AsmRewriteKind kind, SMLoc loc, unsigned len = 0, unsigned val = 0)
59    : Kind(kind), Loc(loc), Len(len), Val(val) {}
60};
61
62struct ParseInstructionInfo {
63
64  SmallVectorImpl<AsmRewrite> *AsmRewrites;
65
66  ParseInstructionInfo() : AsmRewrites(0) {}
67  ParseInstructionInfo(SmallVectorImpl<AsmRewrite> *rewrites)
68    : AsmRewrites(rewrites) {}
69
70  ~ParseInstructionInfo() {}
71};
72
73/// MCTargetAsmParser - Generic interface to target specific assembly parsers.
74class MCTargetAsmParser : public MCAsmParserExtension {
75public:
76  enum MatchResultTy {
77    Match_InvalidOperand,
78    Match_MissingFeature,
79    Match_MnemonicFail,
80    Match_Success,
81    FIRST_TARGET_MATCH_RESULT_TY
82  };
83
84private:
85  MCTargetAsmParser(const MCTargetAsmParser &) LLVM_DELETED_FUNCTION;
86  void operator=(const MCTargetAsmParser &) LLVM_DELETED_FUNCTION;
87protected: // Can only create subclasses.
88  MCTargetAsmParser();
89
90  /// AvailableFeatures - The current set of available features.
91  unsigned AvailableFeatures;
92
93  /// ParsingInlineAsm - Are we parsing ms-style inline assembly?
94  bool ParsingInlineAsm;
95
96  /// SemaCallback - The Sema callback implementation.  Must be set when parsing
97  /// ms-style inline assembly.
98  MCAsmParserSemaCallback *SemaCallback;
99
100public:
101  virtual ~MCTargetAsmParser();
102
103  unsigned getAvailableFeatures() const { return AvailableFeatures; }
104  void setAvailableFeatures(unsigned Value) { AvailableFeatures = Value; }
105
106  bool isParsingInlineAsm () { return ParsingInlineAsm; }
107  void setParsingInlineAsm (bool Value) { ParsingInlineAsm = Value; }
108
109  void setSemaCallback(MCAsmParserSemaCallback *Callback) {
110    SemaCallback = Callback;
111  }
112
113  virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc,
114                             SMLoc &EndLoc) = 0;
115
116  /// ParseInstruction - Parse one assembly instruction.
117  ///
118  /// The parser is positioned following the instruction name. The target
119  /// specific instruction parser should parse the entire instruction and
120  /// construct the appropriate MCInst, or emit an error. On success, the entire
121  /// line should be parsed up to and including the end-of-statement token. On
122  /// failure, the parser is not required to read to the end of the line.
123  //
124  /// \param Name - The instruction name.
125  /// \param NameLoc - The source location of the name.
126  /// \param Operands [out] - The list of parsed operands, this returns
127  ///        ownership of them to the caller.
128  /// \return True on failure.
129  virtual bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
130                                SMLoc NameLoc,
131                            SmallVectorImpl<MCParsedAsmOperand*> &Operands) = 0;
132
133  /// ParseDirective - Parse a target specific assembler directive
134  ///
135  /// The parser is positioned following the directive name.  The target
136  /// specific directive parser should parse the entire directive doing or
137  /// recording any target specific work, or return true and do nothing if the
138  /// directive is not target specific. If the directive is specific for
139  /// the target, the entire line is parsed up to and including the
140  /// end-of-statement token and false is returned.
141  ///
142  /// \param DirectiveID - the identifier token of the directive.
143  virtual bool ParseDirective(AsmToken DirectiveID) = 0;
144
145  /// mnemonicIsValid - This returns true if this is a valid mnemonic and false
146  /// otherwise.
147  virtual bool mnemonicIsValid(StringRef Mnemonic, unsigned VariantID) = 0;
148
149  /// MatchAndEmitInstruction - Recognize a series of operands of a parsed
150  /// instruction as an actual MCInst and emit it to the specified MCStreamer.
151  /// This returns false on success and returns true on failure to match.
152  ///
153  /// On failure, the target parser is responsible for emitting a diagnostic
154  /// explaining the match failure.
155  virtual bool
156  MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
157                          SmallVectorImpl<MCParsedAsmOperand*> &Operands,
158                          MCStreamer &Out, unsigned &ErrorInfo,
159                          bool MatchingInlineAsm) = 0;
160
161  /// Allow a target to add special case operand matching for things that
162  /// tblgen doesn't/can't handle effectively. For example, literal
163  /// immediates on ARM. TableGen expects a token operand, but the parser
164  /// will recognize them as immediates.
165  virtual unsigned validateTargetOperandClass(MCParsedAsmOperand *Op,
166                                              unsigned Kind) {
167    return Match_InvalidOperand;
168  }
169
170  /// checkTargetMatchPredicate - Validate the instruction match against
171  /// any complex target predicates not expressible via match classes.
172  virtual unsigned checkTargetMatchPredicate(MCInst &Inst) {
173    return Match_Success;
174  }
175
176  virtual void convertToMapAndConstraints(unsigned Kind,
177                      const SmallVectorImpl<MCParsedAsmOperand*> &Operands) = 0;
178
179  virtual const MCExpr *applyModifierToExpr(const MCExpr *E,
180                                            MCSymbolRefExpr::VariantKind,
181                                            MCContext &Ctx) {
182    return 0;
183  }
184
185  virtual void onLabelParsed(MCSymbol *Symbol) { };
186};
187
188} // End llvm namespace
189
190#endif
191