MCTargetAsmParser.h revision cd81d94322a39503e4a3e87b6ee03d4fcb3465fb 
1//===-- llvm/MC/MCTargetAsmParser.h - Target Assembly Parser ----*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10#ifndef LLVM_MC_TARGETPARSER_H
11#define LLVM_MC_TARGETPARSER_H
12
13#include "llvm/MC/MCExpr.h"
14#include "llvm/MC/MCParser/MCAsmParserExtension.h"
15#include "llvm/MC/MCTargetOptions.h"
16
17#include <memory>
18
19namespace llvm {
20class AsmToken;
21class MCInst;
22class MCParsedAsmOperand;
23class MCStreamer;
24class SMLoc;
25class StringRef;
26template <typename T> class SmallVectorImpl;
27
28typedef SmallVectorImpl<std::unique_ptr<MCParsedAsmOperand>> OperandVector;
29
30enum AsmRewriteKind {
31  AOK_Delete = 0,     // Rewrite should be ignored.
32  AOK_Align,          // Rewrite align as .align.
33  AOK_DotOperator,    // Rewrite a dot operator expression as an immediate.
34                      // E.g., [eax].foo.bar -> [eax].8
35  AOK_Emit,           // Rewrite _emit as .byte.
36  AOK_Imm,            // Rewrite as $$N.
37  AOK_ImmPrefix,      // Add $$ before a parsed Imm.
38  AOK_Input,          // Rewrite in terms of $N.
39  AOK_Output,         // Rewrite in terms of $N.
40  AOK_SizeDirective,  // Add a sizing directive (e.g., dword ptr).
41  AOK_Skip            // Skip emission (e.g., offset/type operators).
42};
43
44const char AsmRewritePrecedence [] = {
45  0, // AOK_Delete
46  1, // AOK_Align
47  1, // AOK_DotOperator
48  1, // AOK_Emit
49  3, // AOK_Imm
50  3, // AOK_ImmPrefix
51  2, // AOK_Input
52  2, // AOK_Output
53  4, // AOK_SizeDirective
54  1  // AOK_Skip
55};
56
57struct AsmRewrite {
58  AsmRewriteKind Kind;
59  SMLoc Loc;
60  unsigned Len;
61  unsigned Val;
62public:
63  AsmRewrite(AsmRewriteKind kind, SMLoc loc, unsigned len = 0, unsigned val = 0)
64    : Kind(kind), Loc(loc), Len(len), Val(val) {}
65};
66
67struct ParseInstructionInfo {
68
69  SmallVectorImpl<AsmRewrite> *AsmRewrites;
70
71  ParseInstructionInfo() : AsmRewrites(nullptr) {}
72  ParseInstructionInfo(SmallVectorImpl<AsmRewrite> *rewrites)
73    : AsmRewrites(rewrites) {}
74
75  ~ParseInstructionInfo() {}
76};
77
78/// MCTargetAsmParser - Generic interface to target specific assembly parsers.
79class MCTargetAsmParser : public MCAsmParserExtension {
80public:
81  enum MatchResultTy {
82    Match_InvalidOperand,
83    Match_MissingFeature,
84    Match_MnemonicFail,
85    Match_Success,
86    FIRST_TARGET_MATCH_RESULT_TY
87  };
88
89private:
90  MCTargetAsmParser(const MCTargetAsmParser &) LLVM_DELETED_FUNCTION;
91  void operator=(const MCTargetAsmParser &) LLVM_DELETED_FUNCTION;
92protected: // Can only create subclasses.
93  MCTargetAsmParser();
94
95  /// AvailableFeatures - The current set of available features.
96  unsigned AvailableFeatures;
97
98  /// ParsingInlineAsm - Are we parsing ms-style inline assembly?
99  bool ParsingInlineAsm;
100
101  /// SemaCallback - The Sema callback implementation.  Must be set when parsing
102  /// ms-style inline assembly.
103  MCAsmParserSemaCallback *SemaCallback;
104
105  /// Set of options which affects instrumentation of inline assembly.
106  MCTargetOptions MCOptions;
107
108public:
109  virtual ~MCTargetAsmParser();
110
111  unsigned getAvailableFeatures() const { return AvailableFeatures; }
112  void setAvailableFeatures(unsigned Value) { AvailableFeatures = Value; }
113
114  bool isParsingInlineAsm () { return ParsingInlineAsm; }
115  void setParsingInlineAsm (bool Value) { ParsingInlineAsm = Value; }
116
117  void setSemaCallback(MCAsmParserSemaCallback *Callback) {
118    SemaCallback = Callback;
119  }
120
121  virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc,
122                             SMLoc &EndLoc) = 0;
123
124  /// ParseInstruction - Parse one assembly instruction.
125  ///
126  /// The parser is positioned following the instruction name. The target
127  /// specific instruction parser should parse the entire instruction and
128  /// construct the appropriate MCInst, or emit an error. On success, the entire
129  /// line should be parsed up to and including the end-of-statement token. On
130  /// failure, the parser is not required to read to the end of the line.
131  //
132  /// \param Name - The instruction name.
133  /// \param NameLoc - The source location of the name.
134  /// \param Operands [out] - The list of parsed operands, this returns
135  ///        ownership of them to the caller.
136  /// \return True on failure.
137  virtual bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
138                                SMLoc NameLoc, OperandVector &Operands) = 0;
139
140  /// ParseDirective - Parse a target specific assembler directive
141  ///
142  /// The parser is positioned following the directive name.  The target
143  /// specific directive parser should parse the entire directive doing or
144  /// recording any target specific work, or return true and do nothing if the
145  /// directive is not target specific. If the directive is specific for
146  /// the target, the entire line is parsed up to and including the
147  /// end-of-statement token and false is returned.
148  ///
149  /// \param DirectiveID - the identifier token of the directive.
150  virtual bool ParseDirective(AsmToken DirectiveID) = 0;
151
152  /// mnemonicIsValid - This returns true if this is a valid mnemonic and false
153  /// otherwise.
154  virtual bool mnemonicIsValid(StringRef Mnemonic, unsigned VariantID) = 0;
155
156  /// MatchAndEmitInstruction - Recognize a series of operands of a parsed
157  /// instruction as an actual MCInst and emit it to the specified MCStreamer.
158  /// This returns false on success and returns true on failure to match.
159  ///
160  /// On failure, the target parser is responsible for emitting a diagnostic
161  /// explaining the match failure.
162  virtual bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
163                                       OperandVector &Operands, MCStreamer &Out,
164                                       unsigned &ErrorInfo,
165                                       bool MatchingInlineAsm) = 0;
166
167  /// Allow a target to add special case operand matching for things that
168  /// tblgen doesn't/can't handle effectively. For example, literal
169  /// immediates on ARM. TableGen expects a token operand, but the parser
170  /// will recognize them as immediates.
171  virtual unsigned validateTargetOperandClass(MCParsedAsmOperand &Op,
172                                              unsigned Kind) {
173    return Match_InvalidOperand;
174  }
175
176  /// checkTargetMatchPredicate - Validate the instruction match against
177  /// any complex target predicates not expressible via match classes.
178  virtual unsigned checkTargetMatchPredicate(MCInst &Inst) {
179    return Match_Success;
180  }
181
182  virtual void convertToMapAndConstraints(unsigned Kind,
183                                          const OperandVector &Operands) = 0;
184
185  virtual const MCExpr *applyModifierToExpr(const MCExpr *E,
186                                            MCSymbolRefExpr::VariantKind,
187                                            MCContext &Ctx) {
188    return nullptr;
189  }
190
191  virtual void onLabelParsed(MCSymbol *Symbol) { };
192};
193
194} // End llvm namespace
195
196#endif
197