MCTargetAsmParser.h revision f63ef914b67593e4b20a0b85e889380c20b41f55 
1//===-- llvm/MC/MCTargetAsmParser.h - Target Assembly Parser ----*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10#ifndef LLVM_MC_TARGETPARSER_H
11#define LLVM_MC_TARGETPARSER_H
12
13#include "llvm/MC/MCParser/MCAsmParserExtension.h"
14
15namespace llvm {
16class MCStreamer;
17class StringRef;
18class SMLoc;
19class AsmToken;
20class MCParsedAsmOperand;
21class MCInst;
22template <typename T> class SmallVectorImpl;
23
24enum AsmRewriteKind {
25  AOK_Delete = 0,     // Rewrite should be ignored.
26  AOK_Align,          // Rewrite align as .align.
27  AOK_DotOperator,    // Rewrite a dot operator expression as an immediate.
28                      // E.g., [eax].foo.bar -> [eax].8
29  AOK_Emit,           // Rewrite _emit as .byte.
30  AOK_Imm,            // Rewrite as $$N.
31  AOK_ImmPrefix,      // Add $$ before a parsed Imm.
32  AOK_Input,          // Rewrite in terms of $N.
33  AOK_Output,         // Rewrite in terms of $N.
34  AOK_SizeDirective,  // Add a sizing directive (e.g., dword ptr).
35  AOK_Skip            // Skip emission (e.g., offset/type operators).
36};
37
38const char AsmRewritePrecedence [] = {
39  0, // AOK_Delete
40  1, // AOK_Align
41  1, // AOK_DotOperator
42  1, // AOK_Emit
43  3, // AOK_Imm
44  3, // AOK_ImmPrefix
45  2, // AOK_Input
46  2, // AOK_Output
47  4, // AOK_SizeDirective
48  1  // AOK_Skip
49};
50
51struct AsmRewrite {
52  AsmRewriteKind Kind;
53  SMLoc Loc;
54  unsigned Len;
55  unsigned Val;
56public:
57  AsmRewrite(AsmRewriteKind kind, SMLoc loc, unsigned len = 0, unsigned val = 0)
58    : Kind(kind), Loc(loc), Len(len), Val(val) {}
59};
60
61struct ParseInstructionInfo {
62
63  SmallVectorImpl<AsmRewrite> *AsmRewrites;
64
65  ParseInstructionInfo() : AsmRewrites(0) {}
66  ParseInstructionInfo(SmallVectorImpl<AsmRewrite> *rewrites)
67    : AsmRewrites(rewrites) {}
68
69  ~ParseInstructionInfo() {}
70};
71
72/// MCTargetAsmParser - Generic interface to target specific assembly parsers.
73class MCTargetAsmParser : public MCAsmParserExtension {
74public:
75  enum MatchResultTy {
76    Match_InvalidOperand,
77    Match_MissingFeature,
78    Match_MnemonicFail,
79    Match_Success,
80    FIRST_TARGET_MATCH_RESULT_TY
81  };
82
83private:
84  MCTargetAsmParser(const MCTargetAsmParser &) LLVM_DELETED_FUNCTION;
85  void operator=(const MCTargetAsmParser &) LLVM_DELETED_FUNCTION;
86protected: // Can only create subclasses.
87  MCTargetAsmParser();
88
89  /// AvailableFeatures - The current set of available features.
90  unsigned AvailableFeatures;
91
92  /// ParsingInlineAsm - Are we parsing ms-style inline assembly?
93  bool ParsingInlineAsm;
94
95  /// SemaCallback - The Sema callback implementation.  Must be set when parsing
96  /// ms-style inline assembly.
97  MCAsmParserSemaCallback *SemaCallback;
98
99public:
100  virtual ~MCTargetAsmParser();
101
102  unsigned getAvailableFeatures() const { return AvailableFeatures; }
103  void setAvailableFeatures(unsigned Value) { AvailableFeatures = Value; }
104
105  bool isParsingInlineAsm () { return ParsingInlineAsm; }
106  void setParsingInlineAsm (bool Value) { ParsingInlineAsm = Value; }
107
108  void setSemaCallback(MCAsmParserSemaCallback *Callback) {
109    SemaCallback = Callback;
110  }
111
112  virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc,
113                             SMLoc &EndLoc) = 0;
114
115  /// ParseInstruction - Parse one assembly instruction.
116  ///
117  /// The parser is positioned following the instruction name. The target
118  /// specific instruction parser should parse the entire instruction and
119  /// construct the appropriate MCInst, or emit an error. On success, the entire
120  /// line should be parsed up to and including the end-of-statement token. On
121  /// failure, the parser is not required to read to the end of the line.
122  //
123  /// \param Name - The instruction name.
124  /// \param NameLoc - The source location of the name.
125  /// \param Operands [out] - The list of parsed operands, this returns
126  ///        ownership of them to the caller.
127  /// \return True on failure.
128  virtual bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
129                                SMLoc NameLoc,
130                            SmallVectorImpl<MCParsedAsmOperand*> &Operands) = 0;
131
132  /// ParseDirective - Parse a target specific assembler directive
133  ///
134  /// The parser is positioned following the directive name.  The target
135  /// specific directive parser should parse the entire directive doing or
136  /// recording any target specific work, or return true and do nothing if the
137  /// directive is not target specific. If the directive is specific for
138  /// the target, the entire line is parsed up to and including the
139  /// end-of-statement token and false is returned.
140  ///
141  /// \param DirectiveID - the identifier token of the directive.
142  virtual bool ParseDirective(AsmToken DirectiveID) = 0;
143
144  /// mnemonicIsValid - This returns true if this is a valid mnemonic and false
145  /// otherwise.
146  virtual bool mnemonicIsValid(StringRef Mnemonic, unsigned VariantID) = 0;
147
148  /// MatchAndEmitInstruction - Recognize a series of operands of a parsed
149  /// instruction as an actual MCInst and emit it to the specified MCStreamer.
150  /// This returns false on success and returns true on failure to match.
151  ///
152  /// On failure, the target parser is responsible for emitting a diagnostic
153  /// explaining the match failure.
154  virtual bool
155  MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
156                          SmallVectorImpl<MCParsedAsmOperand*> &Operands,
157                          MCStreamer &Out, unsigned &ErrorInfo,
158                          bool MatchingInlineAsm) = 0;
159
160  /// Allow a target to add special case operand matching for things that
161  /// tblgen doesn't/can't handle effectively. For example, literal
162  /// immediates on ARM. TableGen expects a token operand, but the parser
163  /// will recognize them as immediates.
164  virtual unsigned validateTargetOperandClass(MCParsedAsmOperand *Op,
165                                              unsigned Kind) {
166    return Match_InvalidOperand;
167  }
168
169  /// checkTargetMatchPredicate - Validate the instruction match against
170  /// any complex target predicates not expressible via match classes.
171  virtual unsigned checkTargetMatchPredicate(MCInst &Inst) {
172    return Match_Success;
173  }
174
175  virtual void convertToMapAndConstraints(unsigned Kind,
176                      const SmallVectorImpl<MCParsedAsmOperand*> &Operands) = 0;
177};
178
179} // End llvm namespace
180
181#endif
182