TargetMachine.h revision 1baa88e3de8947b02d9ef4caa73e5860f048ec6e
1//===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines the TargetMachine and LLVMTargetMachine classes.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_TARGET_TARGETMACHINE_H
15#define LLVM_TARGET_TARGETMACHINE_H
16
17#include "llvm/Target/TargetInstrItineraries.h"
18#include <cassert>
19#include <iosfwd>
20
21namespace llvm {
22
23class TargetAsmInfo;
24class TargetData;
25class TargetSubtarget;
26class TargetInstrInfo;
27class TargetJITInfo;
28class TargetLowering;
29class TargetFrameInfo;
30class MachineCodeEmitter;
31class TargetRegisterInfo;
32class Module;
33class PassManagerBase;
34class PassManager;
35class Pass;
36class TargetMachOWriterInfo;
37class TargetELFWriterInfo;
38
39// Relocation model types.
40namespace Reloc {
41  enum Model {
42    Default,
43    Static,
44    PIC_,         // Cannot be named PIC due to collision with -DPIC
45    DynamicNoPIC
46  };
47}
48
49// Code model types.
50namespace CodeModel {
51  enum Model {
52    Default,
53    Small,
54    Kernel,
55    Medium,
56    Large
57  };
58}
59
60namespace FileModel {
61  enum Model {
62    Error,
63    None,
64    AsmFile,
65    MachOFile,
66    ElfFile
67  };
68}
69
70//===----------------------------------------------------------------------===//
71///
72/// TargetMachine - Primary interface to the complete machine description for
73/// the target machine.  All target-specific information should be accessible
74/// through this interface.
75///
76class TargetMachine {
77  TargetMachine(const TargetMachine &);   // DO NOT IMPLEMENT
78  void operator=(const TargetMachine &);  // DO NOT IMPLEMENT
79protected: // Can only create subclasses.
80  TargetMachine() : AsmInfo(NULL) { }
81
82  /// getSubtargetImpl - virtual method implemented by subclasses that returns
83  /// a reference to that target's TargetSubtarget-derived member variable.
84  virtual const TargetSubtarget *getSubtargetImpl() const { return 0; }
85
86  /// AsmInfo - Contains target specific asm information.
87  ///
88  mutable const TargetAsmInfo *AsmInfo;
89
90  /// createTargetAsmInfo - Create a new instance of target specific asm
91  /// information.
92  virtual const TargetAsmInfo *createTargetAsmInfo() const { return NULL; }
93
94public:
95  virtual ~TargetMachine();
96
97  /// getModuleMatchQuality - This static method should be implemented by
98  /// targets to indicate how closely they match the specified module.  This is
99  /// used by the LLC tool to determine which target to use when an explicit
100  /// -march option is not specified.  If a target returns zero, it will never
101  /// be chosen without an explicit -march option.
102  static unsigned getModuleMatchQuality(const Module &) { return 0; }
103
104  /// getJITMatchQuality - This static method should be implemented by targets
105  /// that provide JIT capabilities to indicate how suitable they are for
106  /// execution on the current host.  If a value of 0 is returned, the target
107  /// will not be used unless an explicit -march option is used.
108  static unsigned getJITMatchQuality() { return 0; }
109
110  // Interfaces to the major aspects of target machine information:
111  // -- Instruction opcode and operand information
112  // -- Pipelines and scheduling information
113  // -- Stack frame information
114  // -- Selection DAG lowering information
115  //
116  virtual const TargetInstrInfo        *getInstrInfo() const { return 0; }
117  virtual const TargetFrameInfo        *getFrameInfo() const { return 0; }
118  virtual       TargetLowering    *getTargetLowering() const { return 0; }
119  virtual const TargetData            *getTargetData() const { return 0; }
120
121
122  /// getTargetAsmInfo - Return target specific asm information.
123  ///
124  const TargetAsmInfo *getTargetAsmInfo() const {
125    if (!AsmInfo) AsmInfo = createTargetAsmInfo();
126    return AsmInfo;
127  }
128
129  /// getSubtarget - This method returns a pointer to the specified type of
130  /// TargetSubtarget.  In debug builds, it verifies that the object being
131  /// returned is of the correct type.
132  template<typename STC> const STC &getSubtarget() const {
133    const TargetSubtarget *TST = getSubtargetImpl();
134    assert(TST && dynamic_cast<const STC*>(TST) &&
135           "Not the right kind of subtarget!");
136    return *static_cast<const STC*>(TST);
137  }
138
139  /// getRegisterInfo - If register information is available, return it.  If
140  /// not, return null.  This is kept separate from RegInfo until RegInfo has
141  /// details of graph coloring register allocation removed from it.
142  ///
143  virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; }
144
145  /// getJITInfo - If this target supports a JIT, return information for it,
146  /// otherwise return null.
147  ///
148  virtual TargetJITInfo *getJITInfo() { return 0; }
149
150  /// getInstrItineraryData - Returns instruction itinerary data for the target
151  /// or specific subtarget.
152  ///
153  virtual const InstrItineraryData getInstrItineraryData() const {
154    return InstrItineraryData();
155  }
156
157  /// getMachOWriterInfo - If this target supports a Mach-O writer, return
158  /// information for it, otherwise return null.
159  ///
160  virtual const TargetMachOWriterInfo *getMachOWriterInfo() const { return 0; }
161
162  /// getELFWriterInfo - If this target supports an ELF writer, return
163  /// information for it, otherwise return null.
164  ///
165  virtual const TargetELFWriterInfo *getELFWriterInfo() const { return 0; }
166
167  /// getRelocationModel - Returns the code generation relocation model. The
168  /// choices are static, PIC, and dynamic-no-pic, and target default.
169  static Reloc::Model getRelocationModel();
170
171  /// setRelocationModel - Sets the code generation relocation model.
172  static void setRelocationModel(Reloc::Model Model);
173
174  /// getCodeModel - Returns the code model. The choices are small, kernel,
175  /// medium, large, and target default.
176  static CodeModel::Model getCodeModel();
177
178  /// setCodeModel - Sets the code model.
179  static void setCodeModel(CodeModel::Model Model);
180
181  /// CodeGenFileType - These enums are meant to be passed into
182  /// addPassesToEmitFile to indicate what type of file to emit.
183  enum CodeGenFileType {
184    AssemblyFile, ObjectFile, DynamicLibrary
185  };
186
187  /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
188  /// on this target.  User flag overrides.
189  virtual bool getEnableTailMergeDefault() const { return true; }
190
191  /// addPassesToEmitFile - Add passes to the specified pass manager to get the
192  /// specified file emitted.  Typically this will involve several steps of code
193  /// generation.  If Fast is set to true, the code generator should emit code
194  /// as fast as possible, though the generated code may be less efficient.
195  /// This method should return FileModel::Error if emission of this file type
196  /// is not supported.
197  ///
198  virtual FileModel::Model addPassesToEmitFile(PassManagerBase &,
199                                               std::ostream &,
200                                               CodeGenFileType,
201                                               bool /*Fast*/) {
202    return FileModel::None;
203  }
204
205  /// addPassesToEmitFileFinish - If the passes to emit the specified file had
206  /// to be split up (e.g., to add an object writer pass), this method can be
207  /// used to finish up adding passes to emit the file, if necessary.
208  ///
209  virtual bool addPassesToEmitFileFinish(PassManagerBase &,
210                                         MachineCodeEmitter *, bool /*Fast*/) {
211    return true;
212  }
213
214  /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
215  /// get machine code emitted.  This uses a MachineCodeEmitter object to handle
216  /// actually outputting the machine code and resolving things like the address
217  /// of functions.  This method returns true if machine code emission is
218  /// not supported.
219  ///
220  virtual bool addPassesToEmitMachineCode(PassManagerBase &,
221                                          MachineCodeEmitter &,
222                                          bool /*Fast*/) {
223    return true;
224  }
225
226  /// addPassesToEmitWholeFile - This method can be implemented by targets that
227  /// require having the entire module at once.  This is not recommended, do not
228  /// use this.
229  virtual bool WantsWholeFile() const { return false; }
230  virtual bool addPassesToEmitWholeFile(PassManager &, std::ostream &,
231                                        CodeGenFileType, bool /*Fast*/) {
232    return true;
233  }
234};
235
236/// LLVMTargetMachine - This class describes a target machine that is
237/// implemented with the LLVM target-independent code generator.
238///
239class LLVMTargetMachine : public TargetMachine {
240protected: // Can only create subclasses.
241    LLVMTargetMachine() { }
242public:
243
244  /// addPassesToEmitFile - Add passes to the specified pass manager to get the
245  /// specified file emitted.  Typically this will involve several steps of code
246  /// generation.  If Fast is set to true, the code generator should emit code
247  /// as fast as possible, though the generated code may be less efficient.
248  /// This method should return FileModel::Error if emission of this file type
249  /// is not supported.
250  ///
251  /// The default implementation of this method adds components from the
252  /// LLVM retargetable code generator, invoking the methods below to get
253  /// target-specific passes in standard locations.
254  ///
255  virtual FileModel::Model addPassesToEmitFile(PassManagerBase &PM,
256                                               std::ostream &Out,
257                                               CodeGenFileType FileType,
258                                               bool Fast);
259
260  /// addPassesToEmitFileFinish - If the passes to emit the specified file had
261  /// to be split up (e.g., to add an object writer pass), this method can be
262  /// used to finish up adding passes to emit the file, if necessary.
263  ///
264  virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
265                                         MachineCodeEmitter *MCE, bool Fast);
266
267  /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
268  /// get machine code emitted.  This uses a MachineCodeEmitter object to handle
269  /// actually outputting the machine code and resolving things like the address
270  /// of functions.  This method returns true if machine code emission is
271  /// not supported.
272  ///
273  virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
274                                          MachineCodeEmitter &MCE, bool Fast);
275
276  /// Target-Independent Code Generator Pass Configuration Options.
277
278  /// addInstSelector - This method should add any "last minute" LLVM->LLVM
279  /// passes, then install an instruction selector pass, which converts from
280  /// LLVM code to machine instructions.
281  virtual bool addInstSelector(PassManagerBase &, bool /*Fast*/) {
282    return true;
283  }
284
285  /// addPreRegAllocPasses - This method may be implemented by targets that want
286  /// to run passes immediately before register allocation. This should return
287  /// true if -print-machineinstrs should print after these passes.
288  virtual bool addPreRegAlloc(PassManagerBase &, bool /*Fast*/) {
289    return false;
290  }
291
292  /// addPostRegAllocPasses - This method may be implemented by targets that
293  /// want to run passes after register allocation but before prolog-epilog
294  /// insertion.  This should return true if -print-machineinstrs should print
295  /// after these passes.
296  virtual bool addPostRegAlloc(PassManagerBase &, bool /*Fast*/) {
297    return false;
298  }
299
300  /// addPreEmitPass - This pass may be implemented by targets that want to run
301  /// passes immediately before machine code is emitted.  This should return
302  /// true if -print-machineinstrs should print out the code after the passes.
303  virtual bool addPreEmitPass(PassManagerBase &, bool /*Fast*/) {
304    return false;
305  }
306
307
308  /// addAssemblyEmitter - This pass should be overridden by the target to add
309  /// the asmprinter, if asm emission is supported.  If this is not supported,
310  /// 'true' should be returned.
311  virtual bool addAssemblyEmitter(PassManagerBase &, bool /*Fast*/,
312                                  std::ostream &) {
313    return true;
314  }
315
316  /// addCodeEmitter - This pass should be overridden by the target to add a
317  /// code emitter, if supported.  If this is not supported, 'true' should be
318  /// returned. If DumpAsm is true, the generated assembly is printed to cerr.
319  virtual bool addCodeEmitter(PassManagerBase &, bool /*Fast*/,
320                              bool /*DumpAsm*/, MachineCodeEmitter &) {
321    return true;
322  }
323
324  /// addSimpleCodeEmitter - This pass should be overridden by the target to add
325  /// a code emitter (without setting flags), if supported.  If this is not
326  /// supported, 'true' should be returned.  If DumpAsm is true, the generated
327  /// assembly is printed to cerr.
328  virtual bool addSimpleCodeEmitter(PassManagerBase &, bool /*Fast*/,
329                                    bool /*DumpAsm*/, MachineCodeEmitter &) {
330    return true;
331  }
332
333  /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
334  /// on this target.  User flag overrides.
335  virtual bool getEnableTailMergeDefault() const { return true; }
336};
337
338} // End llvm namespace
339
340#endif
341